Patents by Inventor Chien-Ming Wu

Chien-Ming Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10530381
    Abstract: An operational amplifier includes: a first gain stage for generating a second signal based on a first signal transmitted from a prior stage circuit; a second gain stage for generating an output signal based on the second signal; multiple candidate capacitors; and a capacitor selection circuit for switching the coupling relationship of the multiple candidate capacitors based on the magnitude of an input signal of the prior stage circuit, so that only a portion of the multiple candidate capacitors could be coupled to the second gain stage at a time.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: January 7, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Jie-Fan Lai, Chih-Lung Chen, Shih-Hsiung Huang, Chien-Ming Wu
  • Patent number: 10425097
    Abstract: A sample-and-hold amplifier includes: a switched capacitor network for conducting a sample-and-hold operation on an input signal to generate a first signal; and an operational amplifier coupled with the switched capacitor network and including multiple candidate capacitors; wherein the operational amplifier is arranged to operably generate an output signal based on the first signal, and to operably switch coupling relationship of the multiple candidate capacitors based on the magnitude of the input signal, so that only a portion of the multiple candidate capacitors could be participated in the generation of the output signal at a time.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: September 24, 2019
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Shih-Hsiung Huang, Chih-Lung Chen, Jie-Fan Lai, Chien-Ming Wu
  • Patent number: 10396725
    Abstract: An amplifier includes an output stage circuit and a compensation circuit. The output stage circuit includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The compensation circuit includes a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The first capacitor is coupled between the first input terminal and the second output terminal, and is configured to operate as a first Miller capacitor. The second capacitor is coupled between the second input terminal and the first output terminal, and is configured to operate as a second Miller capacitor. The third capacitor and the fourth capacitor are configured to alternately operate as the first Miller capacitor and the second Miller capacitor according to at least one clock signal.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: August 27, 2019
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chien-Ming Wu, Liang-Huan Lei, Shih-Hsiung Huang, Chih-Lung Chen
  • Patent number: 10353372
    Abstract: The device includes a master module and a slave module. The master module includes a control unit for controlling overall operation of the master module, a power unit electrically for storing electricity to supply the master module, an electricity transmission unit for receiving electricity from the power unit and wirelessly transmitting the electricity; and a communication unit for communicating of the master module. The slave module is electrically connected to the master module and includes a control subunit for controlling overall operation of the slave module, a communication subunit for wirelessly communicating with the communication unit, an electricity reception unit for wirelessly receiving the electricity from the power unit of the master module, a storage unit for storing electricity from the electricity reception unit and supplying power to each unit of the slave module, and an electricity transmission subunit for wirelessly outward transmitting electricity of the storage unit.
    Type: Grant
    Filed: November 23, 2017
    Date of Patent: July 16, 2019
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Chun-Ming Huang, Chen-Chia Chen, Chien-Ming Wu
  • Patent number: 10343445
    Abstract: A retractable pen includes a barrel, an ink cartridge, a limiting member, a shifting member and a deformable member. When the shifting member is moved relative to the limiting member between a first position and a third position, the ink cartridge can be moved from a retracted position to an extended position or from the extended position to the retracted position. When the ink cartridge is located at the extended position, the deformable member can be further compressed by between the shifting member and the ink cartridge, allowing the shifting member to be moved further from the third position to a second position closer to the ink cartridge. When the shifting member is located at the second position, the ink cartridge is continuously held to the extended position and pressed against a lead-out opening of the barrel without the risk of swaying when a user writes with the retractable pen.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: July 9, 2019
    Inventor: Chien Ming Wu
  • Publication number: 20190123757
    Abstract: A pipelined analog-to-digital converter includes: a first switched capacitor network, a first digital-to-analog converter, a second switched capacitor network, a second digital-to-analog converter, and an operational amplifier. The outputs from the first switched capacitor network and the first digital-to-analog converter form a first subtraction signal. The outputs from the second switched capacitor network and the second digital-to-analog converter form a second subtraction signal. The operational amplifier is arranged to operably generate an output signal based on the first subtraction signal or the second subtraction signal, and to operably switch coupling relationship of multiple candidate capacitors of the operational amplifier based on the magnitude of an input signal of a prior stage circuit, so that only a portion of the multiple candidate capacitors could be participated in the generation of the output signal at a time.
    Type: Application
    Filed: October 12, 2018
    Publication date: April 25, 2019
    Applicant: Realtek Semiconductor Corp.
    Inventors: Chih-Lung CHEN, Shih-Hsiung HUANG, Chien-Ming WU, Jie-Fan LAI
  • Publication number: 20190123755
    Abstract: An operational amplifier includes: a first gain stage for generating a second signal based on a first signal transmitted from a prior stage circuit; a second gain stage for generating an output signal based on the second signal; multiple candidate capacitors; and a capacitor selection circuit for switching the coupling relationship of the multiple candidate capacitors based on the magnitude of an input signal of the prior stage circuit, so that only a portion of the multiple candidate capacitors could be coupled to the second gain stage at a time.
    Type: Application
    Filed: October 12, 2018
    Publication date: April 25, 2019
    Applicant: Realtek Semiconductor Corp.
    Inventors: Jie-Fan LAI, Chih-Lung CHEN, Shih-Hsiung HUANG, Chien-Ming WU
  • Publication number: 20190123756
    Abstract: A sample-and-hold amplifier includes: a switched capacitor network for conducting a sample -and-hold operation on an input signal to generate a first signal; and an operational amplifier coupled with the switched capacitor network and including multiple candidate capacitors; wherein the operational amplifier is arranged to operably generate an output signal based on the first signal, and to operably switch coupling relationship of the multiple candidate capacitors based on the magnitude of the input signal, so that only a portion of the multiple candidate capacitors could be participated in the generation of the output signal at a time.
    Type: Application
    Filed: October 12, 2018
    Publication date: April 25, 2019
    Applicant: Realtek Semiconductor Corp.
    Inventors: Shih-Hsiung HUANG, Chih-Lung CHEN, Jie-Fan LAI, Chien-Ming WU
  • Publication number: 20190107819
    Abstract: The device includes a master module and a slave module. The master module includes a control unit for controlling overall operation of the master module, a power unit electrically for storing electricity to supply the master module, an electricity transmission unit for receiving electricity from the power unit and wirelessly transmitting the electricity; and a communication unit for communicating of the master module. The slave module is electrically connected to the master module and includes a control subunit for controlling overall operation of the slave module, a communication subunit for wirelessly communicating with the communication unit, an electricity reception unit for wirelessly receiving the electricity from the power unit of the master module, a storage unit for storing electricity from the electricity reception unit and supplying power to each unit of the slave module, and an electricity transmission subunit for wirelessly outward transmitting electricity of the storage unit.
    Type: Application
    Filed: November 23, 2017
    Publication date: April 11, 2019
    Applicant: National Applied Research Laboratories
    Inventors: Chun-Ming Huang, Chen-Chia Chen, Chien-Ming Wu
  • Patent number: 10256664
    Abstract: An intelligent power socket system is disclosed. The system is composed of a control module, a switched electricity receptacle module, a switched USB module and a dimming receptacle module. Each module has a power plug and a power socket. The control module can receive control commands from a smartphone by a user. The other three functional modules can be controlled by the control module through power line communication (PLC). The modules may be located at different places within an electricity supply division so that they can communicate through the power lines.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: April 9, 2019
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Yi-Bing Lin, Chun-Ming Huang, Gang-Neng Sung, Chien-Ming Wu
  • Publication number: 20190101428
    Abstract: A water level monitoring system includes at least one floating unit, a load cell and a sensor module. The floating unit is used for sinking in water. The load cell is connected to the floating unit for generating a force value reflecting buoyancy generating from the floating unit entering the water. The sensor module is connected to the load cell for sensing the force value from the load cell and includes an amplifier for amplifying a sensed value. A processor connected to the amplifier receives the sensed value from the amplifier and calculating a water level depth to be measured. Thus the water level motoring system has features of low cost, high stability and flexibility.
    Type: Application
    Filed: November 23, 2017
    Publication date: April 4, 2019
    Applicant: National Applied Research Laboratories
    Inventors: Chun-Ming Huang, Chen-Chia Chen, Chien-Ming Wu
  • Publication number: 20190074800
    Abstract: An amplifier includes an output stage circuit and a compensation circuit. The output stage circuit includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The compensation circuit includes a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The first capacitor is coupled between the first input terminal and the second output terminal, and is configured to operate as a first Miller capacitor. The second capacitor is coupled between the second input terminal and the first output terminal, and is configured to operate as a second Miller capacitor. The third capacitor and the fourth capacitor are configured to alternately operate as the first Miller capacitor and the second Miller capacitor according to at least one clock signal.
    Type: Application
    Filed: January 10, 2018
    Publication date: March 7, 2019
    Inventors: Chien-Ming WU, Liang-Huan LEI, Shih-Hsiung HUANG, Chih-Lung CHEN
  • Patent number: 10219215
    Abstract: A method of driving a network device for outputting signals to a physical network transmission medium. The network device includes a DAC circuit that comprises a plurality of digital-to-analog conversion units. Each digital-to-analog conversion unit includes a first auxiliary current source and a second auxiliary current source. The method includes the steps of: detecting a length of the physical network transmission medium; generating a control signal according to the length; generating a bias signal according to the control signal; applying the bias signal to the first auxiliary current source and the second auxiliary current source to control the currents of the first auxiliary current source and the second auxiliary current source.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: February 26, 2019
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Chien-Ming Wu
  • Publication number: 20190058472
    Abstract: An impedance calibration device provided includes a timing device, a first transmitter, a first variable resistor, a second variable resistor and a first receiver. The first variable resistor is used to receive a first adjustment code. The second variable resistor is used to receive a second adjustment code. The first receiver generates a first contact digital signal according to a first contact voltage. The first receiver generates a first terminate digital signal according to a first terminate voltage and the first adjustment code. The first receiver generates a first load digital signal according to a load voltage and the second adjustment. The timing device dynamically adjust the first adjustment code and the second adjustment code according to the first contact digital signal, the first terminate digital signal and the first load digital signal.
    Type: Application
    Filed: May 21, 2018
    Publication date: February 21, 2019
    Inventors: CHENG-PANG CHAN, CHIEN-MING WU, LIANG-HUAN LEI, JIAN-RU LIN
  • Patent number: 10211831
    Abstract: An impedance calibration device provided includes a timing device, a first transmitter, a first variable resistor, a second variable resistor and a first receiver. The first variable resistor is used to receive a first adjustment code. The second variable resistor is used to receive a second adjustment code. The first receiver generates a first contact digital signal according to a first contact voltage. The first receiver generates a first terminate digital signal according to a first terminate voltage and the first adjustment code. The first receiver generates a first load digital signal according to a load voltage and the second adjustment. The timing device dynamically adjust the first adjustment code and the second adjustment code according to the first contact digital signal, the first terminate digital signal and the first load digital signal.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: February 19, 2019
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Cheng-Pang Chan, Chien-Ming Wu, Liang-Huan Lei, Jian-Ru Lin
  • Publication number: 20180248366
    Abstract: The present invention discloses an electrostatic discharge (ESD) protection circuit including: a first terminal configured to provide a first voltage having a first value in a normal mode; a second terminal configured to provide a second voltage having a second value in the normal mode; a detection circuit configured to provide a detection voltage according to the first and second voltages; and a protection circuit configured to operate in one of the normal mode and an ESD mode according to the detection voltage. When the difference between a value of the detection voltage and an average of the first and second values reaches a predetermined threshold, the protection circuit enters the ESD mode from the normal mode, and thereby has a first path between the first terminal and a grounding terminal and/or a second path between the second terminal and the grounding terminal be conductive for discharging abnormal energy.
    Type: Application
    Filed: February 12, 2018
    Publication date: August 30, 2018
    Inventor: CHIEN-MING WU
  • Publication number: 20180212422
    Abstract: The present invention discloses an electrostatic discharge (ESD) protection circuit, including: a first terminal configured to receive a first voltage; a second terminal configured to receive a second voltage; a detection voltage generating circuit configured to provide a detection voltage according to the first voltage and the second voltage; a warning circuit configured to generate a control signal according to the detection voltage, in which the control signal indicates a normal condition when the detection voltage satisfies predetermined voltage setting, and the control signal indicates an abnormal condition when the detection voltage does not satisfy the predetermined voltage setting; and a protected circuit configured to carry out a self-protection operation when receiving the control signal indicating the abnormal condition.
    Type: Application
    Filed: January 24, 2018
    Publication date: July 26, 2018
    Inventors: CHIEN-MING WU, JIAN-RU LIN, LIANG-HUAN LEI, CHENG-PANG CHAN
  • Patent number: 10026544
    Abstract: The present invention discloses a common mode noise restrainer applicable to Ethernet, comprising: a circuit side configured to connect with an integrated circuit; a cable side configured to connect with a cable; a plurality of transformers set between the circuit side and the cable side; and a plurality of common mode chokes composed of a first part of the common mode chokes and a second part of the common mode chokes in which the first part of the common mode chokes is set between the circuit side and the plurality of transformers and the second part of the common mode chokes is set between the cable side and the plurality of transformers while the one or more transformer(s) connected with the first part of the common mode chokes are not identical to the one or more transformer(s) connected with the second part of the common mode chokes.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: July 17, 2018
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Chien-Ming Wu
  • Publication number: 20180160368
    Abstract: A method of driving a network device for outputting signals to a physical network transmission medium. The network device includes a DAC circuit that comprises a plurality of digital-to-analog conversion units. Each digital-to-analog conversion unit includes a first auxiliary current source and a second auxiliary current source. The method includes the steps of: detecting a length of the physical network transmission medium; generating a control signal according to the length; generating a bias signal according to the control signal; applying the bias signal to the first auxiliary current source and the second auxiliary current source to control the currents of the first auxiliary current source and the second auxiliary current source.
    Type: Application
    Filed: December 5, 2017
    Publication date: June 7, 2018
    Inventor: CHIEN-MING WU
  • Publication number: 20180115192
    Abstract: An intelligent power socket system is disclosed. The system is composed of a control module, a switched electricity receptacle module, a switched USB module and a dimming receptacle module. Each module has a power plug and a power socket. The control module can receive control commands from a smartphone by a user. The other three functional modules can be controlled by the control module through power line communication (PLC). The modules may be located at different places within an electricity supply division so that they can communicate through the power lines.
    Type: Application
    Filed: November 8, 2016
    Publication date: April 26, 2018
    Applicant: National Applied Research Laboratories
    Inventors: Yi-Bing Lin, Chun-Ming Huang, Gang-Neng Sung, Chien-Ming Wu