Abstract: In a pattern formation method, a bottom layer is formed over an underlying layer. A middle layer is formed over the bottom layer. A resist pattern is formed over the middle layer. The middle layer is patterned by using the resist pattern as an etching mask. The bottom layer is patterned by using the patterned middle layer. The underlying layer is patterned. The middle layer contains silicon in an amount of 50 wt % or more and an organic material. In one or more of the foregoing and following embodiments, an annealing operation is further performed after the middle layer is formed.

Abstract: Information regarding individuals that fit a bad performance definition, such as individuals that have previously defaulted on a financial instrument or have declared bankruptcy, is used to develop a model that is usable to determine whether an individual that does not fit the bad performance definition is more likely to subsequently default on a financial instrument or to declare bankruptcy. The model may be used to generate a score for each individual, and the score may be used to segment the individual into a segment of a segmentation structure that includes individuals with related scores, where segments may include different models for generating a final risk score for the individuals assigned to the particular segments. The segment to which an individual is assigned, which may be determined based at least partly on the score assigned to the individual, may affect the final risk score that is assigned to the individual.

Abstract: The present disclosure provides resist rinse solutions and corresponding lithography techniques that achieve high pattern structural integrity for advanced technology nodes. An example lithography method includes forming a resist layer over a workpiece, exposing the resist layer to radiation, developing the exposed resist layer using a developer that removes an unexposed portion of the exposed resist layer, thereby forming a patterned resist layer, and rinsing the patterned resist layer using a rinse solution. The developer is an organic solution, and the rinse solution includes water.

Abstract: A method for semiconductor manufacturing includes providing a substrate, forming a patterning layer over the substrate, and patterning the patterning layer to form a hole in the patterning layer. The method also includes applying a first directional etching to two inner sidewalls of the hole to expand the hole along a first direction and applying a second directional etching to another two inner sidewalls of the hole to expand the hole along a second direction that is different from the first direction.

Abstract: Information regarding individuals that fit a bad performance definition, such as individuals that have previously defaulted on a financial instrument or have declared bankruptcy, is used to develop a model that is usable to determine whether an individual that does not fit the bad performance definition is more likely to subsequently default on a financial instrument or to declare bankruptcy. The model may be used to generate a score for each individual, and the score may be used to segment the individual into a segment of a segmentation structure that includes individuals with related scores, where segments may include different models for generating a final risk score for the individuals assigned to the particular segments. The segment to which an individual is assigned, which may be determined based at least partly on the score assigned to the individual, may affect the final risk score that is assigned to the individual.

Abstract: The present disclosure provides resist rinse solutions and corresponding lithography techniques that achieve high pattern structural integrity for advanced technology nodes. An example lithography method includes forming a resist layer over a workpiece, exposing the resist layer to radiation, developing the exposed resist layer using a developer that removes an unexposed portion of the exposed resist layer, thereby forming a patterned resist layer, and rinsing the patterned resist layer using a rinse solution. The developer is an organic solution, and the rinse solution includes water.

Abstract: A lithography method is provided in accordance with some embodiments. The lithography method includes forming a metal-containing layer on a substrate, the metal-containing layer including a plurality of conjugates of metal-hydroxyl groups; treating the metal-containing layer at temperature that is lower than about 300° C. thereby causing a condensation reaction involving the plurality of conjugates of metal-hydroxyl groups; forming a patterned photosensitive layer on the treated metal-containing layer; and developing the patterned photosensitive layer so as to allow at least about 6% decrease of optimum exposure (Eop).

Abstract: Resist materials having enhanced sensitivity to radiation are disclosed herein, along with methods for lithography patterning that implement such resist materials. An exemplary resist material includes a polymer, a sensitizer, and a photo-acid generator (PAG). The sensitizer is configured to generate a secondary radiation in response to the radiation. The PAG is configured to generate acid in response to the radiation and the secondary radiation. The PAG includes a sulfonium cation having a first phenyl ring and a second phenyl ring, where the first phenyl ring is chemically bonded to the second phenyl ring.

Abstract: A method of patterning a resist layer is provided. The method includes forming the resist layer over the top surface of a silicon-containing layer that has a first contact angle. The method also includes exposing and developing the resist layer to form a patterned resist layer and expose a portion of the top surface of the silicon-containing layer. The method also includes applying a treating compound to the exposed portion of the top surface of the silicon-containing layer, so that the exposed portion of the top surface has a second contact angle that is greater than the first contact angle. The method also includes reflowing the patterned resist layer over the top surface of the silicon-containing layer having the second contact angle.

Abstract: A method includes forming a metal-containing material layer over a substrate, patterning the metal-containing material layer, where the patterned material layer has an average roughness, and electrochemically treating the patterned metal-containing material layer to reduce the average roughness. The treatment may be implemented by exposing the patterned metal-containing material layer to an electrically conducting solution and applying a potential between the patterned material layer and a counter electrode exposed to the solution, such that the treating reduces the average roughness of the patterned material layer. The electrically conducting solution may include an ionic compound dissolved in water, alcohol, and/or a surfactant.

Abstract: Provided is a material composition and method for substrate modification. A substrate is patterned to include a plurality of features. The plurality of features includes a first subset of features having one or more substantially inert surfaces. In various embodiments, a priming material is deposited over the substrate, over the plurality of features, and over the one or more substantially inert surfaces. By way of example, the deposited priming material bonds at least to the one or more substantially inert surfaces. Additionally, the deposited priming material provides a modified substrate surface. After depositing the priming material, a layer is spin-coated over the modified substrate surface, where the spin-coated layer is substantially planar.

Abstract: A method for semiconductor manufacturing includes providing a substrate, forming a patterning layer over the substrate, and patterning the patterning layer to form a hole in the patterning layer. The method also includes applying a first directional etching to two inner sidewalls of the hole to expand the hole along a first direction and applying a second directional etching to another two inner sidewalls of the hole to expand the hole along a second direction that is different from the first direction.

Abstract: A method for semiconductor manufacturing includes providing a substrate and a patterning layer over the substrate; forming a hole in the patterning layer; applying a first directional etching along a first direction to inner sidewalls of the hole; and applying a second directional etching along a second direction to the inner sidewalls of the hole, wherein the second direction is different from the first direction.

Abstract: A method includes forming a metal-containing material layer over a substrate, patterning the metal-containing material layer, where the patterned material layer has an average roughness, and electrochemically treating the patterned metal-containing material layer to reduce the average roughness. The treatment may be implemented by exposing the patterned metal-containing material layer to an electrically conducting solution and applying a potential between the patterned material layer and a counter electrode exposed to the solution, such that the treating reduces the average roughness of the patterned material layer. The electrically conducting solution may include an ionic compound dissolved in water, alcohol, and/or a surfactant.

Abstract: A method includes forming a photoresist layer over a substrate, wherein the photoresist layer includes a polymer, a sensitizer, and a photo-acid generator (PAG), wherein the sensitizer includes a resonance ring that includes nitrogen and at least one double bond. The method further includes performing an exposing process to the photoresist layer. The method further includes developing the photoresist layer, thereby forming a patterned photoresist layer.

Abstract: Materials directed to a photosensitive material and a method of performing a lithography process using the photosensitive material are described. A semiconductor substrate is provided. A first layer including a floating additive is formed over the semiconductor substrate. A second layer including an additive component having a metal cation is formed over the first layer. One or more bonds are formed to bond the metal cation and one or more anions. Each of the one or more anions is one of a protecting group and a polymer chain bonding component. The polymer chain bonding component is bonded to a polymer chain of the layer. The second layer is exposed to a radiation beam.

Abstract: A method of patterning a resist layer is provided. The method includes forming the resist layer over the top surface of a silicon-containing layer that has a first contact angle. The method also includes exposing and developing the resist layer to form a patterned resist layer and expose a portion of the top surface of the silicon-containing layer. The method also includes applying a treating compound to the exposed portion of the top surface of the silicon-containing layer, so that the exposed portion of the top surface has a second contact angle that is greater than the first contact angle. The method also includes reflowing the patterned resist layer over the top surface of the silicon-containing layer having the second contact angle.

Abstract: The present disclosure provides resist rinse solutions and corresponding lithography techniques that achieve high pattern structural integrity for advanced technology nodes. An example lithography method includes forming a resist layer over a workpiece, exposing the resist layer to radiation, developing the exposed resist layer using a developer that removes an unexposed portion of the exposed resist layer, thereby forming a patterned resist layer, and rinsing the patterned resist layer using a rinse solution. The developer is an organic solution, and the rinse solution includes water.

Abstract: In a pattern formation method, a bottom layer is formed over an underlying layer. A middle layer is formed over the bottom layer. A resist pattern is formed over the middle layer. The middle layer is patterned by using the resist pattern as an etching mask. The bottom layer is patterned by using the patterned middle layer. The underlying layer is patterned. The middle layer contains silicon in an amount of 50 wt % or more and an organic material. In one or more of the foregoing and following embodiments, an annealing operation is further performed after the middle layer is formed.

Abstract: A method includes forming a bottom layer over a semiconductor substrate, where the bottom layer includes a polymer bonded to a first cross-linker and a second cross-linker, the first cross-linker being configured to be activated by ultraviolet (UV) radiation and the second cross-linker being configured to be activated by heat at a first temperature. The method then proceeds to exposing the bottom layer to a UV source to activate the first cross-linker, resulting in an exposed bottom layer, where the exposing activates the first cross-linker. The method further includes baking the exposed bottom layer, where the baking activates the second cross-linker.