Patents by Inventor Chien-Wei Wang

Chien-Wei Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120003582
    Abstract: A method and photoresist material for the patterning of integrated circuit (IC) components using ultra violet (UV) and extreme ultraviolet lithography (EUV) that includes providing a substrate, forming a first material layer over the substrate, forming a second material layer over the first material layer, the second material layer having a luminescent agent, and exposing one or more portions of the second material layer.
    Type: Application
    Filed: June 30, 2010
    Publication date: January 5, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Wei WANG, Chun-Ching HUANG
  • Publication number: 20110159670
    Abstract: Provided is a photoresist that includes a polymer having a backbone that is breakable and a photo acid generator that is free of bonding from the polymer. Further, provided is a method of fabricating a semiconductor device. The method includes providing a device substrate. A material layer is formed over the substrate. A photoresist material is formed over the material layer. The photoresist material has a polymer that includes a backbone. The photoresist material is patterned to form a patterned photoresist layer. A fabrication process is then performed to the material layer, wherein the patterned photoresist layer serves as a mask in the fabrication process. Thereafter, the patterned photoresist layer is treated in a manner that breaks the backbone of the polymer. The patterned photoresist layer is then removed.
    Type: Application
    Filed: December 30, 2009
    Publication date: June 30, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Wei Wang, Ming-Feng Shieh, Ching-Yu Chang
  • Publication number: 20110097670
    Abstract: A lithography method includes forming a photosensitive layer on a substrate, exposing the photosensitive layer, baking the photosensitive layer, and developing the exposed photosensitive layer. The photosensitive layer includes a polymer that turns soluble to a base solution in response to reaction with acid, a plurality of photo-acid generators (PAGs) that decompose to form acid in response to radiation energy, and a plurality of quenchers having boiling points distributed between about 200 C and about 350 C. The quenchers also have molecular weights distributed between 300 Dalton and about 20000 Dalton, and are vertically distributed in the photosensitive layer such that a first concentration C1 at a top portion of the photosensitive layer is greater than a second concentration C2 at a bottom portion of the photosensitive layer.
    Type: Application
    Filed: November 19, 2009
    Publication date: April 28, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Wei Wang, Ching-Yu Chang
  • Publication number: 20110076624
    Abstract: A method for fabricating an integrated circuit device is disclosed. The method may include providing a substrate; forming a first material layer over the substrate; forming a patterned second material layer over the substrate; and removing the patterned second material layer with a fluid comprising a steric hindered organic base and organic solvent.
    Type: Application
    Filed: September 25, 2009
    Publication date: March 31, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Wei Wang, Ching-Yu Chang
  • Publication number: 20110070542
    Abstract: A method and material layer for forming a pattern are disclosed.
    Type: Application
    Filed: September 18, 2009
    Publication date: March 24, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Wei Wang, Ching-Yu Chang, Burn Jeng Lin
  • Publication number: 20110059396
    Abstract: A method for fabricating an integrated circuit device is disclosed. The method includes providing a substrate; forming a first material layer over the substrate; forming a second material layer over the first material layer, wherein the second material layer comprises a photodegradable base material; and exposing at least a portion of the second material layer.
    Type: Application
    Filed: September 8, 2009
    Publication date: March 10, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Wei Wang, Ching-Yu Chang, Tsai-Sheng Gau, Burn Jeng Lin
  • Publication number: 20100310995
    Abstract: A method of lithography patterning includes forming a first resist pattern on a substrate, wherein the first resist pattern including a plurality of openings. A second resist pattern is formed on the substrate and within the plurality of openings of the first resist pattern, wherein the second resist pattern includes at least one opening therein on the substrate. The first resist pattern is removed to uncover the substrate underlying the first resist pattern.
    Type: Application
    Filed: February 9, 2010
    Publication date: December 9, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Kuang Chen, Hsiao-Wei Yeh, Chih-An Lin, Chien-Wei Wang, Feng-Cheng Hsu
  • Publication number: 20100285410
    Abstract: The present disclosure provides a method for manufacturing a semiconductor device. The method includes coating a photoresist on a substrate. The photoresist is exposed to radiation. The radiation exposed photoresist is baked. The radiation exposed and baked photoresist is developed to create an image pattern. The image pattern is treated with a treating material. An ion implantation process is performed to the substrate and the treated image pattern. The image pattern is stripped from the substrate. A carbon atom ratio of the treating material is less than a carbon atom ratio of the photoresist.
    Type: Application
    Filed: May 11, 2009
    Publication date: November 11, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Wei Wang, Ching-Yu Chang
  • Publication number: 20100273321
    Abstract: A system to form a wet soluble lithography layer on a semiconductor substrate includes providing the substrate, depositing a first layer comprising a first material on the substrate, and depositing a second layer comprising a second material on the substrate. In an embodiment, the first material comprises a different composition than the second material and one of the first layer and the second layer includes silicon.
    Type: Application
    Filed: April 27, 2009
    Publication date: October 28, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Wei Wang, Ching-Yu Chang
  • Publication number: 20100255427
    Abstract: The present disclosure provides a method for etching a substrate. The method includes forming a patterned photo-sensitive layer on the substrate; applying an etching chemical fluid to the substrate, wherein the patterned photo-sensitive layer includes an adhesion promoter and/or hydrophobic additive; removing the etching chemical fluid; and removing the resist pattern.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 7, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Wei WANG, Victor HUANG, Ching-Yu CHANG
  • Patent number: 7711636
    Abstract: Information regarding individuals that fit a bad performance definition, such as individuals that have previously defaulted on a financial instrument or have declared bankruptcy, is used to develop a model that is usable to determine whether an individual that does not fit the bad performance definition is more likely to subsequently default on a financial instrument or to declare bankruptcy. The model may be used to generate a score for each individual, and the score may be used to segment the individual into a segment of a segmentation structure that includes individuals with related scores, where segments may include different models for generating a final risk score for the individuals assigned to the particular segments. Thus, the segment to which an individual is assigned, which may be determined based at least partly on the score assigned to the individual, may affect the final risk score that is assigned to the individual.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: May 4, 2010
    Assignee: Experian Information Solutions, Inc.
    Inventors: Chuck Robida, Chien-Wei Wang
  • Publication number: 20100099267
    Abstract: Provided is a method and system for vapor deposition of a coating material onto a semiconductor substrate. In an embodiment, photoresist is deposited. An in-situ baking process may be performed with the vapor deposition. In an embodiment, a ratio of chemical components of a material to be deposited onto the substrate is changed during the deposition. Therefore, a layer having a gradient chemical component distribution may be provided. In an embodiment, a BARC layer may be provided which includes a gradient chemical component distribution providing an n,k distribution through the layer. Other materials that may be vapor deposited include pattern freezing material.
    Type: Application
    Filed: October 20, 2008
    Publication date: April 22, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Wei Wang, David Ding-Chung Lu, Ching-Yu Chang
  • Publication number: 20090099960
    Abstract: Information regarding individuals that fit a bad performance definition, such as individuals that have previously defaulted on a financial instrument or have declared bankruptcy, is used to develop a model that is usable to determine whether an individual that does not fit the bad performance definition is more likely to subsequently default on a financial instrument or to declare bankruptcy. The model may be used to generate a score for each individual, and the score may be used to segment the individual into a segment of a segmentation structure that includes individuals with related scores, where segments may include different models for generating a final risk score for the individuals assigned to the particular segments. Thus, the segment to which an individual is assigned, which may be determined based at least partly on the score assigned to the individual, may affect the final risk score that is assigned to the individual.
    Type: Application
    Filed: December 18, 2008
    Publication date: April 16, 2009
    Applicant: EXPERIAN-SCOREX, LLC
    Inventors: Chuck Robida, Chien-Wei Wang
  • Publication number: 20080032629
    Abstract: A Bluetooth internet phone includes a Bluetooth wireless apparatus and a computing machine which is cooperated with the Bluetooth wireless apparatus and is connected with Internet. The computing machine includes a Bluetooth communicating module and a Voice over Internet Protocol (VoIP) module. The Bluetooth wireless apparatus includes a Bluetooth transceiver module and a Handsfree Profile (HFP) module. The HFP module is able to transmit audio signals and data signals under a Handsfree Profile, wherein the audio signals and the data signals are transmitted to the computing machine through the Bluetooth transceiver module and are transferred into an information packet through the VoIP module to be transmitted to Internet.
    Type: Application
    Filed: June 21, 2007
    Publication date: February 7, 2008
    Inventors: Chien-Wei Wang, Chiu-Lin Chuang, Chih-Hung Chiu
  • Publication number: 20070214076
    Abstract: Information regarding individuals that fit a bad performance definition, such as individuals that have previously defaulted on a financial instrument or have declared bankruptcy, is used to develop a model that is usable to determine whether an individual that does not fit the bad performance definition is more likely to subsequently default on a financial instrument or to declare bankruptcy. The model may be used to generate a score for each individual, and the score may be used to segment the individual into a segment of a segmentation structure that includes individuals with related scores, where segments may include different models for generating a final risk score for the individuals assigned to the particular segments. Thus, the segment to which an individual is assigned, which may be determined based at least partly on the score assigned to the individual, may affect the final risk score that is assigned to the individual.
    Type: Application
    Filed: September 27, 2006
    Publication date: September 13, 2007
    Applicant: EXPERIAN-SCOREX, LLC
    Inventors: Chuck Robida, Chien-Wei Wang
  • Patent number: 7142938
    Abstract: A manufacturing management system and method. The system includes a manufacturing execution system and a plurality of manufacturing sites coupled to the manufacturing execution system. The manufacturing execution system comprises management data to support the manufacturing sites. Each manufacturing site comprises a corresponding site attribute. At least one of the manufacturing sites receives a lot, queries the management data for the lot from the manufacturing execution system according to lot identification and the site attribute of the manufacturing site receiving the lot, and processes the lot accordingly.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: November 28, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shiaw-Lin Chi, Kun-Chi Liu, Chien-Wei Wang, Chih-Chien Chang, Chang-Hsi Lin, Chien-Fei Cheng, Lieh-Jung Chen, Fang-Ni Wu, Birgie Kuo, Yi-Fang Su
  • Publication number: 20060100844
    Abstract: A system and method thereof for test time forecasting. The system comprises a storage device and a first program module. The storage device stores Circuit Probing (CP) test records individually storing information regarding a test time and a yield of a test unit corresponding to a test program. The first program module receives the CP test records and generates a new test time forecast model according to the CP test records. The new test time forecast model determines a dependent variable corresponding to the test time by utilizing an independent variable corresponding to the yield.
    Type: Application
    Filed: November 8, 2004
    Publication date: May 11, 2006
    Inventors: Keng-Chia Yang, Yi-Sheng Huang, Ben-Hui Yu, Chung-Lin Hsieh, Chien-Wei Wang, Tsung-Hsin Yang, Tzu-Cheng Huang
  • Publication number: 20060079978
    Abstract: A manufacturing management system and method. The system includes a manufacturing execution system and a plurality of manufacturing sites coupled to the manufacturing execution system. The manufacturing execution system comprises management data to support the manufacturing sites. Each manufacturing site comprises a corresponding site attribute. At least one of the manufacturing sites receives a lot, queries the management data for the lot from the manufacturing execution system according to lot identification and the site attribute of the manufacturing site receiving the lot, and processes the lot accordingly.
    Type: Application
    Filed: October 13, 2004
    Publication date: April 13, 2006
    Inventors: Shiaw-Lin Chi, Kun-Chi Liu, Chien-Wei Wang, Chih-Chien Chang, Chang-Hsi Lin, Chien-Fei Cheng, Lieh-Jung Chen, Fang-Ni Wu, Birgie Kuo, Yi-Fang Su