Patents by Inventor Chih-Chiang Chang

Chih-Chiang Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230355083
    Abstract: A tethered opto-electronic imaging system encapsulated in an optically-transmissible housing capsule/shell and configured to image object space in multiple fields-of-view (FOVs) to form a visually-perceivable representation of the object space in which sub-images representing different FOVs remain co-directional regardless of mutual repositioning of the object and the imaging system. The capsule/shell of the system is a functionally-required portion of the train of optical components that aggregately define and form a lens of the optical imaging system. The tether is devoid of any functional optical channel or element. When different FOVs are supported by the same optical detector, co-directionality of formed sub-images images is achieved due via judicious spatial re-distribution of irradiance of an acquired sub-image to form a transformed sub-image while maintaining aspect ratios of dimensions of corresponding pixels of the acquired and transformed sub-images.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 9, 2023
    Applicant: OMNISCIENT IMAGING INC.
    Inventors: Bhaskar Banerjee, Brian Scaramella, Richard Pfisterer, Scott Ellis, Andrew Sapozink, Chih-Chiang Chang
  • Publication number: 20230362515
    Abstract: A method is provided for forming a light-shielding layer to block irradiation of light onto a light-sensitive storage region. The light-sensitive storage region is formed in a semiconductor substrate to store electric charges. A storage gate feature is formed over the light-sensitive storage region, and includes a polysilicon gate electrode that is disposed over the light-sensitive storage region. A metal layer is formed over the storage gate feature. A silicidation process is performed to transform a part of the metal layer that is in contact with the polysilicon gate electrode into a silicide light-shielding layer. A thermal process is performed to induce lateral growth of the silicide light-shielding layer to make the silicide light-shielding layer extend to cover a lateral surface of the storage gate feature. A process temperature of the thermal process is higher than that of the silicidation process.
    Type: Application
    Filed: May 9, 2022
    Publication date: November 9, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yueh-Chuan LEE, Chih-Chiang CHANG, Chia-Chan CHEN
  • Publication number: 20230352594
    Abstract: Various embodiments of the present disclosure provide a semiconductor device structure. In one embodiment, the semiconductor device structure includes a source/drain feature over a substrate, a plurality of semiconductor layers over the substrate, a gate electrode layer surrounding a portion of each of the plurality of the semiconductor layers, a gate dielectric layer in contact with the gate electrode layer, and a cap layer. The cap layer has a first portion disposed between the plurality of semiconductor layers and the source/drain feature and a second portion extending outwardly from opposing ends of the first portion. The semiconductor device structure further includes a dielectric spacer disposed between and in contact with the source/drain feature and the second portion of the cap layer.
    Type: Application
    Filed: April 29, 2022
    Publication date: November 2, 2023
    Inventors: Yen-Sheng LU, Chung-Chi WEN, Yen-Ting CHEN, Wei-Yang LEE, Chia-Pin LIN, Chih-Chiang CHANG, Chien-I KUO, Yuan-Ching PENG, Chih-Ching WANG, Wen-Hsing Hsieh, Chii-Horng LI, Yee-Chia YEO
  • Patent number: 11793397
    Abstract: A tethered opto-electronic imaging system encapsulated in an optically-transmissible housing capsule/shell and configured to image object space in multiple fields-of-view (FOVs) to form a visually-perceivable representation of the object space in which sub-images representing different FOVs remain co-directional regardless of mutual repositioning of the object and the imaging system. The capsule/shell of the system is a functionally-required portion of the train of optical components that aggregately define and form a lens of the optical imaging system. The tether is devoid of any functional optical channel or element. When different FOVs are supported by the same optical detector, co-directionality of formed sub-images images is achieved due via judicious spatial re-distribution of irradiance of an acquired sub-image to form a transformed sub-image while maintaining aspect ratios of dimensions of corresponding pixels of the acquired and transformed sub-images.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: October 24, 2023
    Assignee: OMNISCIENT IMAGING, INC.
    Inventors: Bhaskar Banerjee, Brian Scaramella, Richard Pfisterer, Scott Ellis, Andrew Sapozink, Chih-Chiang Chang
  • Publication number: 20230333354
    Abstract: A tethered imaging camera encapsulated in a shell lens element of such camera enables viewing from inside and imaging of a biological organ in/from a variety of directions. A portion of camera's optical system together with light source(s) and optical detector mutually cooperated by housing structure inside the shell are moveable/re-orientable within the shell to vary a desired view of the object space without interruption of imaging process. A tether carries electrical but not optical signals to and from the camera and controllable traction cords to move the camera, and a hand-control unit and/or electronic circuitry configured to operate the camera and power its movements. Method(s) of using optical, optoelectronic, and optoelectromechanical sub-systems of the camera.
    Type: Application
    Filed: June 22, 2023
    Publication date: October 19, 2023
    Applicant: OMNISCIENT IMAGING, INC.
    Inventors: Bhaskar Banerjee, Richard Pfisterer, John Jameson, Chih-Chiang Chang, Haiyong Zhang
  • Publication number: 20230288764
    Abstract: An electronic device is disclosed. The electronic device includes a substrate, a plurality of color filters disposed on the substrate, an optical film disposed on the plurality of color filter, and a defect disposed between the substrate and the optical film. The optical film has a first base, a protective layer on the first base, and a second base between the first base and the protective layer and having a first processed area. In a top view of the electronic device, the first processed area corresponds to the defect and at least partially overlaps at least two color filters.
    Type: Application
    Filed: May 18, 2023
    Publication date: September 14, 2023
    Inventors: Tai-Chi PAN, Chin-Lung TING, I-Chang LIANG, Chih-Chiang CHANG CHIEN, Po-Wen LIN, Kuang-Ming FAN, Sheng-Nan CHEN
  • Patent number: 11733496
    Abstract: A tethered imaging camera encapsulated in a shell lens element of such camera enables viewing from inside and imaging of a biological organ in/from a variety of directions. A portion of camera's optical system together with light source(s) and optical detector mutually cooperated by housing structure inside the shell are moveable/re-orientable within the shell to vary a desired view of the object space without interruption of imaging process. A tether carries electrical but not optical signals to and from the camera and controllable traction cords to move the camera, and a hand-control unit and/or electronic circuitry configured to operate the camera and power its movements. Method(s) of using optical, optoelectronic, and optoelectromechanical sub-systems of the camera.
    Type: Grant
    Filed: March 21, 2023
    Date of Patent: August 22, 2023
    Assignee: OMNISCIENT IMAGING, INC.
    Inventors: Bhaskar Banerjee, Richard Pfisterer, John Jameson, Chih-Chiang Chang, Haiyong Zhang
  • Publication number: 20230258721
    Abstract: A delay measurement system and a measurement method are provided. The delay measurement system includes a delay control device and a comparator. The delay control device is configured to generate a second signal in response to a first signal, wherein a rising edge of the second signal delays a first delay time with respect to a rising edge of the first signal, and the first delay time is controlled in response to an output signal of a comparator. The comparator is configured to compare the first delay time with a second delay time and output the output signal, wherein a rising edge of a third signal delays the second delay time with respect to the rising edge of the first signal, and the third signal is generated by a device under test (DUT) in response to the first signal.
    Type: Application
    Filed: February 15, 2022
    Publication date: August 17, 2023
    Inventors: SHANG HSIEN YANG, CHUNG-CHIEH YANG, YUNG-CHOW PENG, CHIH-CHIANG CHANG
  • Publication number: 20230238956
    Abstract: A device including an inverter circuit, a hysteresis control circuit, and a high-side input level shifter. The inverter circuit having an output and including at least two series connected PMOS transistors connected, at the output, in series to at least two series connected NMOS transistors. The hysteresis control circuit coupled to the output to provide feedback to the at least two series connected PMOS transistors and to the at least two series connected NMOS transistors. The high-side input level shifter connected to gates of the at least two PMOS transistors and configured to shift a low level of an input signal to a higher level and provide the higher level to one or more of the gates of the at least two PMOS transistors.
    Type: Application
    Filed: January 21, 2022
    Publication date: July 27, 2023
    Inventors: Yung-Shun Chen, Chih-Chiang Chang, Yung-Chow Peng
  • Patent number: 11709307
    Abstract: A light source module and a method for manufacturing the same, and a backlight module and a display device using the same are provided. The method includes the following steps. A reference light source module is provided. The reference light source module comprises a substrate and plural light-emitting units arranged on the substrate. Then, plural optical trends between every two adjacent light-emitting units are obtained. Then, plural optical ratios between every two adjacent light-emitting units are calculated, in which each of the optical ratios is a ratio of each of the optical trends to a total reference optical trend of the reference light source module. Then, plural target distances are calculated according to the optical ratios and plural initial distances between every two adjacent light-emitting units are adjusted according to the target distances, thereby forming a target light source module.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: July 25, 2023
    Assignees: Radiant Opto-Electronics (Suzhou) Co., Ltd., Radiany Opto-Electronics Corporation
    Inventors: Chang-Yao Chen, Chih-Chiang Chang, Ya-Yin Tsai
  • Publication number: 20230221535
    Abstract: A tethered imaging camera encapsulated in a shell lens element of such camera enables viewing from inside and imaging of a biological organ in/from a variety of directions. A portion of camera's optical system together with light source(s) and optical detector mutually cooperated by housing structure inside the shell are moveable/re-orientable within the shell to vary a desired view of the object space without interruption of imaging process. A tether carries electrical but not optical signals to and from the camera and controllable traction cords to move the camera, and a hand-control unit and/or electronic circuitry configured to operate the camera and power its movements. Method(s) of using optical, optoelectronic, and optoelectromechanical sub-systems of the camera.
    Type: Application
    Filed: March 21, 2023
    Publication date: July 13, 2023
    Applicant: OMNISCIENT IMAGING, INC.
    Inventors: Bhaskar Banerjee, Richard Pfisterer, John Jameson, Chih-Chiang Chang, Haiyong Zhang
  • Patent number: 11693285
    Abstract: An electronic device is disclosed. The electronic device includes a panel, a defect in and/or on the panel and an optical film above the panel. The panel includes a first substrate, a second substrate disposed opposite to the first substrate, and a plurality of display units disposed on the first substrate. There is a defect between the first substrate and the second substrate, or on the second substrate. In a top view of the electronic device, an optical film has a first processed area corresponding to the defect, and the first processed area at least partially overlaps at least two display units.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: July 4, 2023
    Assignee: INNOLUX CORPORATION
    Inventors: Tai-Chi Pan, Chin-Lung Ting, I-Chang Liang, Chih-Chiang Chang Chien, Po-Wen Lin, Kuang-Ming Fan, Sheng-Nan Chen
  • Publication number: 20230186008
    Abstract: An electronic design flow generates an electronic architectural design layout for analog circuitry from a schematic diagram. The electronic design flow assigns analog circuits of the schematic diagram to various categories of analog circuits. The electronic design flow places various analog standard cells corresponding to these categories of analog circuits into analog placement sites assigned to the analog circuits. These analog standard cells have a uniform cell height which allows these analog standard cells to be readily connected or merged to digital standard cells which decreases the area of the electronic architectural design layout. This uniformity in height between these analog standard cells additionally provides a more reliable yield when compared to non-uniform analog standard cells.
    Type: Application
    Filed: February 3, 2023
    Publication date: June 15, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ting LU, Chih-Chiang CHANG, Chung-Peng HSIEH, Chung-Chieh YANG, Yung-Chow PENG, Yung-Shun CHEN, Tai-Yi CHEN, Nai Chen CHENG
  • Publication number: 20230155583
    Abstract: A digitally controlled delay line (DCDL) includes input and output terminals, and a plurality of stages that propagate a signal along a first signal path from the input terminal to a selectable return stage and along a second signal path from the return stage to the output terminal. Each stage includes a first inverter that selectively propagates the signal along the first signal path, a second inverter that selectively propagates the signal along the second signal path, and a third inverter that selectively propagates the signal from the first signal path to the second signal path. At least one of the first or third inverters includes a tuning portion including either a plurality of parallel, independently controllable p-type transistors coupled in series with a single independently controllable n-type transistor, or a plurality of parallel, independently controllable n-type transistors coupled in series with a single independently controllable p-type transistor.
    Type: Application
    Filed: January 18, 2023
    Publication date: May 18, 2023
    Inventors: Chung-Peng HSIEH, Chih-Chiang CHANG, Yung-Chow PENG
  • Patent number: 11635930
    Abstract: An image control device and an image control method are provided. The image control device includes a control command output port, an image input port, a processor and an image output unit. The control command output port transmits a scene switching command to an image source device; the image input port receives an image stream from the image source device; the processor is coupled to the image input port and the control command output port to retrieve a first image and a second image from the image stream, wherein the second image corresponds to the scene switching command; the image output unit is coupled to the processor and outputs the first image and the second image, wherein the first image is displayed in a first display area and the second image is displayed in a second display area.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: April 25, 2023
    Assignee: Aten International Co., Ltd.
    Inventors: Tzu-Yi Chuang, Ding-Yuan Wang, Syuan-You Liao, Chih-Chiang Chang
  • Publication number: 20230122803
    Abstract: A device includes a control circuit, a scope circuit, a first logic gate and a second logic gate. The control circuit is configured to generate a first control signal according to a voltage signal and a delayed signal. The scope circuit is configured to generate a first current signal in response to the first control signal and the voltage signal. The first logic gate is configured to perform a first logical operation on the voltage signal and one of the voltage signal and the delayed signal to generate a second control signal. The second logical gate configured to perform a second logical operation on the second control signal and a test control signal to generate a second current signal.
    Type: Application
    Filed: December 21, 2022
    Publication date: April 20, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Peng HSIEH, Chih-Chiang CHANG, Chung-Chieh YANG
  • Publication number: 20230121395
    Abstract: The present disclosure provides a circuitry. The circuitry includes a comparator and a signal correlated circuit. The comparator includes a first input terminal, a second input terminal, and an output terminal. The signal correlated circuit includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The first input terminal is coupled to receive a first input signal. The second input terminal is coupled to receive a second input signal independent from the first input signal. The first output terminal is configured to generate a first output signal and to send the first output signal to the first input terminal of the comparator. The second output terminal is configured to generate a second output signal and to send the second output signal to the second input terminal of the comparator. The first output signal and the second output signal are correlated.
    Type: Application
    Filed: December 14, 2022
    Publication date: April 20, 2023
    Inventors: CHUNG-TING LU, CHIH-CHIANG CHANG, CHUNG-CHIEH YANG
  • Patent number: 11630287
    Abstract: A tethered imaging camera encapsulated in a shell lens element of such camera enables viewing from inside and imaging of a biological organ in/from a variety of directions. A portion of camera's optical system together with light source(s) and optical detector mutually cooperated by housing structure inside the shell are moveable/re-orientable within the shell to vary a desired view of the object space without interruption of imaging process. A tether carries electrical but not optical signals to and from the camera and controllable traction cords to move the camera, and a hand-control unit and/or electronic circuitry configured to operate the camera and power its movements. Method(s) of using optical, optoelectronic, and optoelectromechanical sub-systems of the camera.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: April 18, 2023
    Assignee: OMNISCIENT IMAGING, INC.
    Inventors: Bhaskar Banerjee, Richard Pfisterer, John Jameson, Chih-Chiang Chang, Haiyong Zhang
  • Publication number: 20230116122
    Abstract: Disclosed are devices for optical sensing and manufacturing method thereof. In one embodiment, a device for optical sensing includes a substrate, a photodetector and a reflector. The photodetector is disposed in the substrate. The reflector is disposed in the substrate and spaced apart from the photodetector, wherein the reflector has a reflective surface inclined relative to the photodetector that reflects light transmitted thereto to the photodetector.
    Type: Application
    Filed: December 14, 2022
    Publication date: April 13, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chiang Chang, Chia-Chan Chen
  • Publication number: 20230088795
    Abstract: The present disclosure relates to an integrated circuit. The integrated circuit includes a conductive interconnect disposed on a dielectric over a substrate. An interfacial layer is arranged along an upper surface of the conductive interconnect. A liner is arranged along a lower surface of the conductive interconnect. The liner and the interfacial layer surround the conductive interconnect. A middle layer is located over the interfacial layer and has a bottommost surface over the dielectric. A bottommost surface of the interfacial layer and the bottommost surface of the middle layer are both above a top of the conductive interconnect.
    Type: Application
    Filed: November 28, 2022
    Publication date: March 23, 2023
    Inventors: Su-Jen Sung, Chih-Chiang Chang, Chia-Ho Chen