Abstract: A method of controlling NFET and PFET gate heights across different gate widths with chamfering and the resulting device are provided. Embodiments include forming an ILD over a fin; forming cavities in the ILD, each with similar or different widths; forming a high-K dielectric layer over the ILD and in each cavity; forming a pWF metal layer over the dielectric layer in one cavity; recessing the pWF metal layer to a height above the fin; forming an nWF metal layer in the cavities over the dielectric and pWF metal layers; recessing the nWF metal layer to a height above the pWF metal layer; forming a barrier layer over the dielectric and nWF metal layers; filling the cavities with a low-resistive metal; and recessing the barrier and dielectric layers to a height above the nWF metal layer; and concurrently etching the low-resistive metal.

Abstract: A semiconductor structure includes a device region and a test region. In the device region, first fin spacers cover sidewalls of a first fin structure and have a first height, and a first epitaxy structure is disposed in the first fin structure, which a portion of the first epitaxy structure is above the first fin spacers and having a first width. In the test region, second fin spacers cover sidewalls of the second fin structure and have a second height, and the second height is greater than the first height. A second epitaxy structure is disposed in the second fin structure, and a portion of the second epitaxy structure is above the second fin spacers and having a second width, which the second width is less than the first width.

Abstract: A structure and method for forming a tungsten region for a replacement metal gate (RMG). The method for forming the tungsten region may include, among other things, forming a first tungsten region i.e., tungsten seed layer, on a liner in a trench of a dielectric layer; removing a portion of the liner and the tungsten seed layer to expose an uppermost surface of a work function metal (WFM) layer wherein an uppermost surface of the liner and tungsten seed layer is positioned below an uppermost surface of the dielectric layer; and forming a second tungsten region from the tungsten seed layer. The tungsten region may be formed to contact the uppermost surface liner, the uppermost surface of WFM layer, and/or the sidewalls of the trench. The tungsten region may include a single crystallographic orientation. The tungsten region may also include an uppermost surface with a substantially arcuate cross-sectional geometry.

Abstract: Methods of forming a sacrificial gate cap and a self-aligned contact for a device structure. A gate electrode is arranged between a first sidewall spacer and a second sidewall spacer. A top surface of the gate electrode is recessed to open a space above the top surface of the recessed gate electrode that partially exposes the first and second sidewall spacers. Respective sections of the first and second sidewall spacers, which are arranged above the top surface of the recessed gate electrode, are removed in order to increase a width of the space. A sacrificial cap is formed in the widened space.

Abstract: A circuit for measuring a bandwidth of an amplifier includes first and second capacitors, first through third switches, and a pulse generator. First terminals of the capacitors are coupled to an amplifier input, and a second terminal of the second capacitor is coupled to an amplifier output. The first switch has a control terminal and terminals coupled to a first input node and a second terminal of the first capacitor. The second switch has a control terminal and terminals coupled to the amplifier input and output. The third switch has a control terminal, a first terminal, and a second terminal coupled to the second terminal of the first capacitor. The pulse generator has a first output coupled to the control terminal of the third switch, and is configured to vary a pulse width of a pulse signal supplied from the first output to the control terminal of the third switch.

Abstract: A frequency synthesizer comprising a reference oscillator configured to generate a first clock signal with a reference frequency and a divider controller configured to receive the first clock signal, a second clock signal, and a multiplier value. The divider controller is configured to obtain a ratio of a frequency of the first clock signal to a frequency of the second clock signal and divide the resulting ratio by the multiplier value to obtain controller output value. A divider is configured to receive the first clock signal and controller output value and output an output clock signal with a frequency equal to the frequency of the first clock signal divided by the controller output value.

Abstract: A frequency synthesizer comprising a reference oscillator configured to generate a first clock signal with a reference frequency and a divider controller configured to receive the first clock signal, a second clock signal, and a multiplier value. The divider controller is configured to obtain a ratio of a frequency of the first clock signal to a frequency of the second clock signal and divide the resulting ratio by the multiplier value to obtain controller output value. A divider is configured to receive the first clock signal and controller output value and output an output clock signal with a frequency equal to the frequency of the first clock signal divided by the controller output value.

Abstract: A circuit for measuring a bandwidth of an amplifier includes a switch-capacitor circuit and a controller. The switch-capacitor circuit is coupled to an output and an input of the amplifier. The switch-capacitor circuit is switchable between a sampling mode and an amplification mode. The controller is coupled to the switch-capacitor circuit and the output of the amplifier. The controller is configured to switch the switch-capacitor circuit between the sampling mode and the amplification mode, control the amplification mode to have various durations, and determine the bandwidth of the amplifier based on the various durations of the amplification mode and corresponding voltages at the output of the amplifier.

Abstract: We disclose a semiconductor device, comprising a semiconductor substrate; at least one gate structure disposed above the semiconductor substrate, wherein the gate structure comprises a gate structure cavity partially filled with at least one metal layer; and an ultraviolet (UV) cured high density plasma (HDP) nitride cap layer in the gate structure cavity above the at least one metal layer. We also disclose at least one method and at least one system by which the semiconductor device may be formed. The UV cured HDP nitride cap layer may be substantially free of voids or seams, and as a result, the semiconductor device may have a reduced Vt shift relative to comparable semiconductor devices known in the art.

Abstract: A handle structure includes a holding member, a press member, and a hook. The holding member includes a holding portion and a space formed in the holding portion. The press member includes a press portion and a plurality of adjustment holes. The press portion is movably disposed in the space. The adjustment holes are disposed on the other end of the press member opposite to the press portion. The hook includes a clasp portion and at least one fastening hole. The fastening hole is adjustably positioned corresponding to any of the adjustment holes, and the clasp portion is movable along with the movement of the press portion, wherein the clasp portion protrudes out of the holding member. The hook moves by pressing the press portion.

Abstract: A semiconductor structure and a method of fabricating the semiconductor structure are disclosed herein. The semiconductor structure includes a substrate, a strain-inducing layer and an epitaxy structure. The strain-inducing layer is disposed on the substrate, and the epitaxy structure is embedded in the strain-inducing layer and not in contact with the substrate.

Abstract: A device is disclosed that includes a control circuit, a scope circuit and a time-to-current converter. The control circuit configured to delay a voltage signal for a delay time to generate a first control signal, and to generate a second control signal according to the first control signal and the voltage signal. The scope circuit configured to generate a first current signal in response to the second control signal and the voltage signal. The time-to-current converter configured to generate a second current signal according to the first control signal and the voltage signal.

Abstract: System and methods for generating recommendations based on a determined skill gap are disclosed. A social networking system determines an employment role associated with a particular job listing, wherein the particular job listing has an associated source organization. The social networking system identifies one or more similar members associated with the source organization and having an employment role similar to the determined employment role. The social networking system generates a composite list of skills associated with the one or more similar members. The social networking system compares the skills included in the composite list of skills with a list of skills associated with the particular job listing to determine a list of missing skills.

Abstract: A system and method for determining similar members in an organization is disclosed. In some example embodiments, the social networking system receives a request for a particular job listing from a client system associated with a first member of a social networking system. The social networking system determines a first employment role for a job associated with the particular job listing. The social networking system identifies a source organization for the particular job listing. The social networking system identifies one or more similar members, wherein each identified similar member is associated with the source organization and has an employment role similar to the first employment role. The social networking system communicates the particular job listing and the identified one or more similar members to the client system for display.

Abstract: A system and method for determining likely co-workers for a particular job listing is disclosed. The social networking system receives a request for a particular job listing from a client system associated with a first member of a social networking system. The social networking system determines one or more likely co-workers for a job described in the particular job listing. The social networking system communicates the particular job listing and member information for the determined one or more likely co-workers to the client system for display.

Abstract: Provided herein is a mask inspection device, including an inspection base, a shift platform, a rotating platform, a bearing platform, a laser ranging module, a vertical shift module, a processing module, and an image capturing module. A mask, which is carried and held by the bearing platform, includes a dust-proof film, each region of which is measured by the laser ranging module for generating a distance measuring signal; each distance measuring signal is utilized to control the movement of the vertical shift module, such that image capturing module can take an inspection image of that region. Based on the distance measuring signals and inspection images, height information of the dust-proof film and inspection information can be acquired. Also provided herein is a method applicable to said mask inspection device.

Abstract: A substrate inspection device is provided, which includes a main body, a bearing module, an illuminating and camera module and a control module. A mask is held by the bearing module, which has an opening. The illuminating and image capturing module is disposed on the lifting unit. After receiving the first detecting signal, the control module accordingly drives the lifting unit to shift towards the first direction, such that the illuminating and image capturing module moves closer to the substrate. The control module then controls the shifting unit to drive the light-emitting component to project a first spot-light on the substrate through the opening, and controls the shifting unit to move by a step manner so as to carry the bearing module. The control module also controls the illuminating and image capturing module to capture images the first regions of the substrate and to generate the first images.

Abstract: A mask inspection device and method thereof are provided. In the mask inspection device, an image capturing module is controlled to capture an image of the object to be inspected, and when the captured image does not match a predetermined correction image, a horizontal position of the bearing module which holds the object is adjusted; when the captured image matches the predetermined correction image, a light emission element projects a spot light towards the object, and the image capturing module captures an image in a mask region of the object, so as to produce a mask inspection image. The mask inspection information can be obtained from a two-dimensional image of the mask inspection image, and an abnormal image of the mask inspection image is inspected to generate mask abnormal information.

Abstract: A semiconductor structure includes a device region and a test region. In the device region, first fin spacers cover sidewalls of a first fin structure and have a first height, and a first epitaxy structure is disposed in the first fin structure, which a portion of the first epitaxy structure is above the first fin spacers and having a first width. In the test region, second fin spacers cover sidewalls of the second fin structure and have a second height, and the second height is greater than the first height. A second epitaxy structure is disposed in the second fin structure, and a portion of the second epitaxy structure is above the second fin spacers and having a second width, which the second width is less than the first width.

Abstract: A semiconductor structure and a method of fabricating the semiconductor structure are disclosed herein. The semiconductor structure includes a substrate, a strain-inducing layer and an epitaxy structure. The strain-inducing layer is disposed on the substrate, and the epitaxy structure is embedded in the strain-inducing layer and not in contact with the substrate.