Abstract: A method for link transition in a USB device includes transmitting a plurality of first RS-FEC blocks by a first transmitter, receiving an UNBOND set by a receiver, waking up a second transmitter by a LASM when the receiver receives the UNBOND set, transmitting a training sequence by the second transmitter, transmitting a specific pattern sequence by the second transmitter after finishing transmitting the training sequence, determining whether a current RS-FEC block to be transmitted by the first transmitter is a DESKEW block, stopping transmitting the specific pattern sequence if the current RS-FEC block is determined to be the DESKEW block, and transmitting a plurality of second RS-FEC blocks by the first transmitter and the second transmitter.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a plurality of nanostructures over a substrate, and a gate electrode surrounding the nanostructures. The semiconductor device structure includes a source/drain (S/D) portion adjacent to the gate electrode, and an interlayer dielectric layer adjacent formed over the source/drain portion. The semiconductor device structure includes an etch stop layer adjacent between the source/drain portion and the interlayer dielectric layer, and a protective element adjacent formed over the interlayer dielectric layer.

Abstract: An apparatus, system and method for storing die carriers and transferring a semiconductor die between the die carriers. A die stocker includes a rack enclosure with an integrated sorting system. The rack enclosure includes storage cells configured to receive and store die carriers having different physical configurations. A transport system transports first and second die carriers between a first plurality of storage cells and a first sorter load port, where the transport system introduces the first and second die carriers to a first sorter. The transport system transports third and fourth die carriers between a second plurality of storage cells and a second sorter load port, where the transport system introduces the third and fourth die carriers to a second sorter. The first and second die carriers have a first physical configuration, and the third and fourth die carriers have a second physical configuration, different than the first physical configuration.

Abstract: A method for link transitions in a Universal Serial Bus system includes transmitting a plurality of first RS-FEC blocks by a first transmitter of the USB system, transmitting a training sequence by a second transmitter of the USB system, determining number of sets in a first RS-FEC block which have been transmitted by the first transmitter when the second transmitter completes transmitting the training sequence, generating a specific pattern sequence according to the number of sets in the first RS-FEC block which have been transmitted by the first transmitter and a total number of sets in the first RS-FEC block, and transmitting the specific pattern sequence by the second transmitter.

Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based (CA) radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may be included on the common port of the multi-path RF switch to provide additional impedance matching capability.

Abstract: An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.

Abstract: A device includes a diffraction-based overlay (DBO) mark having an upper-layer pattern disposed over a lower-layer pattern, and having smallest dimension greater than about 5 micrometers. The device further includes a calibration mark having an upper-layer pattern disposed over a lower-layer pattern, positioned substantially at a center of the DBO mark, and having smallest dimension less than about ? the size of the smallest dimension of the DBO mark.

Abstract: A method and an apparatus for measuring linearity of a tested circuit are provided. The method includes: utilizing a signal generator to output a first tone signal and a second tone signal, wherein the tested circuit generates an intermodulation signal according to the first tone signal and the second tone signal; utilizing a signal analyzing device to detect an intermodulation power of the intermodulation signal; utilizing the signal generator to further output a cancel tone signal and control a cancel power of the cancel tone signal according to the intermodulation power; and utilizing the signal analyzing device to detect a total power of the intermodulation signal and the cancel tone signal, and controlling a phase of the cancel tone signal according to the total power, in order to minimize the total power in response to the phase of the cancel tone signal being modified to a target phase.

Abstract: The application provides a multi-phase power converter circuit and a control circuit thereof. The multi-phase power converter circuit receives an input voltage at a voltage input terminal, outputs an output voltage at a voltage output terminal, and includes a power stage circuit. The power stage circuit is coupled to the voltage input terminal and a phase output terminal. The control circuit is coupled to the power stage circuit, the phase output terminal and the voltage output terminal, generates an error signal according to a phase current of the phase output terminal, the output voltage and a reference voltage, generates a compensation signal according to the reference voltage and the error signal, generates a ramp signal according to the error signal, and controls the power stage circuit to operate according to a predetermined duty ratio when the ramp signal crosses the compensation signal, so as to increase the phase current.

Abstract: An ethylene-vinyl alcohol copolymer (EVOH) resin particle composition, an EVOH film formed therefrom, and a multilayer structure containing the same. The EVOH resin particle composition includes: a first EVOH resin particle having a surface valley void volume (Vvv) of 0.00003˜2 ?m3/?m2; and a second EVOH resin particle having a surface valley void volume (Vvv) of 0.00005˜10 ?m3/?m2. This can improve thickness uniformity, oxygen transmission rate and stretchability of the film made by the EVOH resin particle compositions.

Abstract: A method for manufacturing a conductive bridging memory device includes the following steps. First, a bottom electrode is formed on a substrate. Next, a switching layer is formed on the bottom electrode. The switching layer is made of a semiconducting metal oxide and free of gallium. Then, a surface of the switching layer is subjected to an oxygen plasma surface treatment. Afterwards, a blocking layer including a conductive material is formed on the treated surface of the switching layer, and an upper electrode is formed on the blocking layer.

Abstract: A method of synchronization in a training state of Universal Serial Bus (USB) includes sending SLOS1 ordered sets by a transmitter in a LOCK1 state, receiving the SLOS1 ordered sets by a receiver in the LOCK1 state, stopping the transmitter from sending training ordered sets according to a lane adapter state machine (LASM) if the transmitter sends the training ordered sets in the LOCK1 state continuously in an infinite loop. The training ordered sets include the SLOS1 ordered sets. The method further includes sending new SLOS1 ordered sets by the transmitter, receiving the new SLOS1 ordered sets by a receiver, and the transmitter and the receiver entering a LOCK2 state. The length of the new SLOS1 ordered sets is different from the length of the SLOS1 ordered sets.

Abstract: The present disclosure provides a power supply circuit and an undershoot suppression circuit thereof. The undershoot suppression circuit includes a rising edge determination circuit, a falling edge determination circuit and a pulse generation circuit. The rising edge determination circuit detects a difference voltage between an output voltage of the power supply circuit and a reference voltage, and outputs a clock control signal with a first voltage level when the difference voltage is greater than a threshold voltage. The falling edge determination circuit detects the output voltage, and outputs a reset signal with the first voltage level when the output voltage is not smaller than the reference voltage. The pulse generation circuit generates an undershoot suppression pulse according to the clock control signal with the first voltage level and the reset signal with the first voltage level, so that the output voltage approaches the reference voltage.

Abstract: A semiconductor structure according to the present disclosure includes a substrate; a through substrate via (TSV) cell over the substrate; and a TSV extending through the TSV cell and the substrate. The TSV cell includes a guard ring structure extending around a perimeter of the TSV cell, and a buffer zone surrounded by the guard ring. The buffer zone includes first dummy transistors, and second dummy transistors. Each of the first dummy transistors includes two first type epitaxial features, a first plurality of nanostructures extending between the two first type epitaxial features, and a first isolation gate structure wrapping over the first plurality of nanostructures. Each of the second dummy transistors includes two second type epitaxial feature, a second plurality of nanostructures extending between the two first type epitaxial features, and a second isolation gate structure wrapping over the second plurality of nanostructures.

Abstract: Disclosed is a fluid control device for de-vacuuming in a wafer grinding apparatus. The fluid control device has a linear driver which drives a positioning seat to move upward and downward, several drain tubes are respectively disposed in the positioning seat, several flexible covers are respectively attached to each of the drain tubes, a converting seat is disposed on a support frame, and several flow diverters are arranged at intervals on the support frame. Several relay channels are formed within the converting seat and each of the flexible covers corresponds with each of the relay channels individually, the other end of each relay channel communicates with several relay tubes. Each flow diverter is connected to several conveying tubes, and communicates with several conveying tubes correspondingly, whereby the flow is controlled to enter the wafer grinding apparatus between the upper grinding wheel and the wafer subjected to the grinding thereof.

Abstract: The invention encompasses hydrogels, monomer precursors of the hydrogels, methods for the preparation thereof, and methods of use therefor. The linking of monomers can take place using non-radical, bioorthogonal reactions such as copper-free click-chemistry.

Abstract: An ethylene-vinyl alcohol copolymer (EVOH) resin particle composition, an EVOH film formed therefrom, and a multilayer structure containing the same. The EVOH resin particle composition includes: a first EVOH resin particle having a surface core void volume (Vvc) of 0.002˜14 ?m3/?m2; and a second EVOH resin particle having a surface core void volume (Vvc) of 0.010˜48 ?m3/?m2. This can improve the thermoformability of EVOH compositions.

Abstract: A method for forming a semiconductor structure is provided. The method includes forming a semiconductor fin structure including first semiconductor layers and second semiconductor layers alternatingly stacked, laterally recessing the first semiconductor layers of the semiconductor fin structure to form first notches in the first semiconductor layers, forming first passivation layers on first sidewalls of the first semiconductor layers exposed from the first notches, and forming first inner spacer layers in the first notches.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.

Abstract: The present invention provides a method for preparing an activated carbon, which includes impregnating a carbonaceous material with carbonated water; and exposing the carbonaceous material to microwave radiation to produce the activated carbon.