Abstract: Disclosed is a guidance content automatic obtaining and displaying equipment, comprising an illustration data guidance content obtaining device, a illustration data displaying device and a guidance content displaying device in such a manner that, by utilizing a processor, the guidance content is automatically obtained from illustration data of a patent document and is displayed.

Abstract: An interposer substrate is manufactured with a scribe line between adjacent regions. In an embodiment a separate exposure reticle is utilized to pattern the scribe line. The exposure reticle to pattern the scribe line will create an exposure region which overlaps and overhangs the exposure regions utilized to form adjacent regions.

Abstract: An interposer substrate is manufactured with a scribe line between adjacent regions. In an embodiment a separate exposure reticle is utilized to pattern the scribe line. The exposure reticle to pattern the scribe line will create an exposure region which overlaps and overhangs the exposure regions utilized to form adjacent regions.

Abstract: A semiconductor structure includes a semiconductor device, an interconnect structure, a dielectric layer, and a redistribution layer (RDL). The interconnect structure is disposed over the semiconductor device. The dielectric layer is disposed over the interconnect structure. The RDL includes a conductive structure over the dielectric layer and a conductive via extending downwards from the conductive structure and through the dielectric layer. The conductive via includes a bottom portion, a top portion and a tapered portion between the bottom and top portions, in which the tapered portion has a width variation greater than that of the bottom and top portions.

Abstract: A method of forming a semiconductor structure includes the following steps. A dielectric layer is formed over a conductive line. A patterned photoresist layer is formed over the dielectric layer, wherein the patterned photoresist layer has an opening exposing the dielectric layer. The dielectric layer is etched to form a via hole in the dielectric layer using the patterned photoresist layer as an etch mask. The opening of the patterned photoresist layer is laterally expanded. After the opening of the patterned photoresist layer is laterally expanded, the dielectric layer is etched to expand the via hole using the patterned photoresist layer as an etch mask. A conductive via is formed in the expanded via hole.

Abstract: The present disclosure provides a semiconductor structure and a method of manufacturing the semiconductor structure. The semiconductor structure includes a substrate, a plurality of metallic pillars, a plurality of metallic protrusions, a capping layer, and a passivation layer. The metallic pillars are disposed on the substrate. The metallic protrusions extend from an upper surface of the metallic pillars. The capping layer is disposed on the metallic protrusions. The passivation layer is disposed on sidewalls of the protrusions and the capping layer.

Abstract: The present disclosure provides a semiconductor structure and a method of manufacturing the semiconductor structure. The semiconductor structure includes a substrate, a plurality of metallic pillars, a plurality of metallic protrusions, a capping layer, and a passivation layer. The metallic pillars are disposed on the substrate. The metallic protrusions extend from an upper surface of the metallic pillars. The capping layer is disposed on the metallic protrusions. The passivation layer is disposed on sidewalls of the protrusions and the capping layer.

Abstract: A method of forming a semiconductor structure includes the following steps. A dielectric layer is formed over a conductive line. A patterned photoresist layer is formed over the dielectric layer, wherein the patterned photoresist layer has an opening exposing the dielectric layer. The dielectric layer is etched to form a via hole in the dielectric layer using the patterned photoresist layer as an etch mask. The opening of the patterned photoresist layer is laterally expanded. After the opening of the patterned photoresist layer is laterally expanded, the dielectric layer is etched to expand the via hole using the patterned photoresist layer as an etch mask. A conductive via is formed in the expanded via hole.

Abstract: Disclosed is a guidance content automatic obtaining and displaying equipment, comprising an illustration data guidance content obtaining device, a illustration data displaying device and a guidance content displaying device in such a manner that, by utilizing a processor, the guidance content is automatically obtained from illustration data of a patent document and is displayed.

Abstract: An interposer substrate is manufactured with a scribe line between adjacent regions. In an embodiment a separate exposure reticle is utilized to pattern the scribe line. The exposure reticle to pattern the scribe line will create an exposure region which overlaps and overhangs the exposure regions utilized to form adjacent regions.

Abstract: A dust filter barrel includes a sheet filter cylinder, a mesh cylinder and a fixation base. The sheet filter cylinder has two end faces, an inner layer and an outer layer laminated on the inner layer; wherein the inner layer has a plurality of pores having a first pore diameter, the outer layer has a plurality of pores having a second pore diameter, and the second pore diameter is smaller than the first pore diameter. The mesh cylinder is non-contact with the outer layer of the sheet filter cylinder and sleeved outside the sheet filter cylinder and has two end faces. The fixation base has a first and second cover bodies disposed on the two end faces of the sheet filter cylinder and the mesh cylinder respectively, and the second cover body is formed with at least one opening communicated with the sheet filter cylinder.

Abstract: An interposer substrate is manufactured with a scribe line between adjacent regions. In an embodiment a separate exposure reticle is utilized to pattern the scribe line. The exposure reticle to pattern the scribe line will create an exposure region which overlaps and overhangs the exposure regions utilized to form adjacent regions.

Abstract: A real time assay monitoring system and method can be used to monitor reagent volume in assays for fluid replenishment control, monitor assays in real-time to obtain quality control information, monitor assays in real-time during development to detect saturation levels that can be used to shorten assay time, and provide assay results before the assay is complete, enabling reflex testing to begin automatically. The monitoring system can include a real time imaging system with a camera and lights to capture images of the assay. The captured images can then be used to monitor and control the quality of the staining process in an assay, provide early assay results, and/or to measure the on-site reagent volume within the assay.

Abstract: A method of forming fine line patterns of semiconductor devices includes: forming a plurality of linear core structures on at least one hard mask layer disposed on a target layer; forming first spacers on sidewalls of the linear core structures; removing the linear core structures; forming second spacers on sidewalls of the first spacers; etching exposed portions of the hard mask layer exposed by the first spacers and the second spacers; and removing the first spacers and the second spacers.

Abstract: A method of forming fine island patterns of semiconductor devices includes: forming a plurality of first mask pillars on a hard mask layer on a substrate; forming an upper buffer mask layer on the hard mask layer to cover the first mask pillars; patterning a plurality of islands in the upper buffer mask layer; separating each of the islands into a plurality of sub-islands; etching the upper buffer mask layer to form a plurality of second mask pillars on the hard mask layer; etching an exposed portion of the hard mask layer exposed by the first mask pillars and the second mask pillars until portions of the substrate are etched; and removing the first mask pillars, the second mask pillars, and remaining portions of the hard mask layer.

Abstract: The present invention provides an integrated circuit. The integrated circuit comprises: a plurality of core power sources; and a plurality of core power domains, coupled to the core power sources, respectively; wherein the core power domains are overlapped with each other.

Abstract: A dust filter barrel includes a sheet filter cylinder, a mesh cylinder and a fixation base. The sheet filter cylinder has two end faces, an inner layer and an outer layer laminated on the inner layer; wherein the inner layer has a plurality of pores having a first pore diameter, the outer layer has a plurality of pores having a second pore diameter, and the second pore diameter is smaller than the first pore diameter. The mesh cylinder is non-contact with the outer layer of the sheet filter cylinder and sleeved outside the sheet filter cylinder and has two end faces. The fixation base has a first and second cover bodies disposed on the two end faces of the sheet filter cylinder and the mesh cylinder respectively, and the second cover body is formed with at least one opening communicated with the sheet filter cylinder.

Abstract: A dust filter barrel includes a sheet filter cylinder, a mesh cylinder and a fixation base. The sheet filter cylinder has two end faces, an inner layer and an outer layer laminated on the inner layer; wherein the inner layer has a plurality of pores having a first pore diameter, the outer layer has a plurality of pores having a second pore diameter, and the second pore diameter is smaller than the first pore diameter. The mesh cylinder is non-contact with the outer layer of the sheet filter cylinder and sleeved outside the sheet filter cylinder and has two end faces. The fixation base has a first and second cover bodies disposed on the two end faces of the sheet filter cylinder and the mesh cylinder respectively, and the second cover body is formed with at least one opening communicated with the sheet filter cylinder.

Abstract: A control circuit and a method for maintaining light transmittance of an electrochromic device are revealed. An input power source is turned off once a current input into an electrochromic device is decreased to a preset value. Then a voltage between two electrodes of the electrochromic device is detected. When the voltage between two electrodes of the electrochromic device is dropped to a preset value, the input power source is restored. According to the above steps, the coloration of the electrochromic device is maintained within a preset range. Thus light transmittance of the electrochromic device is kept at a certain range.

Abstract: A control circuit and a method for maintaining light transmittance of an electrochromic device are revealed. An input power source is turned off once a current input into an electrochromic device is decreased to a preset value. Then a voltage between two electrodes of the electrochromic device is detected. When the voltage between two electrodes of the electrochromic device is dropped to a preset value, the input power source is restored. According to the above steps, the coloration of the electrochromic device is maintained within a preset range. Thus light transmittance of the electrochromic device is kept at a certain range.