Patents by Inventor Chih-hao Chen

Chih-hao Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11705381
    Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: July 18, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hao Chen, Hung-Yu Chen, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Patent number: 11699597
    Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a semiconductor die, conductive through vias, an insulating encapsulant, and a redistribution structure. The conductive through vias are electrically coupled to the semiconductor die. The insulating encapsulant laterally encapsulates the semiconductor die and the conductive through vias, wherein the insulating encapsulant has a recess ring surrounding the semiconductor die, the conductive through vias are located under the recess ring, and a vertical projection of each of the conductive through vias overlaps with a vertical projection of the recess ring. The redistribution structure is electrically connected to the semiconductor die and the conductive through vias.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: July 11, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Hui Cheng, Szu-Wei Lu, Ping-Yin Hsieh, Chih-Hao Chen
  • Publication number: 20230215804
    Abstract: A method of making a semiconductor device includes electrically connecting a component to a first side of a first fuse, wherein the first fuse is a first distance from the component. The method further includes electrically connecting the component to a first side of a second fuse, wherein the second fuse is a second distance from the component, and the second distance is different than the first distance. The method further includes electrically connecting a second side of the second fuse to a dummy vertical interconnect segment.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 6, 2023
    Inventors: Meng-Sheng CHANG, Shao-Yu CHOU, Po-Hsiang HUANG, An-Jiao FU, Chih-Hao CHEN
  • Publication number: 20230197904
    Abstract: A light-emitting device includes a substrate including a top surface, a first side surface and a second side surface, wherein the first side surface and the second side surface of the substrate are respectively connected to two opposite sides of the top surface of the substrate; a semiconductor stack formed on the top surface of the substrate, the semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electrode pad formed adjacent to a first edge of the light-emitting device; and a second electrode pad formed adjacent to a second edge of the light-emitting device, wherein in a top view of the light-emitting device, the first edge and the second edge are formed on different sides or opposite sides of the light-emitting device, the first semiconductor layer adjacent to the first edge includes a first sidewall directly connected to the first side surface of the substrate,
    Type: Application
    Filed: February 23, 2023
    Publication date: June 22, 2023
    Inventors: Chao-Hsing CHEN, Cheng-Lin LU, Chih-Hao CHEN, Chi-Shiang HSU, I-Lun MA, Meng-Hsiang HONG, Hsin-Ying WANG, Kuo-Ching HUNG, Yi-Hung LIN
  • Patent number: 11664286
    Abstract: A method for forming a package structure is provided. The method for forming a package structure includes bonding a package component to a first surface of a substrate through a plurality of first connectors. The package component includes a first semiconductor die and a second semiconductor die. The method also includes forming a dam structure over the first surface of the substrate. The dam structure is around and separated from the package component, and a top surface of the dam structure is higher than a top surface of the package component. The method further includes forming an underfill layer between the dam structure and the package component. In addition, the method includes removing the dam structure after the underfill layer is formed.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: May 30, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Hao Chen, Chih-Chien Pan, Li-Hui Cheng, Chin-Fu Kao, Szu-Wei Lu
  • Publication number: 20230154760
    Abstract: A method for reducing wiggling in a line includes forming a silicon patterning layer over a substrate and depositing a mask layer over the silicon patterning layer. The mask layer is patterned to form one or more openings therein. The mask layer is thinned and the one or more openings are widened, to provide a smaller height-to-width ratio. The pattern of the mask layer is then used to pattern the silicon patterning layer. The silicon patterning layer is used, in turn, to pattern a target layer where a metal line will be formed.
    Type: Application
    Filed: January 18, 2023
    Publication date: May 18, 2023
    Inventors: Jiann-Horng Lin, Cheng-Li Fan, Chih-Hao Chen
  • Patent number: 11652049
    Abstract: A method includes forming a first etch stop layer (ESL) over a conductive feature, forming a first dielectric layer on the first ESL, forming a second ESL on the first dielectric layer, forming a second dielectric layer on the second ESL, forming a trench in the second dielectric layer, forming a first opening in a bottom surface of the trench extending through the second dielectric layer, and forming a second opening in a bottom surface of the first opening. The second opening extends through the first dielectric layer and the first ESL. The second opening exposes a top surface of the conductive feature. The method further includes widening the first opening to a second width, filling the trench with a conductive material to form a conductive line, and filling the second opening and the first opening with the conductive material to form a conductive via.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: May 16, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Chih Huang, Li-An Sun, Che-En Tsai, Yu-Lin Chiang, Chung Chuan Huang, Chih-Hao Chen
  • Publication number: 20230135799
    Abstract: A light-emitting device includes a first semiconductor layer; a semiconductor pillar formed on the first semiconductor layer, including a second semiconductor layer and an active layer, wherein the semiconductor pillar comprises an outmost periphery; a first contact layer formed on the first semiconductor layer and including a first contact portion and a first extending portion, wherein the first extending portion continuously surrounds an entirety of the outmost periphery of the semiconductor pillar and the first contact portion; a second contact layer formed on the second semiconductor layer; a first insulating layer including multiple first openings exposing the first contact layer and multiple second openings exposing the second contact layer; a first electrode contact layer connected to the first contact portion through the multiple first openings and covering all of the first contact layer; a second electrode contact layer connected to the second contact layer through the multiple second openings.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 4, 2023
    Inventors: Aurelien GAUTHIER-BRUN, Chao-Hsing CHEN, Chang-Tai HSAIO, Chih-Hao CHEN, Chi-Shiang HSU, Jia-Kuen WANG, Yung-Hsiang LIN
  • Patent number: 11641005
    Abstract: A method of manufacturing a light-emitting element includes: providing a substrate, wherein the substrate includes a top surface with a first area and a second area; introducing a semiconductor material to form a first layer on the first area and a second layer on the second area, wherein the first layer includes a first crystal quality and the second layer includes a second crystal quality, the first crystal quality is different from the second crystal quality; and dicing the substrate along the second area.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: May 2, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Yi-Lun Chou, Chih-Hao Chen
  • Patent number: 11631555
    Abstract: A keyboard device includes a substrate, a keycap on the substrate, a first link member connected between the substrate and the keycap and is adjacent to the first side portion of the keycap, and a second link member connected between the substrate and the keycap and is adjacent to the second side portion of the keycap. The two first short swing arms of the first link member are respectively connected to two ends of the first pivot arm of the first link member. A length of each first short swing arm is less than half of a length of the first pivot arm. The two second short swing arms of the second link member are respectively connected to two ends of the second pivot arm of the second link member. A length of each second short swing arm is less than half of a length of the second pivot arm.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: April 18, 2023
    Assignee: CHICONY ELECTRONICS CO., LTD.
    Inventors: Mitsuo Horiuchi, He-Kai Zhang, Chih-Hao Chen
  • Patent number: 11626368
    Abstract: A method of making a semiconductor device includes operations directed toward electrically connecting a component to a first fuse, wherein the first fuse is on a first conductive level a first distance from the component; identifying a conductive element for omission between the first fuse and a second fuse; and electrically connecting the component to the second fuse, wherein the second fuse is on a second conductive level a second distance from the component, the second distance is greater than the first distance, and the electrically connecting the component to the second fuse comprises electrically connecting the component to the second fuse without forming the identified conductive element.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: April 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Sheng Chang, Shao-Yu Chou, Po-Hsiang Huang, An-Jiao Fu, Chih-Hao Chen
  • Patent number: 11626344
    Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The adhesive pattern at least overlay the underfill layer between the first die and the second die group. The TIM has a bottom surface being in direct contact with the first die, the second die group, and the adhesive pattern. The adhesive pattern separates the underfill layer from the TIM.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: April 11, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu, Chih-Chien Pan
  • Patent number: 11626292
    Abstract: In a pattern formation method, a photo resist pattern is formed over a target layer to be patterned. An extension material layer is formed on the photo resist pattern. The target layer is patterned by using at least the extension material layer as an etching mask.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: April 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Chang Lee, Jiann-Horng Lin, Chih-Hao Chen, Ying-Hao Wu, Wen-Yen Chen, Shih-Hua Tseng, Shu-Huei Suen
  • Publication number: 20230108160
    Abstract: A light-emitting device is provided. The light-emitting device includes a control part, a light-emitting part, a first electrode, and a second electrode. The control part includes a first semiconductor stack having a two-dimensional gas therein. The light-emitting part includes a second semiconductor stack. The first electrode electrically connects the control part and the light-emitting part. The second electrode electrically connects the control part and the light-emitting part. The control part and the light-emitting part are electrically connected in parallel through the first electrode and the second electrode.
    Type: Application
    Filed: September 28, 2022
    Publication date: April 6, 2023
    Inventors: Chih-Hao CHEN, Chiao FU, Yi-Ru SHEN
  • Patent number: 11621374
    Abstract: A light-emitting device includes a substrate including a top surface, a first side surface and a second side surface, wherein the first side surface and the second side surface of the substrate are respectively connected to two opposite sides of the top surface of the substrate; a semiconductor stack formed on the top surface of the substrate, the semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electrode pad formed adjacent to a first edge of the light-emitting device; and a second electrode pad formed adjacent to a second edge of the light-emitting device, wherein in a top view of the light-emitting device, the first edge and the second edge are formed on different sides or opposite sides of the light-emitting device, the first semiconductor layer adjacent to the first edge includes a first sidewall directly connected to the first side surface of the substrate,
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 4, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Cheng-Lin Lu, Chih-Hao Chen, Chi-Shiang Hsu, I-Lun Ma, Meng-Hsiang Hong, Hsin-Ying Wang, Kuo-Ching Hung, Yi-Hung Lin
  • Publication number: 20230097801
    Abstract: Disclosed are methods for treatments of conditions involving CD47 upregulation using a compound of formula (I): Variables R1-R9, X, and Het are defined therein. Also disclosed are methods for increasing phagocytosis of a cell using such a compound and pharmaceutical compositions each containing the compound and an anti-cancer agent.
    Type: Application
    Filed: June 1, 2022
    Publication date: March 30, 2023
    Inventors: Chih-Hao Chen, Wan-Ching Yen, Teng-Kuang Yeh, Chiung-Tong Chen, Hwei-Jiung Wang, Kai-Fa Huang
  • Patent number: 11604518
    Abstract: A tactile-adjustable keyboard includes plural keyswitches, an adjustment frame and a hybrid operation button. The adjustment frame is disposed corresponding to the keyswitches to move and interfere at least one of the keyswitches. The hybrid operation button includes a tactile switch, a non-tactile knob disposed at least partially surrounding the tactile switch, and a lens disposed at least partially surrounding the non-tactile knob. The tactile switch includes a switch shaft and a switch bar. The switch shaft is disposed in rotatable connection with the adjustment frame to move the adjustment frame. The switch bar extends externally from the switch shaft. A tactile feedback of said one keyswitch changes in response to the rotation of the tactile switch, while a non-tactile signal is generated in response to the rotation of the non-tactile knob, and the lens is illuminated in response to the rotation of the tactile switch.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: March 14, 2023
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Chen Yang, Chih-Yao Chi, Shao Lun Hsiao, Chih-Hao Chen
  • Publication number: 20230065884
    Abstract: A package structure includes a first semiconductor die, a first insulating encapsulation, a thermal coupling structure, and a heat dissipating component thermally coupled to the first semiconductor die through the thermal coupling structure. The first semiconductor die includes an active side, a rear side, and a sidewall connected to the active side and the rear side. The first insulating encapsulation extends along the sidewall of the first semiconductor die and includes a first side substantially leveled with the active side, a second side opposite to the first side, and topographic features at the second side. The thermal coupling structure includes a metallic layer overlying and the rear side of the first semiconductor die and the topographic features of the first insulating encapsulation. A manufacturing method of a package structure is also provided.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Po-Yuan Cheng, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Patent number: 11594419
    Abstract: A method for reducing wiggling in a line includes forming a silicon patterning layer over a substrate and depositing a mask layer over the silicon patterning layer. The mask layer is patterned to form one or more openings therein. The mask layer is thinned and the one or more openings are widened, to provide a smaller height-to-width ratio. The pattern of the mask layer is then used to pattern the silicon patterning layer. The silicon patterning layer is used, in turn, to pattern a target layer where a metal line will be formed.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: February 28, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jiann-Horng Lin, Cheng-Li Fan, Chih-Hao Chen
  • Patent number: 11586068
    Abstract: A display apparatus includes a backlight source, a privacy filter disposed on the backlight source, a light adjusting panel disposed on the privacy filter, and a display panel disposed on the light adjusting panel. The light adjusting panel includes a first substrate, a first electrode, a second electrode, a first vertical alignment film disposed on the first substrate, a second substrate disposed opposite to the first substrate, a second vertical alignment film disposed on the second substrate, and a positive liquid crystal layer disposed between the first vertical alignment film and the second vertical alignment film. The first electrode and the second electrode are disposed on the first substrate. Here, the first electrode has a plurality of first slits, and a plurality of orthogonal projections of the first slits on the first substrate overlap an orthogonal projection of the second electrode on the first substrate.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: February 21, 2023
    Assignee: Au Optronics Corporation
    Inventors: Min-Hsuan Chiu, Chih-Hao Chen, Seok-Lyul Lee, Syuan-Ling Yang