Patents by Inventor Chih Hsueh

Chih Hsueh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9381509
    Abstract: The present invention provides methods and designs of enclosed-channel reactor system for manufacturing catalysts or supports. Both of the configuration designs force the gaseous precursors and purge gas flow through the channel surface of reactor. The precursors will transform to thin film or particle catalysts or supports under adequate reaction temperature, working pressure and gas concentration. The reactor body is either sealed or enclosed for isolation from atmosphere. Another method using super ALD cycles is also proposed to grow alloy catalysts or supports with controllable concentration. The catalysts prepared by the method and system in the present invention are noble metals, such as platinum, palladium, rhodium, ruthenium, iridium and osmium, or transition metals such as iron, silver, cobalt, nickel and tin, while supports are silicon oxide, aluminum oxide, zirconium oxide, cerium oxide or magnesium oxide, or refractory metals, which can be chromium, molybdenum, tungsten or tantalum.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: July 5, 2016
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Chi-Chung Kei, Bo-Heng Liu, Chien-Pao Lin, Chien-Nan Hsiao, Yang-Chih Hsueh, Tsong-Pyng Perng
  • Patent number: 9046393
    Abstract: A method is provided for measuring remaining hydrogen capacity of hydrogen storage canister incorporating tag information. An information identification tag is attached to a hydrogen storage canister. The information identification tag contains therein at least one record of tag information indicating the hydrogen storage quantity of the hydrogen storage canister. Once the hydrogen storage quantity is read from the tag information of the information identification tag and hydrogen consumption quantity supplied from the hydrogen storage canister is detected, the hydrogen storage quantity is operated by subtracting the hydrogen consumption quantity therefrom to calculate a hydrogen residue, which is then used to update the tag information of the information identification tag or is stored for subsequent use.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: June 2, 2015
    Assignee: ASIA PACIFIC FUEL CELL TECHNOLOGIES, LTD.
    Inventors: Jefferson YS Yang, Feng-Hsiang Hsiao, Hong-Shi Chang, Chih-Hsueh Chen
  • Publication number: 20150054174
    Abstract: An interconnection structure and method disclosed for providing an interconnection structure that includes conductive features having reduced topographic variations. The interconnection structure includes a contact pad disposed over a substrate. The contact pad includes a first layer of a first conductive material and a second layer of a second conductive material over the first layer. The first conductive material and the second conductive material are made of substantially the same material and have a first average grain size and a second average grain size that is smaller than the first average grain size. The interconnection structure also includes a passivation layer covering the substrate and the contact pad, and the passivation layer has an opening exposing the contact pad.
    Type: Application
    Filed: October 9, 2014
    Publication date: February 26, 2015
    Inventors: Hsiao Yun Lo, Yung-Chi Lin, Yang-Chih Hsueh, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Patent number: 8944119
    Abstract: A method and system of gas refilling management for gas storage canister utilizing identification accessing control includes an identification information transmission device, a control device, and a gas refilling equipment, which are applicable for management of refilling of at least one storage canister. The storage canister is provided with an information identification label, which contains at least one record of canister information. By using the identification information transmission device to first read the information contained in the label of a storage canister, the control device may then set a refilling condition based on which the gas refilling equipment carries out a refilling operation to the storage canister, so as to suit for management of refilling various types of gas storage canisters to provide the best performance in a practical application.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: February 3, 2015
    Assignee: Asia Pacific Fuel Cell Technologies Ltd.
    Inventors: Jefferson Ys Yang, Feng-Hsiang Hsiao, Hong-Shi Chang, Chih-Hsueh Chen
  • Publication number: 20140140904
    Abstract: The present invention provides methods and designs of enclosed-channel reactor system for manufacturing catalysts or supports. Both of the configuration designs force the gaseous precursors and purge gas flow through the channel surface of reactor. The precursors will transform to thin film or particle catalysts or supports under adequate reaction temperature, working pressure and gas concentration. The reactor body is either sealed or enclosed for isolation from atmosphere. Another method using super ALD cycles is also proposed to grow alloy catalysts or supports with controllable concentration. The catalysts prepared by the method and system in the present invention are noble metals, such as platinum, palladium, rhodium, ruthenium, iridium and osmium, or transition metals such as iron, silver, cobalt, nickel and tin, while supports are silicon oxide, aluminum oxide, zirconium oxide, cerium oxide or magnesium oxide, or refractory metals, which can be chromium, molybdenum, tungsten or tantalum.
    Type: Application
    Filed: July 23, 2013
    Publication date: May 22, 2014
    Applicant: National Applied Research Laboratories
    Inventors: Chi-Chung Kei, Bo-Heng Liu, Chien-Pao Lin, Chien-Nan Hsiao, Yang-Chih Hsueh, Tsong-Pyng Perng
  • Publication number: 20120255770
    Abstract: A method for fabricating a carrier is disclosed, wherein the carrier is applied for a microelectromechanical sensing device. The method includes the steps of: providing a first substrate, wherein the first substrate includes a first metal layer, a first dielectric layer, and a first opening; providing a second substrate, wherein the second substrate includes a second metal layer, a second dielectric layer, and a second opening; providing a reticular element; pressing the first substrate, the reticular element, and the second substrate to form a composite substrate, wherein the first opening and the second opening form a hole, and the reticular element is positioned in the hole; and forming at least one conductive via in the composite substrate.
    Type: Application
    Filed: February 10, 2012
    Publication date: October 11, 2012
    Inventors: Han-Pei Huang, Yu-Ying Chao, Chih-Hsueh Shih
  • Patent number: 8261006
    Abstract: Systems and methods for improving the performance and reliability of flash memory solid state drive devices are described herein. A flash memory array component stores data. A memory hierarchy component transfers data between the host and the flash memory array component. The memory hierarchy component includes a level one (“L1”) cache coupled to a merge buffer, the flash memory array component, and the host. The merge buffer is coupled to the flash memory array component. The L1 cache and merge buffer include volatile memory, and the host is coupled to the merge buffer and flash memory array component. The memory hierarchy component includes a write component and a read component. The write component writes data to at least one of the L1 cache, merge buffer, or flash memory array component. The read component reads data from at least one of the L1 cache, merge buffer, or flash memory array component.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: September 4, 2012
    Assignee: Spansion LLC
    Inventors: Richard Chen, Ping Hou, Chih Hsueh
  • Publication number: 20120169315
    Abstract: Control method and power controller suitable for a switched mode power supply with a power switch are provided. An ON time of the power switch is recorded. An estimated OFF time is provided based on the ON time. The estimated OFF time is in positive correlation with the ON time. The power switch is turned ON after the elapse of the estimated OFF time.
    Type: Application
    Filed: June 2, 2011
    Publication date: July 5, 2012
    Applicant: SHAMROCK MICRO DEVICES CORP.
    Inventors: Chien-Liang Lin, Chih-Hsueh Hsu
  • Publication number: 20110227742
    Abstract: A method is provided for measuring remaining hydrogen capacity of hydrogen storage canister incorporating tag information. An information identification tag is attached to a hydrogen storage canister. The information identification tag contains therein at least one record of tag information indicating the hydrogen storage quantity of the hydrogen storage canister. Once the hydrogen storage quantity is read from the tag information of the information identification tag and hydrogen consumption quantity supplied from the hydrogen storage canister is detected, the hydrogen storage quantity is operated by subtracting the hydrogen consumption quantity therefrom to calculate a hydrogen residue, which is then used to update the tag information of the information identification tag or is stored for subsequent use.
    Type: Application
    Filed: December 22, 2010
    Publication date: September 22, 2011
    Applicant: ASIA PACIFIC FUEL CELL TECHNOLOGIES LTD.
    Inventors: JEFFERSON YS YANG, FENG-HSIANG HSIAO, HONG-SHI CHANG, CHIH-HSUEH CHEN
  • Publication number: 20110226382
    Abstract: A method and system of gas refilling management for gas storage canister utilizing identification accessing control includes an identification information transmission device, a control device, and a gas refilling equipment, which are applicable for management of refilling of at least one storage canister. The storage canister is provided with an information identification label, which contains at least one record of canister information. By using the identification information transmission device to first read the information contained in the label of a storage canister, the control device may then set a refilling condition based on which the gas refilling equipment carries out a refilling operation to the storage canister, so as to suit for management of refilling various types of gas storage canisters to provide the best performance in a practical application.
    Type: Application
    Filed: December 22, 2010
    Publication date: September 22, 2011
    Applicant: ASIA PACIFIC FUEL CELL TECHNOLOGIES LTD.
    Inventors: JEFFERSON YS YANG, FENG-HSIANG HSIAO, HONG-SHI CHANG, CHIH-HSUEH CHEN
  • Publication number: 20100237877
    Abstract: A system open testing method is provided. Firstly, a system to be tested having at least an ESD protection unit, a signal input pad, a first voltage level end, and a second voltage level end is provided, wherein the first voltage level end and the second voltage level end are utilized for accessing electric power, the ESD protection unit has one end coupled to the signal input pad and the other end coupled to the first voltage level end. Afterward, a diode is connected to the signal input pad, and the conducting direction of the diode is opposite to that of the interior diode in the ESD circuit. Thereafter, a testing signal is send through the diode to the system.
    Type: Application
    Filed: August 31, 2009
    Publication date: September 23, 2010
    Applicant: NIKO SEMICONDUCTOR CO., LTD.
    Inventor: CHIH HSUEH HSU
  • Patent number: 7777267
    Abstract: The manufacturing method of a nonvolatile memory and its structure is achieved by building a gate dielectric layer on a base. The gate dielectric contains at least two layers of different material layers. At least one hetero element is planted on the top of the gate dielectric layer so as to increase the electronic trap density. Then rebuild a new top material after removing the upmost layer of material. Finally, build a gate electrode layer on the gate dielectric layer and form source/drain electrodes at the bases of both sides of the gate dielectric layer. In this invention, with the planting of the hetero element, it will form traps in the gate dielectric layer that can catch electrons more easily. Thus, the electrons won't combine together with the increase of operation time. The storage time can be effectively extended and the problem of the combination of bites can be solved.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: August 17, 2010
    Inventors: Erik S Jeng, Wu-Ching Chou, Chih-Hsueh Hung, Chien-Cheng Li
  • Patent number: 7761740
    Abstract: Systems and/or methods that provide for the accuracy of address translations in a memory system that decouples the system address from the physical address. Address-modifying transactions are recorded in a non-volatile write buffer to couple the last-in-time translation physical address/location with the current translated physical location/address. In addition, integrity check protection may be applied to the translation and to the written data to limit the amount of data that may be lost in the event of a failure/error occurring during the write operation. Transaction recording and integrity check protection allows for recovery of write operations that may not have fully completed due to the failure/error.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: July 20, 2010
    Assignee: Spansion LLC
    Inventors: Wiliam Kern, Chih Hsueh, Ping Hou
  • Publication number: 20090164700
    Abstract: Systems and methods for improving the performance and reliability of flash memory solid state drive devices are described herein. A flash memory array component stores data. A memory hierarchy component transfers data between the host and the flash memory array component. The memory hierarchy component includes a level one (“L1”) cache coupled to a merge buffer, the flash memory array component, and the host. The merge buffer is coupled to the flash memory array component. The L1 cache and merge buffer include volatile memory, and the host is coupled to the merge buffer and flash memory array component. The memory hierarchy component includes a write component and a read component. The write component writes data to at least one of the L1 cache, merge buffer, or flash memory array component. The read component reads data from at least one of the L1 cache, merge buffer, or flash memory array component.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 25, 2009
    Applicant: SPANSION LLC
    Inventors: Richard Chen, Ping Hou, Chih Hsueh
  • Publication number: 20090158085
    Abstract: Systems and/or methods that provide for the accuracy of address translations in a memory system that decouples the system address from the physical address. Address-modifying transactions are recorded in a non-volatile write buffer to couple the last-in-time translation physical address/location with the current translated physical location/address. In addition, integrity check protection may be applied to the translation and to the written data to limit the amount of data that may be lost in the event of a failure/error occurring during the write operation. Transaction recording and integrity check protection allows for recovery of write operations that may not have fully completed due to the failure/error.
    Type: Application
    Filed: December 13, 2007
    Publication date: June 18, 2009
    Applicant: SPANSION LLC
    Inventors: William Kern, Chih Hsueh, Ping Hou
  • Publication number: 20080150048
    Abstract: The manufacturing method of a nonvolatile memory and its structure is achieved by building a gate dielectric layer on a base. The gate dielectric contains at least two layers of different material layers. At least one hetero element is planted on the top of the gate dielectric layer so as to increase the electronic trap density. Then rebuild a new top material after removing the upmost layer of4terial. Finally, build a gate electrode layer on the gate dielectric layer and form source/drain electrodes at the bases of both sides of the gate dielectric layer. In this invention, with the planting of the hetero element, it will form traps in the gate dielectric layer that can catch electrons more easily. Thus, the electrons won't combine together with the increase of operation time. The storage time can be effectively extended and the problem of the combination of bites can be solved.
    Type: Application
    Filed: January 3, 2008
    Publication date: June 26, 2008
    Applicant: CHUNG YUAN CHRISTIAN UNIVERSITY
    Inventors: Erik S. Jeng, Wu-Ching Chou, Chih-Hsueh Hung, Chien-Cheng Li
  • Patent number: 7328836
    Abstract: A smart-tag housing and method for securing a dedicated data card affixed to a SMIF-pod. A molded housing package for holding a data card for communication with a two-way receiver/transmitter mounted on a workstation, the smart-tag is a small battery operated microcomputer with an LCD for a two-way electro-magnetic communications. The smart-tag housing includes a battery compartment, a battery compartment cover. A retaining plate is affixed to a side of the pod using double-sided adhesive tape. The smart-tag is demountably secured to the retaining plate with a slidable self locking plate. The self locking plate is unlocked with a key that is provided only to authorized personnel.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: February 12, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Chih Hsueh, Ying-Cheng Chen
  • Publication number: 20050198092
    Abstract: An FFT circuit is implemented using a radix-4 butterfly element and a partitioned memory for storage of a prescribed number of data values. The radix-4 butterfly element is configured for performing an FFT operation in a prescribed number of stages, each stage including a prescribed number of in-place computation operations relative to the prescribed number of data values. The partitioned memory includes a first memory portion and a second memory portion, and the data values for the FFT circuit are divided equally for storage in the first and second memory portions in a manner that ensures that each in-place computation operation is based on retrieval of an equal number of data values retrieved from each of the first and second memory portions.
    Type: Application
    Filed: March 2, 2004
    Publication date: September 8, 2005
    Inventors: Jia-Pei Shen, Chien-Meen Hwang, Chih Hsueh, Orlando Canelones
  • Publication number: 20050167492
    Abstract: A smart-tag housing and method for securing a dedicated data card affixed to a SMIF-pod. A molded housing package for holding a data card for communication with a two-way receiver/transmitter mounted on a workstation, the smart-tag is a small battery operated microcomputer with an LCD for a two-way electromagnetic communications. The smart-tag housing includes a battery compartment, a battery compartment cover. A retaining plate is affixed to a side of the pod using double-sided adhesive tape. The smart-tag is demountably secured to the retaining plate with a slidable self locking plate. The self locking plate is unlocked with a key that is provided only to authorized personnel.
    Type: Application
    Filed: February 3, 2004
    Publication date: August 4, 2005
    Inventors: Tsung-Chih Hsueh, Ying-Cheng Chen
  • Publication number: 20050156228
    Abstract: The manufacturing method of a nonvolatile memory and its structure is achieved by building a gate dielectric layer on a base. The gate dielectric layer contains at least two layers of different material layers. At least one hetero element is planted on the top of the gate dielectric layer so as to increase the electronic trap density. Then rebuild a new top material after removing the upmost layer of material. Finally, build a gate electrode layer on the gate dielectric layer and form source/drain electrodes at the bases of both sides of the gate dielectric layer. In this invention, with the planting of the hetero element, it will form traps in the gate dielectric layer that can catch electrons more easily. Thus, the electrons won't combine together with the increase of operation time. The storage time can be effectively extended and the problem of the combination of bites can be solved.
    Type: Application
    Filed: January 16, 2004
    Publication date: July 21, 2005
    Inventors: Erik Jeng, Wu-Ching Chou, Chih-Hsueh Hung, Chien-Cheng Li