Abstract: A semiconductor device includes a semiconductor substrate; a gate dielectric layer disposed on the semiconductor substrate; a gate conductive layer doped with impurities selected from nitrogen, carbon, silicon, germanium, fluorine, oxygen, helium, neon, xenon or a combination thereof on the gate dielectric layer; and source/drain doped regions formed adjacent to the gate conductive layer in the semiconductor substrate, wherein the source and drain doped regions are substantially free of the impurities doped into the gate conductive layer. These impurities reduce the diffusion rates of the N-type of P-type dopants in the gate conductive layer, thereby improving the device performance.

Abstract: Devices and methods for DC and SLT (system level test) integration are disclosed. The DC circuit and the SLT circuit are integrated into the same device. Therefore, the DUT (device under testing) can precede the SLT before the FT (final test) when the DUT passes the DC.

Abstract: In the present invention, a feeding apparatus comprising a plurality of feeding mechanisms is provided. The feeding apparatus comprises a power source, a base, a rotating axle, a plurality of feeding mechanisms, a plurality of connecting units and a plurality of fixing units. The power source is driven to rotate the rotating axle, and then the feeding mechanisms are rotated by the rotating axle to proceed feeding process. In addition, the rotation of each of the feeding mechanisms is controlled by the connecting units and the fixing units. However, the feeding mechanisms can be rotated together or individually to proceed feeding process. Therefore, the production capacity is increased by the feeding apparatus, as well as the cost is reduced by decreasing power needed.

Abstract: The present invention discloses an electronic testing apparatus, which includes multiple test areas, each area possesses respective pick and place module. The apparatus includes multiple shuttles located between the test area and input/output trays. Moreover, a further pick and place module is utilized, between the shuttles and the input/output trays, for picking and placing the devices under test or tested device.

Abstract: A low loss DC/DC converter uses the reset technique to reset the magnetizing current from the forward transformer during the OFF period, reducing voltage stress and extend the maximum work duty. The third winding reset circuit is an improved version of a conventional third winding reset circuit for a forward converter.

Abstract: A low loss DC/DC converter uses the reset technique to reset the magnetizing current from the forward transformer during the OFF period, reducing voltage stress and extend the maximum work duty.