Patents by Inventor Chih-Kuang Yang

Chih-Kuang Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120107745
    Abstract: Disclosed is a via structure in a multi-layer substrate, comprising a first metal layer, a dielectric layer and a second metal layer. The first metal layer has an upper surface. The dielectric layer covers the first metal layer in which a via is opened to expose the upper surface. The second metal layer is formed in the via and contacts an upper surface and an inclined wall of the via. A contacting surface of the second metal layer has a top line lower than the upper edge of the inclined wall. Alternatively, the second metal layer can be formed on the dielectric layer as being a metal line simultaneously as formed in the via as being a pad. The metal line and the pad are connected electronically. The aforesaid metal second layer can be formed in the via and on the dielectric layer by a metal lift-off process.
    Type: Application
    Filed: January 7, 2012
    Publication date: May 3, 2012
    Applicant: Princo Corp.
    Inventor: CHIH-KUANG YANG
  • Patent number: 8111519
    Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: February 7, 2012
    Assignee: Princo Corp.
    Inventor: Chih-kuang Yang
  • Publication number: 20120007254
    Abstract: Disclosed is a multi-layer via structure, comprising a metal layer, a first via metal layer formed on a first open of a first dielectric layer and a second via metal layer formed on a second open of a second dielectric layer. The first and second via metal layers comprise first and second bottoms, first and second top portions, first and second inclined walls, respectively. The first and second inclined walls comprise first and second top edges, first and second bottom edges respectively. The second top edge has a point closest to a geometric center of the first bottom. A vertical projection of the point falls on the first inclined wall. Alternatively, a point of the second bottom edge, which is closest to the geometric center, has a vertical projection. The vertical projection is vertical to the metal layer and falls on the first inclined wall.
    Type: Application
    Filed: April 22, 2011
    Publication date: January 12, 2012
    Applicant: Princo Corp.
    Inventor: Chih-kuang YANG
  • Patent number: 8051557
    Abstract: The invention provides a substrate with multi-layer interconnection structure, which includes a substrate and a multi-layer interconnection structure formed on the substrate. The multi-layer interconnection structure is adhered to the substrate in partial areas. The invention also provides a method of manufacturing and recycling such substrate and a method of packaging electronic devices by using such substrate. The invention also provides a method of manufacturing multi-layer interconnection devices.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: November 8, 2011
    Assignee: Princo Corp.
    Inventor: Chih-kuang Yang
  • Patent number: 8023282
    Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: September 20, 2011
    Assignee: Princo Corp.
    Inventor: Chih-kuang Yang
  • Patent number: 8014164
    Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: September 6, 2011
    Assignee: Princo Corp.
    Inventor: Chih-kuang Yang
  • Publication number: 20110212257
    Abstract: Disclosed is a method to improve heat dissipation efficiency and to decrease warpage of a multi-layer substrate, comprising a plurality of metal layers and a plurality of dielectric layers, which are alternately formed. A plane parallel with a first metal layer and a second metal layer, substantially has the same distance between the first metal layer and the second metal layer respectively. The plane is defined as a central plane between the first metal layer and the second metal layer. A first total area covered by metal in the first metal layer is larger than a second area covered by metal in the second metal layer. At least one redundant metal is set in same layer of the second metal layer to make a second total area comprising a redundant metal area covered by the redundant metal and the second area considerably equivalent to the first total area.
    Type: Application
    Filed: May 12, 2011
    Publication date: September 1, 2011
    Applicant: PRINCO CORP.
    Inventor: Chih-kuang Yang
  • Publication number: 20110212307
    Abstract: Disclosed is a method to decrease warpage of a multi-layer substrate, comprises a plurality of metal layers and a plurality of dielectric layers, which are alternately formed. A plane parallel with a first metal layer and a second metal layer of the plurality of metal layers substantially has the same distance between the first metal layer and the second metal layer respectively. The plane is defined as a central plane between the first metal layer and the second metal layer. A first total area covered by metal in the first metal layer is larger than a second area covered by metal in the second metal layer. At least one redundant metal is further set in same layer of the second metal layer. A second total area comprising a redundant metal area covered by the redundant metal and the second area is considerably equivalent to the first total area.
    Type: Application
    Filed: May 10, 2011
    Publication date: September 1, 2011
    Applicant: PRINCO CORP.
    Inventor: Chih-kuang Yang
  • Publication number: 20110198782
    Abstract: Disclosed are a multi-layer substrate and a manufacturing method of the multi-layer substrate. By employing a carrier to alternately form dielectric layers and metal structure layers thereon. Each dielectric layer adheres with the adjacent dielectric layer to embed the metal structure layers in the dielectric layers corresponding thereto. Comparing with prior arts, which have to use prepregs when hot pressing and adhering different layers of different materials, the present invention takes fewer processes, thus, fewer kinds of materials without using prepregs. Therefore, the present invention can promote the entire quality and yield of manufacturing the multi-layer substrate to satisfy mechanical characteristic matching of the multi-layer substrate and to reduce cost of the whole manufacturing process.
    Type: Application
    Filed: April 22, 2011
    Publication date: August 18, 2011
    Applicant: PRINCO CORP.
    Inventors: Chih-Kuang Yang, Cheng-Yi Chang
  • Patent number: 7993973
    Abstract: The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The interface between the IC integrated substrate and the carrier has a specific area at which the interface adhesion is different from that at the remaining area of the interface. The present invention also provides a method of manufacturing the above structure and a method of manufacturing electronic devices using the above structure.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: August 9, 2011
    Assignee: Princo Corp.
    Inventor: Chih-kuang Yang
  • Publication number: 20110129964
    Abstract: The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The IC integrated substrate has a first dielectric layer attached to the carrier. The materials of the carrier and the first dielectric layer are selected to prevent the IC integrated substrate from peeling off the carrier during processing and to allow the IC integrated substrate to naturally separate from the carrier after being cut, through the adhesion between the carrier and the first dielectric layer. The present invention also provides a method of manufacturing the above structure and a method of manufacturing electrical devices using the above structure.
    Type: Application
    Filed: February 1, 2011
    Publication date: June 2, 2011
    Applicant: Princo Corp.
    Inventor: Chih-kuang Yang
  • Publication number: 20110124155
    Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.
    Type: Application
    Filed: January 28, 2011
    Publication date: May 26, 2011
    Applicant: Princo Corp.
    Inventor: Chih-kuang Yang
  • Publication number: 20110124154
    Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.
    Type: Application
    Filed: January 28, 2011
    Publication date: May 26, 2011
    Applicant: Princo Corp.
    Inventor: Chih-kuang Yang
  • Patent number: 7947573
    Abstract: The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The IC integrated substrate has a first dielectric layer attached to the carrier. The materials of the carrier and the first dielectric layer are selected to prevent the IC integrated substrate from peeling off the carrier during processing and to allow the IC integrated substrate to naturally separate from the carrier after being cut, through the adhesion between the carrier and the first dielectric layer. The present invention also provides a method of manufacturing the above structure and a method of manufacturing electrical devices using the above structure.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: May 24, 2011
    Assignee: Princo Corp.
    Inventor: Chih-kuang Yang
  • Patent number: 7948079
    Abstract: Disclosed is a method of manufacturing a hybrid structure of multi-layer substrates. The method comprises steps of: separating a border district of at least one metal layer connecting with a border district of the corresponding dielectric layer from adjacent metal layers and adjacent dielectric layers for each multi-layer substrate and connecting a separated border of a metal layer of one multi-layer substrate with a separated border district of a metal layer of another multi-layer substrate to form a connection section. The hybrid structure comprises at least a first multi-layer substrate and a second multi-layer substrate. At least one first metal layer is connected with at least one second metal layer to form a connection section.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: May 24, 2011
    Assignee: Princo Corp.
    Inventor: Chih-kuang Yang
  • Patent number: 7931973
    Abstract: Disclosed is a manufacturing method of metal structure in multi-layer substrate and structure thereof. The manufacturing method of the present invention comprises following steps: coating at least one photoresist layer on a surface of a dielectric layer, and then exposing the photoresist dielectric layer to define a predetermined position of the metal structure; therefore, removing the photoresist layer at the predetermined position and forming the metal structure at the predetermined position before forming at least one top-cover metal layer on a surface of the metal structure. The present invention can form a cover metal layer covering over the top surface and the two side surfaces, even the under surface of the metal structure, by one single photomask. Moreover, a finer metal structure with higher reliability can be manufactured. Furthermore, a metal structure can be used as a coaxial structure is also realized.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: April 26, 2011
    Assignee: Princo Corp.
    Inventor: Chih-kuang Yang
  • Publication number: 20110088929
    Abstract: Disclosed is a metal structure of a multi-layer substrate, comprising a first metal layer and a dielectric layer. The first metal layer has an embedded base and a main body positioned on the embedded base. The base area of the embedded base is larger than the base area of the main body. After the dielectric layer covers the main body and the embedded base, the dielectric layer is opened at the specific position of the first metal layer for connecting the first metal layer with a second metal layer above the dielectric layer. When the metal structure is employed as a pad or a metal line of the flexible multi-layer substrate according to the present invention, the metal structure cannot easily be delaminated or separated from the contacted dielectric layer. Therefore, a higher reliability for the flexible multi-layer substrate can be achieved.
    Type: Application
    Filed: July 4, 2010
    Publication date: April 21, 2011
    Applicant: PRINCO CORP.
    Inventor: CHIH-KUANG YANG
  • Publication number: 20100108363
    Abstract: Disclosed is a via structure in a multi-layer substrate, comprising a first metal layer, a dielectric layer and a second metal layer. The first metal layer has an upper surface. The dielectric layer covers the first metal layer in which a via is opened to expose the upper surface. The second metal layer is formed in the via and contacts an upper surface and an inclined wall of the via. A contacting surface of the second metal layer has a top line lower than the upper edge of the inclined wall. Alternatively, the second metal layer can be formed on the dielectric layer as being a metal line simultaneously as formed in the via as being a pad. The metal line and the pad are connected electronically. The aforesaid metal second layer can be formed in the via and on the dielectric layer by a metal lift-off process.
    Type: Application
    Filed: October 20, 2009
    Publication date: May 6, 2010
    Applicant: PRINCO CORP.
    Inventor: Chih-kuang Yang
  • Publication number: 20100104889
    Abstract: Disclosed is a method to decrease warpage of a multi-layer substrate, comprises a first metal layer and a second metal layer. First area of the first metal layer is larger than second area of the second metal layer. In the same layer of the second metal layer, a redundant metal layer can be set to make a redundant metal layer area plus the second area considerably equivalent to the first area. Alternatively, a redundant space can be set in the first metal layer to achieve the same result. When the multi-layer substrate comprises a first dielectric layer with an opening and a second dielectric layer, a redundant opening positioned corresponding to the opening can be set in the second dielectric layer. The present invention employs a method of balancing the multi-layer substrate stress, i.e. to homogenize the multi-layer structure composed of different metal layers and dielectric layers to decrease warpage thereof.
    Type: Application
    Filed: January 4, 2010
    Publication date: April 29, 2010
    Applicant: PRINCO CORP.
    Inventor: Chih-kuang Yang
  • Patent number: 7687312
    Abstract: Disclosed is a method of manufacturing a hybrid structure of multi-layer substrates. The method comprises steps of: separating a border district of at least one metal layer connecting with a border district of the corresponding dielectric layer from adjacent metal layers and adjacent dielectric layers for each multi-layer substrate and connecting a separated border of a metal layer of one multi-layer substrate with a separated border district of a metal layer of another multi-layer substrate to form a connection section. The hybrid structure comprises at least a first multi-layer substrate and a second multi-layer substrate. At least one first metal layer is connected with at least one second metal layer to form a connection section.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: March 30, 2010
    Assignee: Princo Corp.
    Inventor: Chih-kuang Yang