Patents by Inventor Chih-Kuang Yang
Chih-Kuang Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100104889Abstract: Disclosed is a method to decrease warpage of a multi-layer substrate, comprises a first metal layer and a second metal layer. First area of the first metal layer is larger than second area of the second metal layer. In the same layer of the second metal layer, a redundant metal layer can be set to make a redundant metal layer area plus the second area considerably equivalent to the first area. Alternatively, a redundant space can be set in the first metal layer to achieve the same result. When the multi-layer substrate comprises a first dielectric layer with an opening and a second dielectric layer, a redundant opening positioned corresponding to the opening can be set in the second dielectric layer. The present invention employs a method of balancing the multi-layer substrate stress, i.e. to homogenize the multi-layer structure composed of different metal layers and dielectric layers to decrease warpage thereof.Type: ApplicationFiled: January 4, 2010Publication date: April 29, 2010Applicant: PRINCO CORP.Inventor: Chih-kuang Yang
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Patent number: 7687312Abstract: Disclosed is a method of manufacturing a hybrid structure of multi-layer substrates. The method comprises steps of: separating a border district of at least one metal layer connecting with a border district of the corresponding dielectric layer from adjacent metal layers and adjacent dielectric layers for each multi-layer substrate and connecting a separated border of a metal layer of one multi-layer substrate with a separated border district of a metal layer of another multi-layer substrate to form a connection section. The hybrid structure comprises at least a first multi-layer substrate and a second multi-layer substrate. At least one first metal layer is connected with at least one second metal layer to form a connection section.Type: GrantFiled: September 18, 2007Date of Patent: March 30, 2010Assignee: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20100027869Abstract: An optical carriage structure of the inspection apparatus and its inspection method are disclosed herein. A plurality of CCD arrays configured at different heights in the optical carriage are utilized, so as a plurality of individual images can be simultaneously captured in one scanning step to obtain a preferred inspection image for image comparison; therefore, precise inspection can be effectively achieved. Furthermore, those CCD arrays are configured at different heights and have enlarged focusing ranges, and the depth of field is thus enhanced.Type: ApplicationFiled: September 3, 2008Publication date: February 4, 2010Applicant: Shanghai Microtek Technology Co., Ltd.Inventors: Chin-Lai Wu, Chih-Kuang Yang
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Patent number: 7656679Abstract: Disclosed are a multi-layer substrate and a manufacture method thereof. The multi-layer substrate of the present invention comprises a surface dielectric layer and at least one bond pad layer. The surface dielectric layer is located at a surface of the multi-layer substrate. The bond pad layer is embedded in the surface dielectric layer to construct the multi-layer substrate with the surface dielectric layer of the present invention. The manufacture method of the present invention forms at least one bond pad layer on a flat surface of a carrier and then forms the surface dielectric layer to cover the bond pad layer where the bond pad layer is embedded therein. After the multi-layer substrate is separated from the carrier, the bond pad layer and the surface dielectric layer construct a flat surface of the multi-layer substrate.Type: GrantFiled: January 10, 2008Date of Patent: February 2, 2010Assignee: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20090321115Abstract: Disclosed is a manufacturing method of metal structure in multi-layer substrate and structure thereof. The manufacturing method of the present invention comprises following steps: coating at least one photoresist layer on a surface of a dielectric layer, and then exposing the photoresist dielectric layer to define a predetermined position of the metal structure; therefore, removing the photoresist layer at the predetermined position and forming the metal structure at the predetermined position before forming at least one top-cover metal layer on a surface of the metal structure. The present invention can form a cover metal layer covering over the top surface and the two side surfaces, even the under surface of the metal structure, by one single photomask. Moreover, a finer metal structure with higher reliability can be manufactured. Furthermore, a metal structure can be used as a coaxial structure is also realized.Type: ApplicationFiled: September 3, 2009Publication date: December 31, 2009Applicant: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20090314524Abstract: Disclosed is a method of manufacturing a hybrid structure of multi-layer substrates. The method comprises steps of: separating a border district of at least one metal layer connecting with a border district of the corresponding dielectric layer from adjacent metal layers and adjacent dielectric layers for each multi-layer substrate and connecting a separated border of a metal layer of one multi-layer substrate with a separated border district of a metal layer of another multi-layer substrate to form a connection section. The hybrid structure comprises at least a first multi-layer substrate and a second multi-layer substrate. At least one first metal layer is connected with at least one second metal layer to form a connection section.Type: ApplicationFiled: August 27, 2009Publication date: December 24, 2009Applicant: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20090208712Abstract: Disclosed is a method to decrease warpage of a multi-layer substrate, comprises a first metal layer and a second metal layer. First area of the first metal layer is larger than second area of the second metal layer. In the same layer of the second metal layer, a redundant metal layer can be set to make a redundant metal layer area plus the second area considerably equivalent to the first area. Alternatively, a redundant space can be set in the first metal layer to achieve the same result. When the multi-layer substrate comprises a first dielectric layer with an opening and a second dielectric layer, a redundant opening positioned corresponding to the opening can be set in the second dielectric layer. The present invention employs a method of balancing the multi-layer substrate stress, i.e. to homogenize the multi-layer structure composed of different metal layers and dielectric layers to decrease warpage thereof.Type: ApplicationFiled: September 10, 2008Publication date: August 20, 2009Applicant: PRINCO CORP.Inventor: Chih-kuang Yang
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Publication number: 20090181496Abstract: Disclosed are a multi-layer substrate and a manufacture method thereof. The multi-layer substrate of the present invention comprises a surface dielectric layer and at least one bond pad layer. The surface dielectric layer is located at a surface of the multi-layer substrate. The bond pad layer is embedded in the surface dielectric layer to construct the multi-layer substrate with the surface dielectric layer of the present invention. The manufacture method of the present invention forms at least one bond pad layer on a flat surface of a carrier and then forms the surface dielectric layer to cover the bond pad layer where the bond pad layer is embedded therein. After the multi-layer substrate is separated from the carrier, the bond pad layer and the surface dielectric layer construct a flat surface of the multi-layer substrate.Type: ApplicationFiled: October 22, 2008Publication date: July 16, 2009Applicant: Princo Corp.Inventor: Chih-kuang Yang
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Patent number: 7545042Abstract: The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The interface between the IC integrated substrate and the carrier has a specific area at which the interface adhesion is different from that at the remaining area of the interface. The present invention also provides a method of manufacturing the above structure and a method of manufacturing electronic devices using the above structure.Type: GrantFiled: September 20, 2006Date of Patent: June 9, 2009Assignee: Princo Corp.Inventor: Chih-Kuang Yang
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Publication number: 20090061565Abstract: The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The interface between the IC integrated substrate and the carrier has a specific area at which the interface adhesion is different from that at the remaining area of the interface. The present invention also provides a method of manufacturing the above structure and a method of manufacturing electronic devices using the above structure.Type: ApplicationFiled: November 7, 2008Publication date: March 5, 2009Applicant: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20080314629Abstract: Disclosed are a multi-layer substrate and a manufacturing method of the multi-layer substrate. By employing a carrier to alternately form dielectric layers and metal structure layers thereon. Each dielectric layer adheres with the adjacent dielectric layer to embed the metal structure layers in the dielectric layers corresponding thereto. Comparing with prior arts, which have to use prepregs when hot pressing and adhering different layers of different materials, the present invention takes fewer processes, thus, fewer kinds of materials without using prepregs. Therefore, the present invention can promote the entire quality and yield of manufacturing the multi-layer substrate to satisfy mechanical characteristic matching of the multi-layer substrate and to reduce cost of the whole manufacturing process.Type: ApplicationFiled: December 19, 2007Publication date: December 25, 2008Applicant: PRINCO CORP.Inventors: Chih-kuang Yang, Cheng-yi Chang
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Publication number: 20080316726Abstract: Disclosed are a multi-layer substrate and a manufacture method thereof. The multi-layer substrate of the present invention comprises a surface dielectric layer and at least one bond pad layer. The surface dielectric layer is located at a surface of the multi-layer substrate. The bond pad layer is embedded in the surface dielectric layer to construct the multi-layer substrate with the surface dielectric layer of the present invention. The manufacture method of the present invention forms at least one bond pad layer on a flat surface of a carrier and then forms the surface dielectric layer to cover the bond pad layer where the bond pad layer is embedded therein. After the multi-layer substrate is separated from the carrier, the bond pad layer and the surface dielectric layer construct a flat surface of the multi-layer substrate.Type: ApplicationFiled: January 10, 2008Publication date: December 25, 2008Applicant: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20080289863Abstract: A surface finish structure of multi-layer substrate and manufacturing method thereof. The surface finish structure of the present invention includes a bond pad layer, at least one cover metal layer and a solder mask. The cover metal layer covers the bond pad layer. The solder mask has a hole to expose the cover metal layer. The present invention can form the cover metal layer to cover the bond pad layer and then forms the solder mask. Thereafter, the hole is made to the solder mask at the position of the cover metal layer to expose thereof. Because the bond pad layer is embedded in a dielectric layer of the multi-layer substrate, adhesion intensity between the bond pad layer and the dielectric layer can be enhanced. Meanwhile, contact of the bond pad layer with the solder can be prevented with the cover metal layer.Type: ApplicationFiled: December 5, 2007Publication date: November 27, 2008Applicant: Princo Corp.Inventors: Chih-kuang Yang, Chieh-lin Hsing
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Publication number: 20080292892Abstract: Disclosed is a manufacturing method of metal structure in multi-layer substrate and structure thereof. The manufacturing method of the present invention comprises following steps: coating at least one photoresist layer on a surface of a dielectric layer, and then exposing the photoresist dielectric layer to define a predetermined position of the metal structure; therefore, removing the photoresist layer at the predetermined position and forming the metal structure at the predetermined position before forming at least one top-cover metal layer on a surface of the metal structure. The present invention can form a cover metal layer covering over the top surface and the two side surfaces, even the under surface of the metal structure, by one single photomask. Moreover, a finer metal structure with higher reliability can be manufactured. Furthermore, a metal structure can be used as a coaxial structure is also realized.Type: ApplicationFiled: December 5, 2007Publication date: November 27, 2008Applicant: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20080265405Abstract: The invention provides a substrate with multi-layer interconnection structure, which includes a substrate and a multi-layer interconnection structure formed on the substrate. The multi-layer interconnection structure is adhered to the substrate in partial areas. The invention also provides a method of manufacturing and recycling such substrate and a method of packaging electronic devices by using such substrate. The invention also provides a method of manufacturing multi-layer interconnection devices.Type: ApplicationFiled: July 9, 2008Publication date: October 30, 2008Applicant: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20080213944Abstract: The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The IC integrated substrate has a first dielectric layer attached to the carrier. The materials of the carrier and the first dielectric layer are selected to prevent the IC integrated substrate from peeling off the carrier during processing and to allow the IC integrated substrate to naturally separate from the carrier after being cut, through the adhesion between the carrier and the first dielectric layer. The present invention also provides a method of manufacturing the above structure and a method of manufacturing electrical devices using the above structure.Type: ApplicationFiled: May 15, 2008Publication date: September 4, 2008Applicant: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20080138575Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.Type: ApplicationFiled: September 18, 2007Publication date: June 12, 2008Applicant: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20080136021Abstract: Disclosed is a method of manufacturing a hybrid structure of multi-layer substrates. The method comprises steps of: separating a border district of at least one metal layer connecting with a border district of the corresponding dielectric layer from adjacent metal layers and adjacent dielectric layers for each multi-layer substrate and connecting a separated border of a metal layer of one multi-layer substrate with a separated border district of a metal layer of another multi-layer substrate to form a connection section. The hybrid structure comprises at least a first multi-layer substrate and a second multi-layer substrate. At least one first metal layer is connected with at least one second metal layer to form a connection section.Type: ApplicationFiled: September 18, 2007Publication date: June 12, 2008Applicant: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20080023811Abstract: The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The IC integrated substrate has a first dielectric layer attached to the carrier. The materials of the carrier and the first dielectric layer are selected to prevent the IC integrated substrate from peeling off the carrier during processing and to allow the IC integrated substrate to naturally separate from the carrier after being cut, through the adhesion between the carrier and the first dielectric layer. The present invention also provides a method of manufacturing the above structure and a method of manufacturing electrical devices using the above structure.Type: ApplicationFiled: September 30, 2006Publication date: January 31, 2008Applicant: PRINCO CORP.Inventor: Chih-Kuang Yang
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Publication number: 20070145587Abstract: The invention provides a substrate with multi-layer interconnection structure, which includes a substrate and a multi-layer interconnection structure formed on the substrate. The multi-layer interconnection structure is adhered to the substrate in partial areas. The invention also provides a method of manufacturing and recycling such substrate and a method of packaging electronic devices by using such substrate. The invention also provides a method of manufacturing multi-layer interconnection devices.Type: ApplicationFiled: March 31, 2006Publication date: June 28, 2007Applicant: PRINCO CORP.Inventor: Chih-Kuang Yang