Patents by Inventor Chih-Lin Wang

Chih-Lin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180090561
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The gate stack includes a gate dielectric layer and a work function layer. The gate dielectric layer is between the semiconductor substrate and the work function layer. The semiconductor device structure also includes a halogen source layer. The gate dielectric layer is between the semiconductor substrate and the halogen source layer.
    Type: Application
    Filed: December 4, 2017
    Publication date: March 29, 2018
    Inventors: Chih-Wei LIN, Chih-Lin WANG, Kang-Min KUO
  • Patent number: 9911821
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes a metal gate electrode structure over the semiconductor substrate. The semiconductor device structure includes an insulating layer over the semiconductor substrate and surrounding the metal gate electrode structure. The semiconductor device structure includes a first metal nitride layer over a first top surface of the metal gate electrode structure and in direct contact with the metal gate electrode structure. The first metal nitride layer includes a nitride material of the metal gate electrode structure.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: March 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Ruei Yeh, Chih-Lin Wang, Kang-Min Kuo
  • Patent number: 9911691
    Abstract: An interconnection structure includes a first dielectric layer, at least one first conductor, and an etch stop layer. The first conductor is disposed partially in the first dielectric layer and has a portion protruding from the first dielectric layer. The etch stop layer is disposed on the first dielectric layer and covers the protruding portion of the first conductor. The etch stop layer has a cap portion on a top surface of the protruding portion of the first conductor and a spacer portion on at least one sidewall of the protruding portion of the first conductor, and the spacer portion is thicker than the cap portion.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: March 6, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng Zheng, Chih-Lin Wang
  • Patent number: 9887129
    Abstract: The semiconductor device includes a substrate, an epi-layer, a first etch stop layer, an interlayer dielectric (ILD) layer, a second etch stop layer, a protective layer, a liner, a silicide cap and a contact plug. The substrate has a first portion and a second portion. The epi-layer is disposed in the first portion. The first etch stop layer is disposed on the second portion. The ILD layer is disposed on the first etch stop layer. The second etch stop layer is disposed on the ILD layer, in which the first etch stop layer, the ILD layer and the second etch stop layer form a sidewall surrounding the first portion. The protective layer is disposed on the sidewall. The liner is disposed on the protective layer. The silicide cap is disposed on the epi-layer. The contact plug is disposed on the silicide cap and surrounded by the liner.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: February 6, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Jia Hsieh, Long-Jie Hong, Chih-Lin Wang, Kang-Min Kuo
  • Patent number: 9842768
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first dielectric layer and a first conductive structure over a substrate. The first dielectric layer surrounds the first conductive structure. The method includes forming a second dielectric layer over the first dielectric layer. The second dielectric layer has an opening exposing the first conductive structure. The method includes forming a seal layer over the first conductive structure and an inner wall of the opening. The seal layer is in direct contact with the first dielectric layer and the second dielectric layer, and the seal layer includes a dielectric material comprising an oxygen compound. The method includes removing the seal layer over the first conductive structure. The method includes filling a second conductive structure into the opening.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: December 12, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shu-Cheng Lin, Chih-Lin Wang, Kang-Min Kuo
  • Patent number: 9837487
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The gate stack includes a gate dielectric layer and a work function layer. The gate dielectric layer is between the semiconductor substrate and the work function layer. The semiconductor device structure also includes a halogen source layer. The gate dielectric layer is between the semiconductor substrate and the halogen source layer.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: December 5, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Wei Lin, Chih-Lin Wang, Kang-Min Kuo
  • Patent number: 9780025
    Abstract: An interconnection structure includes a first dielectric layer, a first conductor, an etch stop layer, a second dielectric layer, and a second conductor. The first dielectric layer has at least one hole therein. The first conductor is disposed at least partially in the hole of the first dielectric layer. The etch stop layer is disposed on the first dielectric layer. The etch stop layer has an opening to at least partially expose the first conductor. The second dielectric layer is disposed on the etch stop layer and has at least one hole therein. The hole of the second dielectric layer is in communication with the opening of the etch stop layer. The second conductor is disposed at least partially in the hole of the second dielectric layer and is electrically connected to the first conductor through the opening of the etch stop layer.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: October 3, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng Zheng, Chih-Lin Wang
  • Publication number: 20170221758
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first dielectric layer and a first conductive structure over a substrate. The first dielectric layer surrounds the first conductive structure. The method includes forming a second dielectric layer over the first dielectric layer. The second dielectric layer has an opening exposing the first conductive structure. The method includes forming a seal layer over the first conductive structure and an inner wall of the opening. The seal layer is in direct contact with the first dielectric layer and the second dielectric layer, and the seal layer includes a dielectric material comprising an oxygen compound. The method includes removing the seal layer over the first conductive structure. The method includes filling a second conductive structure into the opening.
    Type: Application
    Filed: April 18, 2017
    Publication date: August 3, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shu-Cheng LIN, Chih-Lin WANG, Kang-Min KUO
  • Publication number: 20170170170
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first source region, a second source region, a first drain region, and a second drain region. The semiconductor device structure includes a first gate structure over the substrate and between the first source region and the first drain region. The semiconductor device structure includes a second gate structure over the substrate and between the second source region and the second drain region. A first thickness of the first gate structure is greater than a second thickness of the second gate structure. A first gate width of the first gate structure is less than a second gate width of the second gate structure.
    Type: Application
    Filed: December 15, 2015
    Publication date: June 15, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cong-Min FANG, Chih-Lin WANG, Kang-Min KUO
  • Publication number: 20170154954
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The gate stack includes a gate dielectric layer and a work function layer. The gate dielectric layer is between the semiconductor substrate and the work function layer. The semiconductor device structure also includes a halogen source layer. The gate dielectric layer is between the semiconductor substrate and the halogen source layer.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 1, 2017
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Wei LIN, Chih-Lin WANG, Kang-Min KUO
  • Publication number: 20170148665
    Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a metal gate stack formed over the semiconductor substrate. The semiconductor device also includes an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the metal gate stack includes a metal gate electrode. The semiconductor device further includes a metal oxide structure formed over the insulating layer and in direct contact with the insulating layer. The metal oxide structure includes an oxidized material of the metal gate electrode.
    Type: Application
    Filed: February 6, 2017
    Publication date: May 25, 2017
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Wen-Jia HSIEH, Chih-Lin WANG, Chia-Der CHANG
  • Publication number: 20170141205
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes a metal gate electrode structure over the semiconductor substrate. The semiconductor device structure includes an insulating layer over the semiconductor substrate and surrounding the metal gate electrode structure. The semiconductor device structure includes a first metal nitride layer over a first top surface of the metal gate electrode structure and in direct contact with the metal gate electrode structure. The first metal nitride layer includes a nitride material of the metal gate electrode structure.
    Type: Application
    Filed: November 13, 2015
    Publication date: May 18, 2017
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Ruei YEH, Chih-Lin WANG, Kang-Min KUO
  • Patent number: 9633941
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a first conductive structure over the substrate. The semiconductor device structure includes a first dielectric layer over the substrate. The first dielectric layer has a first opening exposing the first conductive structure. The semiconductor device structure includes a seal layer covering an inner wall of the first opening and in direct contact with the first dielectric layer. The seal layer includes a dielectric material including an oxygen compound. The semiconductor device structure includes a second conductive structure filled in the first opening and surrounded by the seal layer. The second conductive structure is electrically connected to the first conductive structure.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: April 25, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shu-Cheng Lin, Chih-Lin Wang, Kang-Min Kuo
  • Publication number: 20170110555
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate, an interfacial layer formed over the substrate, and an insertion layer formed over the interfacial layer. The semiconductor structure further includes a gate dielectric layer formed over the insertion layer and a gate structure formed over the gate dielectric layer. The insertion layer and the gate dielectric layer may be metal oxides where the insertion layer has an oxygen coordination number greater than the gate dielectric layer.
    Type: Application
    Filed: December 5, 2016
    Publication date: April 20, 2017
    Inventors: Cheng-Wei LIAN, Chih-Lin WANG, Kang-Min KUO, Chih-Wei LIN
  • Publication number: 20170098605
    Abstract: An interconnection structure includes a first dielectric layer, at least one first conductor, and an etch stop layer. The first conductor is disposed partially in the first dielectric layer and has a portion protruding from the first dielectric layer. The etch stop layer is disposed on the first dielectric layer and covers the protruding portion of the first conductor. The etch stop layer has a cap portion on a top surface of the protruding portion of the first conductor and a spacer portion on at least one sidewall of the protruding portion of the first conductor, and the spacer portion is thicker than the cap portion.
    Type: Application
    Filed: December 14, 2016
    Publication date: April 6, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng ZHENG, Chih-Lin WANG
  • Patent number: 9606294
    Abstract: An optical component optically coupled to an optical fiber includes a substrate and an edge-emitting laser. The substrate includes an accommodating cavity, a plurality of openings, a waveguide, an optical coupler and a plurality of pads. The waveguide and the optical coupler are distributed outside the accommodating cavity. The openings are distributed at the bottom surface of the accommodating cavity and the pads are located at the bottom of the openings. The optical coupler is optically coupled to an end of the waveguide and includes a light-incident surface. The edge-emitting laser is embedded in the accommodating cavity and includes a light-emitting layer and a plurality of bumps located in the openings and electrically connected to the pads. The ratio of the level height difference between the light-emitting layer and the optical coupler to the thickness of the optical coupler ranges from 0 to 0.5.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: March 28, 2017
    Assignee: Industrial Technology Research Institute
    Inventors: Kai-Ning Ku, Chih-Lin Wang, Shang-Chun Chen
  • Publication number: 20170053868
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a first conductive structure over the substrate. The semiconductor device structure includes a first dielectric layer over the substrate. The first dielectric layer has a first opening exposing the first conductive structure. The semiconductor device structure includes a seal layer covering an inner wall of the first opening and in direct contact with the first dielectric layer. The seal layer includes a dielectric material including an oxygen compound. The semiconductor device structure includes a second conductive structure filled in the first opening and surrounded by the seal layer. The second conductive structure is electrically connected to the first conductive structure.
    Type: Application
    Filed: August 21, 2015
    Publication date: February 23, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shu-Cheng LIN, Chih-Lin WANG, Kang-Min KUO
  • Patent number: 9564332
    Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a metal gate stack formed over the semiconductor substrate. The semiconductor device also includes an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the metal gate stack includes a metal gate electrode. The semiconductor device further includes a metal oxide structure formed over the insulating layer and in direct contact with the insulating layer. The metal oxide structure includes an oxidized material of the metal gate electrode.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: February 7, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Jia Hsieh, Chih-Lin Wang, Chia-Der Chang
  • Publication number: 20170031102
    Abstract: An optical component optically coupled to an optical fiber includes a substrate and an edge-emitting laser. The substrate includes an accommodating cavity, a plurality of openings, a waveguide, an optical coupler and a plurality of pads. The waveguide and the optical coupler are distributed outside the accommodating cavity. The openings are distributed at the bottom surface of the accommodating cavity and the pads are located at the bottom of the openings. The optical coupler is optically coupled to an end of the waveguide and includes a light-incident surface. The edge-emitting laser is embedded in the accommodating cavity and includes a light-emitting layer and a plurality of bumps located in the openings and electrically connected to the pads. The ratio of the level height difference between the light-emitting layer and the optical coupler to the thickness of the optical coupler ranges from 0 to 0.5.
    Type: Application
    Filed: July 29, 2016
    Publication date: February 2, 2017
    Applicant: Industrial Technology Research Institute
    Inventors: Kai-Ning Ku, Chih-Lin Wang, Shang-Chun Chen
  • Patent number: 9515158
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate, an interfacial layer formed over the substrate, and an insertion layer formed over the interfacial layer. The semiconductor structure further includes a gate dielectric layer formed over the insertion layer and a gate structure formed over the gate dielectric layer. In addition, the insertion layer is made of M1Ox, and M1 is a metal, O is oxygen, and x is a value greater than 4.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: December 6, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Wei Lian, Chih-Lin Wang, Kang-Min Kuo, Chih-Wei Lin