Patents by Inventor Chih-Lin Wang

Chih-Lin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9331178
    Abstract: A method for manufacturing a semiconductor device includes forming two isolation structures in a substrate to define a fin structure between the two isolation structures in the substrate. A dummy gate and spacers are formed bridging the two isolation structures and over the fin structure. The two isolation structures are etched with the dummy gate and the spacers as a mask to form a plurality of slopes under the spacers in the two isolation structures. A gate etch stop layer is formed overlying the plurality of slopes. The dummy gate and the two isolation structures beneath the dummy gate are removed to create a cavity confined by the spacers and the gate etch stop layer. A gate is then formed in the cavity.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: May 3, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Chih Lin, Long-Jie Hong, Chih-Lin Wang, Chia-Der Chang
  • Publication number: 20160071799
    Abstract: The semiconductor device includes a substrate, an epi-layer, a first etch stop layer, an interlayer dielectric (ILD) layer, a second etch stop layer, a protective layer, a liner, a silicide cap and a contact plug. The substrate has a first portion and a second portion. The epi-layer is disposed in the first portion. The first etch stop layer is disposed on the second portion. The ILD layer is disposed on the first etch stop layer. The second etch stop layer is disposed on the ILD layer, in which the first etch stop layer, the ILD layer and the second etch stop layer form a sidewall surrounding the first portion. The protective layer is disposed on the sidewall. The liner is disposed on the protective layer. The silicide cap is disposed on the epi-layer. The contact plug is disposed on the silicide cap and surrounded by the liner.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 10, 2016
    Inventors: Wen-Jia HSIEH, Long-Jie HONG, Chih-Lin WANG, Kang-Min KUO
  • Publication number: 20150340475
    Abstract: A method for manufacturing a semiconductor device includes forming two isolation structures in a substrate to define a fin structure between the two isolation structures in the substrate. A dummy gate and spacers are formed bridging the two isolation structures and over the fin structure. The two isolation structures are etched with the dummy gate and the spacers as a mask to form a plurality of slopes under the spacers in the two isolation structures. A gate etch stop layer is formed overlying the plurality of slopes. The dummy gate and the two isolation structures beneath the dummy gate are removed to create a cavity confined by the spacers and the gate etch stop layer. A gate is then formed in the cavity.
    Type: Application
    Filed: August 6, 2015
    Publication date: November 26, 2015
    Inventors: Chien-Chih LIN, Long-Jie HONG, Chih-Lin WANG, Chia-Der CHANG
  • Publication number: 20150294914
    Abstract: A semiconductor device with an increased effective gate length or an increased effective channel width, and a method of forming the same are provided. The effective gate length or the effective channel width of the device is increased by lowering a top surface of an oxide isolation structure below the gate of the semiconductor device.
    Type: Application
    Filed: April 9, 2014
    Publication date: October 15, 2015
    Applicant: Taiwan Semiconductor Manufacturing CO., LTD.
    Inventors: Long-Jie Hong, Chih-Lin Wang, Kang-Min Kuo
  • Patent number: 9136356
    Abstract: A method for manufacturing a semiconductor device includes forming two isolation structures in a substrate to define a fin structure between the two isolation structures in the substrate. A dummy gate and spacers are formed bridging the two isolation structures and over the fin structure. The two isolation structures are etched with the dummy gate and the spacers as a mask to form a plurality of slopes under the spacers in the two isolation structures. A gate etch stop layer is formed overlying the plurality of slopes. The dummy gate and the two isolation structures beneath the dummy gate are removed to create a cavity confined by the spacers and the gate etch stop layer. A gate is then formed in the cavity.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: September 15, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Chih Lin, Long-Jie Hong, Chih-Lin Wang, Chia-Der Chang
  • Publication number: 20150228763
    Abstract: A method for manufacturing a semiconductor device includes forming two isolation structures in a substrate to define a fin structure between the two isolation structures in the substrate. A dummy gate and spacers are formed bridging the two isolation structures and over the fin structure. The two isolation structures are etched with the dummy gate and the spacers as a mask to form a plurality of slopes under the spacers in the two isolation structures. A gate etch stop layer is formed overlying the plurality of slopes. The dummy gate and the two isolation structures beneath the dummy gate are removed to create a cavity confined by the spacers and the gate etch stop layer. A gate is then formed in the cavity.
    Type: Application
    Filed: February 10, 2014
    Publication date: August 13, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Chih LIN, Long-Jie HONG, Chih-Lin WANG, Chia-Der CHANG
  • Patent number: 9048113
    Abstract: A lighting instrument includes: a substrate; a plurality of first light-emitting diodes (LEDs) disposed over the substrate, wherein the first LEDs each have a first value range for a light output characteristic; a plurality of second LEDs disposed over the substrate, wherein the second LEDs each have a second value range for the light output characteristic, the second value range being different from the first value range; a phosphor layer located at a distance above the first LEDs and the second LEDs; and a light-reflective layer that is disposed on a surface of the phosphor layer; wherein the first LEDs interleave with the second LEDs according to a predefined pattern.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: June 2, 2015
    Assignee: TSMC Solid State Lighting Ltd.
    Inventor: Chih-Lin Wang
  • Patent number: 8995054
    Abstract: An apparatus for generating a pulse train with an adjustable time interval is provided. The apparatus, being an annular optical cavity structure, includes a seed source receiving end, a pump source receiving end, an optical coupler, an optical combiner, a gain fiber, an optical path time regulator and a beam splitter. Thus, the apparatus is capable of generating a pulse train with an adjustable time interval to increase material processing quality and speed.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: March 31, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Yao-Wun Jhang, Hsin-Chia Su, Chien-Ming Huang, Shih-Ting Lin, Chih-Lin Wang, Chieh Hu
  • Publication number: 20150084137
    Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a metal gate stack formed over the semiconductor substrate. The semiconductor device also includes an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the metal gate stack includes a metal gate electrode. The semiconductor device further includes a metal oxide structure formed over the insulating layer and in direct contact with the insulating layer. The metal oxide structure includes an oxidized material of the metal gate electrode.
    Type: Application
    Filed: September 26, 2013
    Publication date: March 26, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Jia HSIEH, Chih-Lin WANG, Chia-Der CHANG
  • Patent number: 8831052
    Abstract: An apparatus for generating a short-pulse laser using a temporally modulated sideband gain is provided. The apparatus includes a laser diode and an external reflector. By use of a time difference resulted by a nanosecond laser pulse signal at the external reflector, a sideband gain is obtained for generating a short-pulse picosecond laser output.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: September 9, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Yao-Wun Jhang, Chien-Ming Huang, Hsin-Chia Su, Shih-Ting Lin, Chih-Lin Wang, Hong-Xi Tsau
  • Patent number: 8766163
    Abstract: A control circuit is applied into a projector and an operation method is provided for the projector. The projector includes a photo sensor provided for generating a sensing voltage according to light intensity sensed by the photo sensor. The control circuit includes a first voltage-comparing unit, a reference voltage generating unit and a second voltage-comparing unit. The first voltage-comparing unit is provided for comparing the sensing voltage and a first reference voltage, to generate a first comprising result. The reference-voltage generating unit is provided for generating a second reference voltage and determining whether adjusting the second reference voltage according to the first comparing result. The second reference voltage is relatively larger than the first reference voltage. The second voltage-comparing unit is provided for comparing the sensing voltage and the second reference voltage, to generate a second comparing result.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: July 1, 2014
    Assignee: Coretronic Corporation
    Inventors: Jung-Chi Chen, Po-Yen Wu, Chih-Lin Wang
  • Publication number: 20140159079
    Abstract: The present disclosure involves a lighting instrument. The lighting instrument includes a board or substrate, for example, a printed circuit board. The lighting instrument also includes a plurality of light-emitting devices disposed on the substrate. The light-emitting devices may be light-emitting diode (LED) dies. The LED dies belong to a plurality of different bins. The bins are categorized based on the light output performance of the LED dies. In some embodiments, the LED dies may be binned based on the wavelength or radiant flux of the light output. The LED dies are distributed on the substrate according to a predefined pattern based on their bins. In some embodiments, the LED dies are bin-mixed in an interleaving manner.
    Type: Application
    Filed: February 17, 2014
    Publication date: June 12, 2014
    Applicant: TSMC Solid State Lighting Ltd.
    Inventor: Chih-Lin Wang
  • Publication number: 20140153597
    Abstract: An apparatus for generating a short-pulse laser using a temporally modulated sideband gain is provided. The apparatus includes a laser diode and an external reflector. By use of a time difference resulted by a nanosecond laser pulse signal at the external reflector, a sideband gain is obtained for generating a short-pulse picosecond laser output.
    Type: Application
    Filed: May 28, 2013
    Publication date: June 5, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yao-Wun JHANG, Chien-Ming Huang, Hsin-Chia Su, Shih-Ting Lin, Chih-Lin Wang, Hong-Xi Tsau
  • Patent number: 8741726
    Abstract: Methods are disclosed of forming and removing a reacted layer on a surface of a recess to provide mechanisms for improving thickness uniformity of a semiconductor material formed in the recess. The improved thickness uniformity in turn improves the uniformity of device performance.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: June 3, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Te Lin, Chih-Lin Wang, Yi-Huang Wu, Tzong-Sheng Chang
  • Publication number: 20140133513
    Abstract: A laser device including a laser crystal, a first lens, an induced light source, a third light source and a second lens and a method for generating a laser light are disclosed. The laser crystal includes a gain medium, a first cross section and a second cross section. The first lens is located on the first cross section of the laser crystal. The induced light source is adapted to generate an induced light entering into the laser crystal through the first lens. The third light source is adapted to generate a third light which is adapted for emitting the laser crystal. The third light and the induced light are adapted to induce the liquid crystal to make the liquid crystal generate a first light and a second light.
    Type: Application
    Filed: December 20, 2012
    Publication date: May 15, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shih-Ting LIN, Chih-Lin WANG, Yao-Wun JHANG, Chieh HU, Hong-Xi TSAU
  • Patent number: 8680544
    Abstract: The present disclosure involves a lighting instrument. The lighting instrument includes a board or substrate, for example, a printed circuit board. The lighting instrument also includes a plurality of light-emitting devices disposed on the substrate. The light-emitting devices may be light-emitting diode (LED) dies. The LED dies belong to a plurality of different bins. The bins are categorized based on the light output performance of the LED dies. In some embodiments, the LED dies may be binned based on the wavelength or radiant flux of the light output. The LED dies are distributed on the substrate according to a predefined pattern based on their bins. In some embodiments, the LED dies are bin-mixed in an interleaving manner.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: March 25, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventor: Chih-Lin Wang
  • Publication number: 20130329756
    Abstract: A laser apparatus includes an optical fiber component and a pump light source coupled to the optical fiber component. The optical fiber component includes a first fiber segment, a second fiber segment and a connecting segment that connects the first and second fiber segments. The first fiber segment includes a fiber core having a first diameter, and the second fiber segment includes a fiber core having a second diameter. The first diameter may be greater than the second diameter, and the connecting segment may have a periodically varying refractive index.
    Type: Application
    Filed: August 9, 2013
    Publication date: December 12, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: SHIH TING LIN, YAO WUN JHANG, CHIEN MING HUANG, HSIN CHIA SU, CHIH LIN WANG, HONG XI TSAU
  • Patent number: 8469543
    Abstract: A backlight module, a light source module used therein, and a manufacturing method thereof are provided. The light source module outputs a mixed light which has color coordinates falling into a target zone in a color space. The light source module has a plurality of interlaced first light sources and second light sources. The light generated by the first and the second light sources respectively have color coordinates falling into a first zone and a second zone in the color space. The first and the second zones are respectively areas having a maximum width smaller than or equal to 0.02. In addition, the first and the second zones are symmetrical relative to the target zone.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: June 25, 2013
    Assignee: AU Optronics Corporation
    Inventors: Fu-An Tu, Chih-Lin Wang, Yueh-Jung Lee
  • Publication number: 20130143391
    Abstract: Methods are disclosed of forming and removing a reacted layer on a surface of a recess to provide mechanisms for improving thickness uniformity of a semiconductor material formed in the recess. The improved thickness uniformity in turn improves the uniformity of device performance.
    Type: Application
    Filed: December 1, 2011
    Publication date: June 6, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Te LIN, Chih-Lin WANG, Yi-Huang WU, Tzong-Sheng CHANG
  • Publication number: 20130134446
    Abstract: The present disclosure involves a lighting instrument. The lighting instrument includes a board or substrate, for example, a printed circuit board. The lighting instrument also includes a plurality of light-emitting devices disposed on the substrate. The light-emitting devices may be light-emitting diode (LED) dies. The LED dies belong to a plurality of different bins. The bins are categorized based on the light output performance of the LED dies. In some embodiments, the LED dies may be binned based on the wavelength or radiant flux of the light output. The LED dies are distributed on the substrate according to a predefined pattern based on their bins. In some embodiments, the LED dies are bin-mixed in an interleaving manner.
    Type: Application
    Filed: November 30, 2011
    Publication date: May 30, 2013
    Applicant: TSMC Solid State Lighting Ltd.
    Inventor: Chih-Lin Wang