Abstract: An image sensor system includes a timing control circuit, an image sensor and a modulation circuit. The timing control circuit is arranged to determine if a coding condition is fit according to an input signal and generate a control signal when the coding condition is fit. The input signal has a signal value updated in response to each pulse of a clock signal. The image sensor is coupled to the timing control circuit, and includes a plurality of pixels. One of the plurality of pixels receives the control signal from the timing control circuit and outputs a sensing signal. The modulation circuit is coupled to the image sensor, and arranged to receive the sensing signal and generate an output signal according to the sensing signal.

Abstract: The present invention provides novel substituted benzimidazole derivatives used as DAAO inhibitors and for treatment and/or prevention of neurological disorders.

Abstract: Methods and systems for capturing a three dimensional image are described. An image capture process is performed while moving a lens to capture image data across a range of focal depths, and a three dimensional image reconstruction process generates a three dimensional image based on the image data. A two-dimensional image is also rendered including focused image data from across the range of focal depths. The two dimensional image and the three dimensional image are fused to generate a focused three dimensional model.

Abstract: A circuit includes sensing unit, first and second group of switches, capacitor, and readout circuit. The sensing unit is configured to receive light and generate sensing voltage at sensing node in response to the light. The first group of switches is coupled to the sensing node, and configured to generate first transfer voltage to first node and generate first auxiliary voltage to second node. The second group of switches is coupled to the sensing node, and configured to generate second transfer voltage to third node and generate second auxiliary voltage to fourth node. The capacitor is coupled to the first group of switches, and configured to store charges generated from the sensing unit. The readout circuit is configured to read at least one of the first transfer voltage and the first auxiliary voltage, and read at least one of the second transfer voltage and the second auxiliary voltage.

Abstract: Methods and systems for capturing a three dimensional image are described. An image capture process is performed while moving a lens to capture image data across a range of focal depths, and a three dimensional image reconstruction process generates a three dimensional image based on the image data. A two-dimensional image is also rendered including focused image data from across the range of focal depths. The two dimensional image and the three dimensional image are fused to generate a focused three dimensional model.

Abstract: This invention is to be applied to a person's ear. The biophotonic mask instrument consists of an ear covering component, an ear attachment component, and multiple light emitting units. The biophotonic mask instrument is connected to an external intelligent electronic device with an application to control the operation of the light emitting units. The attachment component is to be clipped onto the body of the ear with the ear covering component connected to it. The multiple light emitting units are arranged to be 0.8 mm to 1.2 mm apart or 0.65 mm to 1.5 mm apart. The light emitting units are in a net design and their wave lengths are between 400 nm to 1000 nm. The biophotonic mask instrument is wirelessly connected to the intelligence device.

Abstract: One or more gray code counters, counter arrangements, and phase-locked loop (PLL) circuits are provided. A gray code counter comprises a set of cells, such as standard cells, that output a gray code signal. The gray code counter comprises a pre-ready cell that provides an early signal, generated based upon an early clock, to one or more cells to reduce delay. A counter arrangement comprises one or more counter groups configured to provide pixel count levels for pixels, such as pixels of an image sensor array. A counter group comprises a gray code counter configured to provide a gray code signal to latch counter arrangements of the counter group. A PPL circuit comprises a gray code counter configured to generate a gray code signal used by a digital filter to adjust an oscillator. The gray code signal provides n-bit early/late information to the digital filter for adjustment of the oscillator.

Abstract: An image sensor system includes a timing control circuit, an image sensor and a modulation circuit. The timing control circuit is arranged to determine if a coding condition is fit according to an input signal and generate a control signal when the coding condition is fit. The input signal has a signal value updated in response to each pulse of a clock signal. The image sensor is coupled to the timing control circuit, and includes a plurality of pixels. One of the plurality of pixels receives the control signal from the timing control circuit and outputs a sensing signal. The modulation circuit is coupled to the image sensor, and arranged to receive the sensing signal and generate an output signal according to the sensing signal.

Abstract: An image sensor system, including: an image sensor, a readout circuit, and a timing control circuit. The image sensor includes a plurality of diodes, and one of the plurality of diodes outputs a sensing current when a photon is detected. The readout circuit is coupled to the image sensor and arranged to selectively operate in at least a first mode and a second mode. The timing control circuit is coupled to the readout circuit and is arranged to determine if a coding condition is fit according to an input signal and generate a control signal when the coding condition is fit, wherein the input signal input signal includes a plurality of bits serially input to the timing control circuit, and each bit of the plurality of bits corresponds to each pulse of a clock signal respectively.

Abstract: One or more gray code counters, counter arrangements, and phase-locked loop (PLL) circuits are provided. A gray code counter comprises a set of cells, such as standard cells, that output a gray code signal. The gray code counter comprises a pre-ready cell that provides an early signal, generated based upon an early clock, to one or more cells to reduce delay. A counter arrangement comprises one or more counter groups configured to provide pixel count levels for pixels, such as pixels of an image sensor array. A counter group comprises a gray code counter configured to provide a gray code signal to latch counter arrangements of the counter group. A PPL circuit comprises a gray code counter configured to generate a gray code signal used by a digital filter to adjust an oscillator. The gray code signal provides n-bit early/late information to the digital filter for adjustment of the oscillator.

Abstract: Methods and systems for capturing a three dimensional image are described. An image capture process is performed while moving a lens to capture image data across a range of focal depths, and a three dimensional image reconstruction process generates a three dimensional image based on the image data. A two-dimensional image is also rendered including focused image data from across the range of focal depths. The two dimensional image and the three dimensional image are fused to generate a focused three dimensional model.

Abstract: An image sensor system including: a timing control circuit, an image sensor and a modulation circuit. The timing control circuit is arranged to determine if a coding condition is fit according to an input signal and generate a control signal when the coding condition is fit, wherein the input signal is generated in response to each pulse of a clock signal. The image sensor is coupled to the timing control circuit, and the image sensor includes a plurality of pixels, wherein one of the plurality of pixels receives the control signal from the timing control circuit and outputs a sensing signal. The modulation circuit is coupled to the image sensor and arranged to receive the sensing signal and generate an output signal according to the sensing signal, wherein a frequency of the output signal is different from a frequency of the sensing signal.

Abstract: A circuit includes sensing unit, first and second group of switches, capacitor, and readout circuit. The sensing unit is configured to receive light and generate sensing voltage at sensing node in response to the light. The first group of switches is coupled to the sensing node, and configured to generate first transfer voltage to first node and generate first auxiliary voltage to second node. The second group of switches is coupled to the sensing node, and configured to generate second transfer voltage to third node and generate second auxiliary voltage to fourth node. The capacitor is coupled to the first group of switches, and configured to store charges generated from the sensing unit. The readout circuit is configured to read at least one of the first transfer voltage and the first auxiliary voltage, and read at least one of the second transfer voltage and the second auxiliary voltage.

Abstract: A circuit includes a sensing unit, a first group of switching units, and a second group of switching units. The sensing unit is configured to receive light and generate a sensing voltage at a sensing node in response to the light. The first group of switching units is coupled to the sensing node, and configured to generate a first transfer voltage to a first node and generate a first auxiliary voltage to a second node. At least one of the first transfer voltage and the first auxiliary voltage is read by a readout circuit. The second group of switching units is coupled to the sensing node, and configured to generate a second transfer voltage to a third node and generate a second auxiliary voltage to a fourth node. At least one of the second transfer voltage and the second auxiliary voltage is read by the readout circuit.

Abstract: One or more gray code counters, counter arrangements, and phase-locked loop (PLL) circuits are provided. A gray code counter comprises a set of cells, such as standard cells, that output a gray code signal. The gray code counter comprises a pre-ready cell that provides an early signal, generated based upon an early clock, to one or more cells to reduce delay. A counter arrangement comprises one or more counter groups configured to provide pixel count levels for pixels, such as pixels of an image sensor array. A counter group comprises a gray code counter configured to provide a gray code signal to latch counter arrangements of the counter group. A PPL circuit comprises a gray code counter configured to generate a gray code signal used by a digital filter to adjust an oscillator. The gray code signal provides n-bit early/late information to the digital filter for adjustment of the oscillator.

Abstract: A Dual-Side Illumination (DSI) image sensor chip includes a first image sensor chip configured to sense light from a first direction, and a second image sensor chip aligned to, and bonded to, the first image sensor chip. The second image sensor chip is configured to sense light from a second direction opposite the first direction.

Abstract: One or more gray code counters, counter arrangements, and phase-locked loop (PLL) circuits are provided. A gray code counter comprises a set of cells, such as standard cells, that output a gray code signal. The gray code counter comprises a pre-ready cell that provides an early signal, generated based upon an early clock, to one or more cells to reduce delay. A counter arrangement comprises one or more counter groups configured to provide pixel count levels for pixels, such as pixels of an image sensor array. A counter group comprises a gray code counter configured to provide a gray code signal to latch counter arrangements of the counter group. A PPL circuit comprises a gray code counter configured to generate a gray code signal used by a digital filter to adjust an oscillator. The gray code signal provides n-bit early/late information to the digital filter for adjustment of the oscillator.

Abstract: A sensing device includes: a sampling circuit arranged to sample a sensing signal for generating a signal in response to a sampling signal having a monotonically increasing waveform; and a conversion circuit arranged to convert the signal into a digital output signal when the signal reaches a predetermined threshold of the conversion circuit.

Abstract: The invention utilizes virtual screening strategy to seek for current market drugs as anti-schizophrenia therapy drug repurposing. Drug repurposing strategy finds new uses other than the original medical indications of existing drugs. Finding new indications for such drugs will benefit patients who are in needs for a potential new therapy sooner since known drugs are usually with acceptable safety and pharmacokinetic profiles. In this study, repurposing marketed drugs for DAAO inhibitor as new schizophrenia therapy was performed with virtual screening on marketed drugs and its metabolites. The identified and available drugs and compounds were further confirmed with in vitro DAAO enzymatic inhibitory assay.

Abstract: A sensor includes a plurality of image sensors, wherein each image sensor of the plurality of image sensors is configured to detect a first spectrum of light. The sensor further includes a depth sensing pixel bonded to each image sensor of the plurality of image sensors, wherein the depth sensing pixel is configured to detect a second spectrum of light different from the first spectrum.