Patents by Inventor Chih-Sheng Lin

Chih-Sheng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090008247
    Abstract: The present invention provides a surface-modified electrode strip for measuring an electrochemical signal that is synergistically amplified by means of a nano-scaled gold particle layer and a lipid-soluble electron mediator layer. A biosensor comprising the electrode strip is also provided.
    Type: Application
    Filed: June 16, 2008
    Publication date: January 8, 2009
    Applicant: Apex Biotechnology Corp.
    Inventors: Sz-Hau Chen, Chih-Sheng Lin, Guan-Tin Chen, Yueh-Hui Lin, Thomas Y.S. Shen
  • Patent number: 7385866
    Abstract: A memory device is provided. The device comprises a sense amplifier having a cell input terminal and a reference input terminal, a first sub-array coupled to the cell input terminal through a first switch and coupled to the reference input terminal through a second switch, a second sub-array coupled to the cell input terminal through a third switch and coupled to the reference input terminal through a fourth switch, and a reference cell array coupled between the second switch and the fourth switch and coupled to the reference input terminal.
    Type: Grant
    Filed: February 3, 2006
    Date of Patent: June 10, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Sheng Lin, Chia-Pao Chang, Jan-Ruei Lin
  • Publication number: 20080007992
    Abstract: The invention provides a multi-state sense amplifier, coupled to at least one memory cell with changeable resistance and a plurality of reference cells. The first current mirror circuit, coupled to the output terminal of the memory cell, generates a second memory cell current at a first node according to a first memory cell current through the memory cell. The second current mirror circuit, coupled to the output terminal of the reference cells, generates a plurality of second reference currents at a plurality of second nodes according to a plurality of first reference currents through the reference cells. The load circuit, coupled to the first node, the second nodes, and a ground, provides equal loads for the second memory cell current and the second reference currents to respectively generate a memory cell voltage at the first node and a plurality of reference voltages at the second nodes.
    Type: Application
    Filed: June 1, 2007
    Publication date: January 10, 2008
    Inventors: Min-Chuan Wang, Chih-Sheng Lin, Chia-Pao Chang, Keng-Li Su
  • Publication number: 20070109841
    Abstract: A memory device is provided. The device comprises a sense amplifier having a cell input terminal and a reference input terminal, a first sub-array coupled to the cell input terminal through a first switch and coupled to the reference input terminal through a second switch, a second sub-array coupled to the cell input terminal through a third switch and coupled to the reference input terminal through a fourth switch, and a reference cell array coupled between the second switch and the fourth switch and coupled to the reference input terminal.
    Type: Application
    Filed: February 3, 2006
    Publication date: May 17, 2007
    Applicant: Industrial Technology Research Institute
    Inventors: Chih-Sheng Lin, Chia-Pao Chang, Jan-Ruei Lin
  • Patent number: 6147361
    Abstract: A polysilicon sensor is described which can be incorporated onto a silicon wafer containing integrated circuits for the purpose of detecting and monitoring electromigration(EM) in metal test stripes representative of the interconnection metallurgy used by the integrated circuits. The sensor capitalizes on the property of silicon whereby a small increase in temperature causes a large increase in carrier concentration. In this regard, the local temperature rise of an adjacent metal line undergoing EM failure manifests itself as a decrease in resistance of the sensor. The sensor is particularly suited for testing multi-level metallurgies such as those having an aluminum alloy sandwiched between metallic layers such as those used for diffusion barriers and anti-reflective coatings. Its fabrication is compatible with conventional MOSFET processes which use a self-aligned polysilicon gate.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: November 14, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chih-Sheng Lin, Shun-Yi Lee
  • Patent number: 5722831
    Abstract: An apparatus for fastening a matrix band to a tooth includes an elongated frame, an elongated slide member, a locking unit and a single-direction positioning mechanism. A front end of the support frame is formed with a retaining member which engages slidably overlapping end portions of the matrix band in order to orient selectively a loop portion of the matrix band to predetermined directions. The slide member engages slidably and parallelly with the support frame. A front end of the slide member is formed with a sliding block. The locking unit is provided on the sliding block of the slide member for locking releasably the overlapping end portions in the sliding block.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: March 3, 1998
    Inventor: Chih-Sheng Lin
  • Patent number: 5627101
    Abstract: A polysilicon sensor is described which can be incorporated onto a silicon wafer containing integrated circuits for the purpose of detecting and monitoring electromigration(EM) in metal test stripes representative of the interconnection metallurgy used by the integrated circuits. The sensor capitalizes on the property of silicon whereby a small increase in temperature causes a large increase in carrier concentration. In this regard, the local temperature rise of an adjacent metal line undergoing EM failure manifests itself as a decrease in resistance of the sensor. The sensor is particularly suited for testing multi-level metallurgies such as those having an aluminum alloy sandwiched between metallic layers such as those used for diffusion barriers and anti-reflective coatings. Its fabrication is compatible with conventional MOSFET processes which use a self-aligned polysilicon gate.
    Type: Grant
    Filed: December 4, 1995
    Date of Patent: May 6, 1997
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Chih-Sheng Lin, Shun-Yi Lee