Abstract: A semiconductor structure includes a substrate, an isolation layer, a dielectric layer, an insulation layer, a conductor and a capping layer. The substrate has a concave portion. The isolation layer is located on a top surface of the substrate. The dielectric layer is located on the isolation layer. The insulation layer is located on a surface of the concave portion and extends to a sidewall of the isolation layer. The conductor is located on the insulation layer in the concave portion. The conductor has a first top surface and a second top surface, and the first top surface is closer to the dielectric layer than the second top surface. The capping layer is located in the concave portion and covers the conductor.

Abstract: A semiconductor structure includes a substrate, a bit line, a dielectric layer and a word line. The substrate has an active area and a trench. The bit line is on the substrate and extends along a direction. The active area includes a first portion and a second portion respectively located at two opposite sides of the bit line and spaced apart from each other along the direction. A landing area extends from the first portion of the active area to the second portion of the active area across the bit line. A dielectric layer is in the trench. The active area is surrounded by the dielectric layer. The word line is surrounded by the dielectric layer. The word line is curved and below the bit line. A portion of the word line is between first and second end portions of the landing area.

Abstract: A method of fabricating the semiconductor device includes forming a bit line structure over a substrate, forming a spacer structure on a sidewall of the bit line structure, partially removing an upper portion of the spacer structure to form a slope on the spacer structure slanting to the bit line structure, forming a landing pad material to cover the spacer structure and contact the slope, and removing at least a portion of the landing pad material to form a landing pad against the slope.

Abstract: Various powered wheeled board vehicles are disclosed. In some embodiments, the vehicle includes a deck having a forward portion and a rearward portion. At least one front wheel can be connected with the deck under the forward portion. The front wheel can be configured to swivel about a first axis and rotate about a second axis. A powered wheel can be connected with the rearward portion. In some configurations, the rear wheel comprises a hub motor.

Abstract: A semiconductor structure includes a substrate, a bit line, a dielectric layer and a word line. The substrate has an active area and a trench. The bit line is on the substrate and extends along a direction. The active area includes a first portion and a second portion respectively located at two opposite sides of the bit line and spaced apart from each other along the direction. A landing area extends from the first portion of the active area to the second portion of the active area across the bit line. A dielectric layer is in the trench. The active area is surrounded by the dielectric layer. The word line is surrounded by the dielectric layer. The word line is curved and below the bit line. A portion of the word line is between first and second end portions of the landing area.

Abstract: The present disclosure provides to a method for preparing metal lines with a high aspect ratio comprising two photolithography stages. According to the design of the method of the present disclosure, first metal lines with high aspect ratio are formed in a dielectric layer, which provides a mechanical support to the first metal lines, thereby preventing the first metal lines from collapsing or deforming. Because of a significant reduction or elimination of collapse or deformation phenomenon in the semiconductor structure, a problem associated with short circuits due to direct contact between the semiconductor components can be mitigated, and reliability of the semiconductor structures can be enhanced. As a result, a yield of the semiconductor structure is increased.

Abstract: A hub system control method, for controlling a hub which has a maximum bandwidth and is connected to a plurality of monitors, comprising: acquiring resolutions and refresh rates of each one of the monitors by the hub; computing used bandwidths of each one of the monitors according to the resolutions and the refresh rates; and controlling the hub to operate corresponding to at least one relation between the used bandwidths and the maximum bandwidth.

Abstract: The present application discloses a semiconductor device with capacitors having a shared electrode and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a first capacitor unit, a second capacitor unit, and a connection structure. The first capacitor unit includes a bottom conductive structure inwardly positioned in the substrate, and a shared conductive layer positioned above the bottom conductive structure with a first insulating layer interposed therebetween. The second capacitor unit includes the shared conductive layer, a top conductive layer positioned above the shared conductive layer with a second insulating layer interposed therebetween. The connection structure electrically connects the bottom conductive structure and the top conductive layer such that the first capacitor unit and the second capacitor unit are in parallel.

Abstract: A hub system control method, for controlling a hub which has a maximum bandwidth and is connected to a plurality of monitors, comprising: acquiring resolutions and refresh rates of each one of the monitors by the hub; computing used bandwidths of each one of the monitors according to the resolutions and the refresh rates; and controlling the hub to operate corresponding to at least one relation between the used bandwidths and the maximum bandwidth.

Abstract: The application discloses a power supply circuit and a power supply device. A drain of a first N-type metal-oxide-semiconductor field-effect transistor (MOSFET) receives a first input voltage. A filter is coupled to a source of the first N-type MOSFET and is configured to output an output voltage. A non-inverting input terminal of an operational amplifier is coupled to a ground terminal through a first capacitor. A control circuit is coupled to an inverting input terminal of the operational amplifier. One terminal of a switch is coupled to a gate of the first N-type MOSFET, and the other terminal is switchably coupled to the control circuit or an output terminal of the operational amplifier, so that the gate of the first N-type MOSFET is switched to be coupled to the control circuit or the output terminal of the operational amplifier.

Abstract: A semiconductor structure includes a substrate, an isolation layer, a dielectric layer, an insulation layer, a conductor and a capping layer. The substrate has a concave portion. The isolation layer is located on a top surface of the substrate. The dielectric layer is located on the isolation layer. The insulation layer is located on a surface of the concave portion and extends to a sidewall of the isolation layer. The conductor is located on the insulation layer in the concave portion. The conductor has a first top surface and a second top surface, and the first top surface is closer to the dielectric layer than the second top surface. The capping layer is located in the concave portion and covers the conductor.

Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes steps of creating at least one trench in a substrate; depositing a conductive material to partially fill the trench; and forming an insulative piece in the trench and extending into the conductive material.

Abstract: Various powered wheeled board vehicles are disclosed. In some embodiments, the vehicle includes a deck having a forward portion and a rearward portion. At least one front wheel can be connected with the deck under the forward portion. The front wheel can be configured to swivel about a first axis and rotate about a second axis. A powered wheel can be connected with the rearward portion. In some configurations, the rear wheel comprises a hub motor.

Abstract: A ride-on vehicle, such as for a child, includes a vehicle body and one or more wheels that support the vehicle body relative to a surface. At least one of the wheels includes a hub motor arrangement that provides a drive torque for propelling the vehicle. The hub motor arrangement includes a housing defining an interior space. An axle or other mounting element(s) define an axis of rotation of the housing. Preferably, the axle or other mounting element(s) do not pass completely through the housing. A motor drives the housing through a transmission. Preferably, the motor is a standard, compact motor that is positioned on the axis of rotation and can be laterally offset from a central plane of the housing. In some embodiments, a traction element is carried directly by the housing.

Abstract: The present wireless remote control device is a type of equipment with non-tethered optical stimulation. The characteristic of this device is designed to utilize a magnetic resonance technique to modify the deficits of the conventional magnetic induction or radio-frequency power source. Compared to the other devices of photostimulation, the advantages are as follow: there is a strong and even electromagnetic power; the cost is cheaper than the previous others; the device uses the receiver coil on an animal's head to receive the magnetic power from the transformation of the electrical power in the outside big coil, and thus the weight of the receiver coil on the head is very light. The light and miniaturized coil on the head without battery could give animals more convenience in freely movement, and the behavior of animals can be controlled by the effective extent of the electromagnetic field through photostimulation.

Abstract: The present application provides a memory device with air gaps for reducing capacitive coupling. The memory device includes: a substrate, a word line, a bit line, a conductive pillar, a landing pad and a storage capacitor. The substrate has an active region. The word line is formed in the substrate and intersected with the active region. The bit line extends over the substrate and electrically connected to the active region. The conductive pillar is disposed over the substrate and electrically connected to the active region. The conductive pillar and the bit line are located at opposite sides of the word line. The landing pad is disposed on and electrically connected to the conductive pillar. A sidewall of the conductive pillar is laterally recessed from a sidewall of the landing pad. The storage capacitor is disposed over and electrically connected to the landing pad.

Abstract: The present disclosure relates to an electrical fuse (e-fuse) device and a method for forming the electrical fuse device. The vertical e-fuse device includes a fuse link disposed over a semiconductor base. A material of the fuse link and a material of the semiconductor base are the same. The vertical e-fuse device also includes a first bottom anode/cathode region and a second bottom anode/cathode region disposed over the semiconductor base. A bottom portion of the fuse link is sandwiched between the first bottom anode/cathode region and the second anode/cathode region. The vertical e-fuse device further includes a top anode/cathode region disposed over the fuse link.

Abstract: The present application discloses a method for fabricating a semiconductor device with capacitors having a shared electrode. The method includes providing a substrate, forming a first trench in the substrate, doping sidewalls and a bottom surface of the first trench to form a bottom conductive structure, forming a first insulating layer on the bottom conductive structure and in the first trench, forming a shared conductive layer on the first insulating layer, forming a second insulating layer on the shared conductive layer, forming a top conductive layer on the second insulating layer, and forming a connection structure electrically connecting the bottom conductive structure and the top conductive layer. The bottom conductive structure, the first insulating layer, and the shared conductive layer together configure a first capacitor unit. The shared conductive layer, the second insulating layer, and the top conductive layer together configure a second capacitor unit.