Patents by Inventor Chih-Wei Lin

Chih-Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11456226
    Abstract: A semiconductor package including a circuit substrate, an interposer structure, a plurality of dies, and an insulating encapsulant is provided. The interposer structure is disposed on the circuit substrate. The plurality of dies is disposed on the interposer structure, wherein the plurality of dies is electrically connected to the circuit substrate through the interposer structure. The insulating encapsulant is disposed on the circuit substrate, wherein the insulating encapsulant surrounds the plurality of dies and the interposer structure and encapsulates at least the interposer structure, the insulating encapsulant has a groove that surrounds the interposer structure and the plurality of dies, and the interposer structure and the plurality of dies are confined to be located within the groove.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Cheng Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu, Chih-Wei Lin
  • Patent number: 11446851
    Abstract: A molding apparatus is configured for molding a semiconductor device and includes a lower mold and an upper mold. The lower mold is configured to carry the semiconductor device. The upper mold is disposed above the lower mold for receiving the semiconductor device and includes a mold part and a dynamic part. The mold part is configured to cover the upper surface of the semiconductor device. The dynamic part is disposed around a device receiving region of the upper mold and configured to move relatively to the mold part. A molding method and a molded semiconductor device are also provided.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: September 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Feng Weng, Ching-Hua Hsieh, Chung-Shi Liu, Chih-Wei Lin, Sheng-Hsiang Chiu, Yao-Tong Lai, Chia-Min Lin
  • Publication number: 20220288153
    Abstract: The present invention features interferon-free therapies for the treatment of HCV. Preferably, the treatment is over a shorter duration of treatment, such as no more than 12 weeks. In one aspect, the treatment comprises administering at least two direct acting antiviral agents and ribavirin to a subject with HCV infection, wherein the treatment lasts for 12 weeks and does not include administration of interferon, and said at least two direct acting antiviral agents comprise (a) Compound 1 or a pharmaceutically acceptable salt thereof and (b) Compound 2 or a pharmaceutically acceptable salt thereof.
    Type: Application
    Filed: September 24, 2021
    Publication date: September 15, 2022
    Applicant: AbbVie Inc.
    Inventors: Walid M. Awni, Barry M. Bernstein, Andrew L. Campbell, Sandeep Dutta, Chih-Wei Lin, Wei Liu, Rajeev M. Menon, Thomas J. Podsadecki, Tianli Wang, Sven Mensing
  • Patent number: 11441943
    Abstract: The present invention provides a proximity sensing device, which comprises an ambient light calibration digital-to-analog converter and at least one crosstalk calibration digital-to-analog converters. The proximity sensing device is able to quickly generate calibration parameters for the interference caused by the ambient list and crosstalk caused by different reflection, to calibrate the sensed signals to avoid wrong judgments.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: September 13, 2022
    Assignee: LUXSENTEK MICROELECTRONICS CORP.
    Inventors: Chih-Wei Lin, Chen-Hua Hsi
  • Publication number: 20220278031
    Abstract: A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A conductive region is disposed in the polymer region and electrically coupled to the redistribution line. The conductive region includes a second flat top surface not higher than the first flat top surface.
    Type: Application
    Filed: May 18, 2022
    Publication date: September 1, 2022
    Inventors: Ching-Wen Hsiao, Ming-Da Cheng, Chih-Wei Lin, Chen-Shien Chen, Chih-Hua Chen, Chen-Cheng Kuo
  • Patent number: 11432381
    Abstract: The present invention provides a photosensor device with temperature compensation, which can adjust or calibrate the number, time and power of luminescence of light emitting elements under different ambient temperatures, so that the light signal values received by the photosensor device can be kept consistent or within the error range, there are multiple applications.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: August 30, 2022
    Assignee: LUXSENTEK MICROELECTRONICS CORP.
    Inventors: Sheng-Cheng Lee, Wen-Sheng Lin, Chih-Wei Lin, Chen-Hua Hsi
  • Patent number: 11424213
    Abstract: A semiconductor structure includes a semiconductor wafer, a first surface mount component, a second surface mount component and a first barrier structure. The first surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of first electrical connectors. The second surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of second electrical connectors, wherein an edge of the second surface mount component is overhanging a periphery of the semiconductor wafer. The first barrier structure is disposed on the semiconductor wafer in between the second electrical connectors and the edge of the second surface mount component, wherein a first surface of the first barrier structure is facing the second electrical connectors, and a second surface of the first barrier structure is facing away from the second electrical connectors.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: August 23, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Chih-Wei Lin, Hao-Yi Tsai, Kuo-Lung Pan, Chun-Cheng Lin, Tin-Hao Kuo, Yu-Chia Lai, Chih-Hsuan Tai
  • Patent number: 11415459
    Abstract: The present invention provides a photosensor device, which can cancel a dark current in 1-2 milliseconds. This photosensor device utilizes a small capacitor to quickly accumulate and transform the dark current to a dark-current voltage. Based on the dark-current voltage and an environment temperature, a calibration voltage can be obtained. By cancelling the calibration voltage from the sensed voltage to get a light voltage, which can be amplified to a lux signal. The process is very quick and sensitive, so the photosensor device can be used in an environment under a low luminance.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: August 16, 2022
    Assignee: LUXSENTEK MICROELECTRONICS CORP.
    Inventors: Chih-Wei Lin, Chen-Hua Hsi
  • Patent number: 11404381
    Abstract: A chip package is provided. The chip package includes a semiconductor die and a protection layer surrounding the semiconductor die. The chip package also includes a first dielectric layer over the semiconductor die and the protection layer. The first dielectric layer has an upper surface with cutting scratches. The chip package further includes a conductive layer over the first dielectric layer. In addition, the chip package includes a second dielectric layer over the conductive layer and filling some of the cutting scratches. Bottoms of the cutting scratches are positioned at height levels that are lower than a topmost surface of the first dielectric layer and higher than a topmost surface of the semiconductor die.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: August 2, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Shing-Chao Chen, Chih-Wei Lin, Tsung-Hsien Chiang, Ming-Da Cheng, Ching-Hua Hsieh
  • Publication number: 20220238407
    Abstract: Three-dimensional integrated circuit (3DIC) structures and methods of forming the same are provided. A 3DIC structure includes a semiconductor package, a first package substrate, a molded underfill layer and a thermal interface material. The semiconductor package is disposed over and electrically connected to the first package substrate through a plurality of first bumps. The semiconductor package includes at least one semiconductor die and an encapsulation layer aside the semiconductor die. The molded underfill layer surrounds the plurality of first bumps and a sidewall of the semiconductor package, and has a substantially planar top surface. The CTE of the molded underfill layer is different from the CTE of the encapsulation layer of the semiconductor package. The thermal interface material is disposed over the semiconductor package.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Min Lin, Ching-Hua Hsieh, Chih-Wei Lin, Sheng-Hsiang Chiu, Sheng-Feng Weng, Yao-Tong Lai
  • Publication number: 20220238584
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.
    Type: Application
    Filed: April 13, 2022
    Publication date: July 28, 2022
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Wu-Hsi Lu, Ming-Cheng Lo, Wei-Lun Chung, Chih-Wei Lin
  • Publication number: 20220223542
    Abstract: A semiconductor device includes a circuit substrate, a semiconductor package, and a package frame. The semiconductor package is disposed on the circuit substrate. The package frame is disposed over the circuit substrate. The package frame encircles the semiconductor package. The semiconductor package has a first surface facing the circuit substrate and a second surface opposite to the first surface. The package frame leaves exposed at least a portion of the second surface of the semiconductor package. The package frame forms a cavity, which cavity encircles the semiconductor package.
    Type: Application
    Filed: January 14, 2021
    Publication date: July 14, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Lin, Chun-Yen Lan, Tzu-Ting Chou, Tzu-Shiun Sheu, Chih-Wei Lin, Shih-Peng Tai, Wei-Cheng Wu, Ching-Hua Hsieh
  • Patent number: 11387171
    Abstract: A method of packaging a semiconductor die includes connecting an interposer frame directly to a substrate, wherein the interposer frame has a plurality of conductive columns. The method further includes attaching the semiconductor die to the substrate in an opening of the interposer frame, wherein the semiconductor die directly contacts the substrate. The method further includes forming a molding compound to fill space between the semiconductor die and the interposer frame. The method further includes removing a portion of the molding compound to expose the plurality of conductive columns. The method further includes forming a redistribution layer directly contacting a top surface of the semiconductor die and a top surface of the interposer frame.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: July 12, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hui-Min Huang, Shou-Cheng Hu, Chih-Wei Lin, Ming-Da Cheng, Chung-Shi Liu, Chen-Shien Chen
  • Publication number: 20220205839
    Abstract: The present invention provides a photosensor device, which can cancel a dark current in 1-2 milliseconds. This photosensor device utilizes a small capacitor to quickly accumulate and transform the dark current to a dark-current voltage. Based on the dark-current voltage and an environment temperature, a calibration voltage can be obtained. By cancelling the calibration voltage from the sensed voltage to get a light voltage, which can be amplified to a lux signal. The process is very quick and sensitive, so the photosensor device can be used in an environment under a low luminance.
    Type: Application
    Filed: March 9, 2021
    Publication date: June 30, 2022
    Inventors: CHIH-WEI LIN, CHEN-HUA HSI
  • Patent number: 11362089
    Abstract: Semiconductor structures and method for forming the same are provided. The method for manufacturing the semiconductor structure includes forming a first gate dielectric layer over a substrate and forming a first capping layer over the first gate dielectric layer. The method for manufacturing the semiconductor structure includes oxidizing the first capping layer to form a first capping oxide layer and forming a first work function metal layer over the first capping oxide layer. The method for manufacturing the semiconductor structure includes forming a first gate electrode layer over the first work function metal layer.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: June 14, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Wei Lin, Chih-Lin Wang, Kang-Min Kuo, Cheng-Wei Lian
  • Publication number: 20220165689
    Abstract: A package structure includes a semiconductor device, a molding compound, a first dielectric layer, and a through-via. The molding compound is in contact with a sidewall of the semiconductor device. The first dielectric layer is over the molding compound and the semiconductor device. The through-via is in the molding compound and the first dielectric layer. The through-via is a continuous element and in contact with the first dielectric layer.
    Type: Application
    Filed: February 13, 2022
    Publication date: May 26, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hsuan TAI, Ting-Ting KUO, Yu-Chih HUANG, Chih-Wei LIN, Hsiu-Jen LIN, Chih-Hua CHEN, Ming-Da CHENG, Ching-Hua HSIEH, Hao-Yi TSAI, Chung-Shi LIU
  • Publication number: 20220163386
    Abstract: The present invention provides a proximity sensing device, which comprises an ambient light calibration digital-to-analog converter and at least one crosstalk calibration digital-to-analog converters. The proximity sensing device is able to quickly generate calibration parameters for the interference caused by the ambient list and crosstalk caused by different reflection, to calibrate the sensed signals to avoid wrong judgments.
    Type: Application
    Filed: February 5, 2021
    Publication date: May 26, 2022
    Inventors: Chih-Wei LIN, Chen-Hua HSI
  • Patent number: 11342253
    Abstract: A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A conductive region is disposed in the polymer region and electrically coupled to the redistribution line. The conductive region includes a second flat top surface not higher than the first flat top surface.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: May 24, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Wen Hsiao, Ming-Da Cheng, Chih-Wei Lin, Chen-Shien Chen, Chih-Hua Chen, Chen-Cheng Kuo
  • Patent number: 11335717
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: May 17, 2022
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Wu-Hsi Lu, Ming-Cheng Lo, Wei-Lun Chung, Chih-Wei Lin
  • Patent number: 11324899
    Abstract: A nebulizer with orientation independent operation is provided. The nebulizer includes an outer tube, an inner tube provided in the outer tube, and a mesh structure disposed above an end of the outer tube. A first channel, a main channel, and a second channel are formed between the outer tube and the inner tube. When in use, capillary force is created in the main channel, such that a liquid contained in the inner tube can be transported sequentially through the second channel, the main channel, and the first channel to the mesh structure. The liquid is nebulized and dispersed into the air through vibrations of the mesh structure actuated by an annular vibration source.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: May 10, 2022
    Assignee: National Taiwan University
    Inventors: Chih-Chieh Chen, Sheng-Hsiu Huang, Chih-Wei Lin, Yu-Mei Kuo, Wei-Ren Ke