Patents by Inventor Chih-Yang Chang

Chih-Yang Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8963114
    Abstract: The present disclosure provides a resistive random access memory (RRAM) cells and methods of making the same. The RRAM cell includes a transistor and an RRAM structure. The RRAM structure includes a bottom electrode having a via portion and a top portion, a resistive material layer on the bottom electrode having a width that is same as a width of the top portion of the bottom electrode; a capping layer over the bottom electrode, a first spacer surrounding the capping layer and a top electrode, a second spacer surround the top portion of the bottom electrode and the first spacer, and the top electrode. The RRAM cell further includes a conductive material connecting the top electrode of the RRAM structure to a metal layer.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: February 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wen Liao, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang, Hsia-Wei Chen, Ching-Pei Hsieh
  • Patent number: 8952347
    Abstract: A method for forming a resistive memory cell within a memory array includes forming a patterned stopping layer on a first metal layer formed on a substrate and forming a bottom electrode into features of the patterned stopping layer. The method further includes forming a resistive memory layer. The resistive memory layer includes a metal oxide layer and a top electrode layer. The method further includes patterning the resistive memory layer so that the top electrode layer acts as a bit line within the memory array and a top electrode of the resistive memory cell.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: February 10, 2015
    Assignee: Taiwan Semiconductor Manfacturing Company, Ltd.
    Inventors: Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Hsia-Wei Chen, Yu-Wen Liao, Chin-Chieh Yang
  • Patent number: 8933499
    Abstract: In some embodiments, a circuit element includes a first FET and a first storage capacitor. The first FET includes a gate stack, a first source or drain region, a second source or drain region and a body structure. The gate stack is configured over the body structure. The first source or drain region and the second source or drain region are configured on opposite sides of the gate stack. The first storage capacitor includes an anode and a cathode. The first source or drain region is coupled to the anode of the first storage capacitor non-selectively, and does not have stressor material with a lattice constant different from that of a channel region in the body structure. The second source or drain structure is coupled to the anode of the first storage capacitor selectively, and has the stressor material.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: January 13, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventor: Chih-Yang Chang
  • Patent number: 8921818
    Abstract: A semiconductor structure includes a resistance variable memory structure. The semiconductor structure also includes a dielectric layer. The resistance variable memory structure is over the dielectric layer. The resistance variable memory structure includes a first electrode disposed over the dielectric layer. The first electrode has a sidewall surface. A resistance variable layer has a first portion which is disposed over the sidewall surface of the first electrode and a second portion which extends from the first portion away from the first electrode. A second electrode is over the resistance variable layer.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: December 30, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Chi Tu, Wen-Ting Chu, Chin-Chieh Yang, Yu-Wen Liao, Hsia-Wei Chen, Chih-Yang Chang
  • Patent number: 8907575
    Abstract: A light source device with an LED module includes a load module. The load module includes a voltage-regulating unit and a constant current controlling unit parallel-connected between a first output end and a second output end of the voltage-regulating unit. An input end of the voltage-regulating unit is connected to a positive end of a voltage source. The voltage-regulating unit generates a stable voltage difference of less than 1.6V between the first and second output ends. The LED module receives a residual voltage equal to the result of subtracting from the output voltage of the voltage source the voltage difference consumed by the load module. The amount by which the residual voltage exceeds the operating voltage required for the entire LED string never exceeds safe voltage values. Even if a voltage source changes, the voltage-regulating unit can still generate a stable voltage difference and a stable current.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: December 9, 2014
    Assignee: Rui Teng Opto Technology Co., Ltd.
    Inventor: Chih-Yang Chang
  • Patent number: 8908415
    Abstract: A resistive memory cell includes a switch and a resistive switching device. The switch includes a first terminal connected to a select line and a gate terminal connected to a word line. The resistive switching device is connected between a second terminal of the switch and a bit line. The resistive switching device is resettable by having a positive bias applied to the word line and a negative bias applied to the bit line.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: December 9, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Chieh Yang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Chih-Yang Chang, Hsia-Wei Chen
  • Publication number: 20140264233
    Abstract: A semiconductor structure includes a memory region. A memory structure is disposed on the memory region. The memory structure includes a first electrode, a resistance variable layer, protection spacers and a second electrode. The first electrode has a top surface and a first outer sidewall surface on the memory region. The resistance variable layer has a first portion and a second portion. The first portion is disposed over the top surface of the first electrode and the second portion extends upwardly from the first portion. The protection spacers are disposed over a portion of the top surface of the first electrode and surround at least the second portion of the resistance variable layer. The protection spacers are configurable to protect at least one conductive path in the resistance variable layer. The protection spacers have a second outer sidewall surface substantially aligned with the first outer sidewall surface of the first electrode.
    Type: Application
    Filed: May 16, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Chi TU, Chih-Yang CHANG, Hsia-Wei CHEN, Yu-Wen LIAO, Chin-Chieh YANG, Wen-Chun YOU, Sheng-Hung SHIH, Wen-Ting CHU
  • Publication number: 20140264234
    Abstract: A semiconductor structure includes a memory region. A memory structure is disposed on the memory region. The memory structure includes a first electrode, a resistance variable layer, a protection material and a second electrode. The first electrode has a top surface on the memory region. The resistance variable layer has at least a first portion and a second portion. The first portion is disposed over the top surface of the first electrode and the second portion extends upwardly from the first portion. The protection material surrounds the second portion of the resistance variable layer. The protection material is configurable to protect at least one conductive path in the resistance variable layer. The second electrode is disposed over the resistance variable layer.
    Type: Application
    Filed: May 16, 2013
    Publication date: September 18, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Chi TU, Chih-Yang CHANG, Hsia-Wei CHEN, Yu-Wen LIAO, Chin-Chieh YANG, Wen-Ting CHU
  • Publication number: 20140264222
    Abstract: The present disclosure provides one embodiment of a resistive random access memory (RRAM) structure. The RRAM structure includes a resistive memory element formed on a semiconductor substrate and designed for data storage; and a field effect transistor (FET) formed on the semiconductor substrate and coupled with the resistive memory element. The FET includes asymmetric source and drain. The resistive element includes a resistive material layer and further includes first and second electrodes interposed by the resistive material layer.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Chieh Yang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Chih-Yang Chang, Hsia-Wei Chen
  • Publication number: 20140254237
    Abstract: Methods for operating memory are disclosed. A method includes applying a select word line voltage to a word line node of a first resistive random access memory (RRAM) cell; applying a first programming voltage to a source line node of the first RRAM cell; and setting the first RRAM cell comprising applying a second programming voltage to a bit line node of the first RRAM cell. The first programming voltage is greater than zero volts, and the second programming voltage is greater than the first programming voltage. Other disclosed methods include concurrently setting and resetting RRAM cells.
    Type: Application
    Filed: March 7, 2013
    Publication date: September 11, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Yang Chang, Wen-Ting Chu, Chia-Fu Lee
  • Publication number: 20140175365
    Abstract: The present disclosure provides a resistive random access memory (RRAM) cell. The RRAM cell includes a transistor, a bottom electrode adjacent to a drain region of the transistor and coplanar with the gate, a resistive material layer on the bottom electrode, a top electrode on the resistive material layer, and a conductive material connecting the bottom electrode to the drain region.
    Type: Application
    Filed: December 20, 2012
    Publication date: June 26, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Yang CHANG, Wen-Ting CHU, Kuo-Chi TU, Yu-Wen LIAO, Hsia-Wei CHEN, Chin-Chieh YANG
  • Patent number: 8757835
    Abstract: In a variable shaped lamp shade of an LED lamp, the lamp shade is made of a translucent material matched with an LED lamp strip and a lamp holder and includes at least one strip-shaped optical refraction unit having an external refractive surface, an internal refractive surface corresponding to the external refractive surface, and an assembling structure for matching the lamp holder. The external refractive surface or internal refractive surface is a curved surface without an inflection point and the curved surface has a constant or gradually changing curvature; and a non-curved surface is formed on the other side. The variable shaped lamp overcomes the problems of conventional LED lamp strips having a low illumination and a non-uniform illumination caused by a direct projection or an installation of a conventional lamp shade, and a low light utility caused by a too-large illumination range.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: June 24, 2014
    Inventors: Chih-Yang Chang, Hsing-Kuei Liu
  • Patent number: 8757834
    Abstract: In a variable shaped lamp shade of an LED lamp, the lamp shade is made of a translucent material matched with an LED lamp strip and a lamp holder and includes at least one strip-shaped optical refraction unit having an external refractive surface, an internal refractive surface corresponding to the external refractive surface, and an assembling structure for matching the lamp holder. The external refractive surface or internal refractive surface is a curved surface without an inflection point and the curved surface has a constant or gradually changing curvature; and a non-curved surface is formed on the other side. The variable shaped lamp overcomes the problems of conventional LED lamp strips having a low illumination and a non-uniform illumination caused by a direct projection or an installation of a conventional lamp shade, and a low light utility caused by a too-large illumination range.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: June 24, 2014
    Inventors: Chih-Yang Chang, Hsing-Kuei Liu
  • Publication number: 20140159594
    Abstract: A light source device with an LED module includes a load module. The load module includes a voltage-regulating unit and a constant current controlling unit parallel-connected between a first output end and a second output end of the voltage-regulating unit. An input end of the voltage-regulating unit is connected to a positive end of a voltage source. The voltage-regulating unit generates a stable voltage difference of less than 1.6V between the first and second output ends. The LED module receives a residual voltage equal to the result of subtracting from the output voltage of the voltage source the voltage difference consumed by the load module. The amount by which the residual voltage exceeds the operating voltage required for the entire LED string never exceeds safe voltage values. Even if a voltage source changes, the voltage-regulating unit can still generate a stable voltage difference and a stable current.
    Type: Application
    Filed: February 7, 2014
    Publication date: June 12, 2014
    Applicant: RUI TENG OPTO TECHNOLOGY CO., LTD.
    Inventor: CHIH-YANG CHANG
  • Patent number: 8742390
    Abstract: A memory cell and method including a first electrode conformally formed through a first opening in a first dielectric layer, a resistive layer conformally formed on the first electrode, a second electrode conformally formed on the resistive layer, and a second dielectric layer conformally formed on the second electrode, the second dielectric layer including a second opening. The first dielectric layer is formed on a substrate including a first metal layer. The first electrode and the resistive layer collectively include a first lip region that extends a first distance beyond a region defined by the first opening. The second electrode and the second dielectric layer collectively include a second lip region that extends a second distance beyond the region defined by the first opening. The second electrode is coupled to a second metal layer using a via that extends through the second opening.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: June 3, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang
  • Publication number: 20140091272
    Abstract: A semiconductor structure includes a resistance variable memory structure. The semiconductor structure also includes a conductive structure. The resistance variable memory structure is over the conductive structure. The resistance variable memory structure includes a first electrode over the conductive structure. A resistance variable layer is disposed over the first electrode. A cap layer is disposed over the resistance variable layer. The cap layer includes a first metal material. A second electrode disposed over the cap layer. The second electrode includes a second metal material different from the first metal material.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Wen LIAO, Wen-Ting CHU, Chin-Chieh YANG, Kuo-Chi TU, Chih-Yang CHANG, Hsia-Wei CHEN
  • Publication number: 20140024220
    Abstract: Methods of fabricating ultra low-k dielectric self-aligned vias are described. In an example, a method of forming a self-aligned via (SAV) in a low-k dielectric film includes forming a trench pattern in a metal nitride hardmask layer formed above a low-k dielectric film formed above a substrate. A via pattern is formed in a masking layer formed above the metal nitride hardmask layer. The via pattern is etched at least partially into the low-k dielectric film, the etching comprising using a plasma etch using a chemistry based on CF4, H2, and a diluent inert gas composition.
    Type: Application
    Filed: December 21, 2012
    Publication date: January 23, 2014
    Inventors: Chih-Yang Chang, Sean S. Kang, Chia-Ling Kao, Nikolaos Bekiaris
  • Patent number: 8547023
    Abstract: A light emitting diode (LED) light source module includes a circuit substrate, a driving IC electrically coupled to the circuit substrate and having at least one input terminal and an output terminal, an LED coupled onto the circuit substrate and electrically coupled to an output terminal of the driving IC, and a packaging layer, having a transparent structure shaped by a colloidal solidification, such that the transparent structure is covered outside the driving IC and LED, and the LED light source module covers the driving IC and LED by the transparent structure of the packaging layer, and serves as a light source module of a lamp directly without the need of installing another driving IC to the lamp, and promotes its extensive use in LED lamps.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: October 1, 2013
    Assignee: Rui Teng Opto Technology Co., Ltd.
    Inventors: Chih-Yang Chang, Su-Wen Lai
  • Publication number: 20130058087
    Abstract: An LED module fixing structure includes an LED module and a threaded column. The LED module includes a circuit substrate, LED particles and an electric wire. A screw hole is formed at the center of the circuit substrate, and a thread is formed around the threaded column, so that the threaded column is secured into the screw hole of the circuit substrate through the thread, or the LED module is installed in a lamp casing, and a screw hole is formed at the center of the lamp casing and provided for securing the threaded column into the screw hole of the lamp casing through the thread. The LED module fixing structure comes with a simple thread fixing structure, and the thread of the threaded column can be installed to another object such as a heat dissipating element to achieve the effects of lowering cost, facilitating installation, and enhancing heat dissipation.
    Type: Application
    Filed: September 6, 2011
    Publication date: March 7, 2013
    Inventor: Chih-Yang CHANG
  • Patent number: 8388180
    Abstract: In a variable shaped lamp shade of an LED lamp, the lamp shade is made of a translucent material matched with an LED lamp strip and a lamp holder and includes at least one strip-shaped optical refraction unit having an external refractive surface, an internal refractive surface corresponding to the external refractive surface, and an assembling structure for matching the lamp holder. The external refractive surface or internal refractive surface is a curved surface without an inflection point and the curved surface has a constant or gradually changing curvature; and a non-curved surface is formed on the other side. The variable shaped lamp overcomes the problems of conventional LED lamp strips having a low illumination and a non-uniform illumination caused by a direct projection or an installation of a conventional lamp shade, and a low light utility caused by a too-large illumination range.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: March 5, 2013
    Inventors: Chih-Yang Chang, Hsing-Kuei Liu