Abstract: A semiconductor device of an embodiment includes, an n-type SiC substrate that has first and second faces, and contains a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D being a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus), the ratio of the concentration of the element A to the concentration of the element D in the combination(s) being higher than 0.40 but lower than 0.95, the concentration of the element D forming the combination(s) being not lower than 1×1018 cm?3 and not higher than 1×1022 cm?3, an SiC layer formed on the first face, a first electrode formed on the first face side, and a second electrode formed on the second face.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type made of silicon carbide; and a second semiconductor layer of a second conductivity type made of silicon carbide, placed in junction with the first semiconductor layer, and containing an electrically inactive element.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, and a first electrode. The first semiconductor region is of a first conductivity type. The second semiconductor region is provided on the first semiconductor region, and is of a second conductivity type. The third semiconductor region is provided on the second semiconductor region, and is of the second conductivity type. The third semiconductor region contains a first impurity of the first conductivity type and a second impurity of the second conductivity type, and satisfies 1<D2/D1<3, where D1 is a first concentration of the first impurity, and D2 is a second concentration of the second impurity. The first electrode is provided on the first, second, and third semiconductor regions. The first electrode is in contact with the second and third semiconductor regions.

Abstract: A manufacturing method of an SiC epitaxial substrate of an embodiment includes performing a first and a second process alternately to form an n type SiC layer, the first process forming a first SiC layer with an epitaxial growth process by using a first source gas containing an n type impurity, and the second process forming a second SiC layer with an epitaxial growth process by using a second source gas containing the n type impurity, the second source gas having a higher atomic ratio between C (carbon) and Si (silicon) (C/Si) than that of the first source gas, a thickness of the second SiC layer being smaller than a thickness of the first SiC layer.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a first electrode, a first insulating section, and a second insulating section. The first semiconductor region includes silicon carbide, is of a first conductivity type and includes first and second parts. The second semiconductor region includes silicon carbide, is of a second conductivity type and is provided on the second part. The third semiconductor region includes silicon carbide, is of the first conductivity type and is provided on the second semiconductor region. The first electrode is provided on the first part and the third semiconductor region. The first insulating section is provided on the third semiconductor region and juxtaposed with the first electrode. The second insulating section is provided between the first electrode and the first part and between the first electrode and the first insulating section.

Abstract: A semiconductor device according to an embodiment includes a first-conductive-type semiconductor substrate; a first-conductive-type first semiconductor layer formed on the semiconductor substrate, and having an impurity concentration lower than that of the semiconductor substrate; a second-conductive-type second semiconductor layer epitaxially formed on the first semiconductor layer; and a second-conductive-type third semiconductor layer epitaxially formed on the second semiconductor layer, and having an impurity concentration higher than that of the second semiconductor layer. The semiconductor device also includes a recess formed in the third semiconductor layer, and at least a corner portion of a side face and a bottom surface is located in the second semiconductor layer.

Abstract: According to one embodiment, a semiconductor device, includes: a first semiconductor region of a first conductivity type; a second semiconductor region provided on the first semiconductor region, an impurity concentration of the second semiconductor region being lower than an impurity concentration of the first semiconductor region; a third semiconductor region of a second conductivity type provided on the second semiconductor region; and a fourth semiconductor region provided on the third semiconductor region or in a portion of the third semiconductor region. A lattice strain of the fourth semiconductor region is greater than a lattice strain of the third semiconductor region.

Abstract: A semiconductor device of an embodiment includes, an n-type SiC substrate that has first and second faces, and contains a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D being a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus), the ratio of the concentration of the element A to the concentration of the element Din the combination (s) being higher than 0.40 but lower than 0.95, the concentration of the element D forming the combination (s) being not lower than 1×1018 cm?3 and not higher than 1×1022 cm?3, an SiC layer formed on the first face, a first electrode formed on the first face side, and a second electrode formed on the second face.

Abstract: According to one embodiment, a semiconductor device, includes: a first semiconductor region of a first conductivity type; a second semiconductor region provided on the first semiconductor region, an impurity concentration of the second semiconductor region being lower than an impurity concentration of the first semiconductor region; a third semiconductor region of a second conductivity type provided on the second semiconductor region; and a fourth semiconductor region provided on the third semiconductor region or in a portion of the third semiconductor region. A lattice strain of the fourth semiconductor region is greater than a lattice strain of the third semiconductor region.

Abstract: A semiconductor device of an embodiment includes, an n-type SiC substrate that has first and second faces, and contains a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D being a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus), the ratio of the concentration of the element A to the concentration of the element D in the combination(s) being higher than 0.40 but lower than 0.95, the concentration of the element D forming the combination(s) being not lower than 1×1018 cm?3 and not higher than 1×1022 cm?3, an SiC layer formed on the first face, a first electrode formed on the first face side, and a second electrode formed on the second face.

Abstract: A manufacturing method of an SiC epitaxial substrate of an embodiment includes performing a first and a second process alternately to form an n type SiC layer, the first process forming a first SiC layer with an epitaxial growth process by using a first source gas containing an n type impurity, and the second process forming a second SiC layer with an epitaxial growth process by using a second source gas containing the n type impurity, the second source gas having a higher atomic ratio between C (carbon) and Si (silicon) (C/Si) than that of the first source gas, a thickness of the second SiC layer being smaller than a thickness of the first SiC layer.

Abstract: A semiconductor device of an embodiment includes: an n-type first SiC epitaxial layer; a p-type second SiC epitaxial layer provided on the first SiC epitaxial layer and contains a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D forming a combination of Al, Ga, or In and N, and/or a combination of B and P, the ratio of the concentration of the element D to the concentration of the element A in the combination(s) being higher than 0.33 but lower than 1.0; n-type first and second SiC regions provided in the surface of the second SiC epitaxial layer; a gate insulating film; a gate electrode; a first electrode provided on the second SiC region; and a second electrode provided on the opposite side from the first electrode.

Abstract: A semiconductor device of an embodiment includes an n-type SiC impurity region containing a p-type impurity and an n-type impurity. Where the p-type impurity is an element A and the n-type impurity is an element D, the element A and the element D form a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus). The ratio of the concentration of the element A to the concentration of the element D in the above combination is higher than 0.40 but lower than 0.95, and the concentration of the element D forming the above combination is not lower than 1×1018 cm?3 and not higher than 1×1022 cm?3.

Abstract: One embodiment of a semiconductor device includes: a silicon carbide substrate including first and second principal surfaces; a first-conductive-type silicon carbide layer on the first principal surface; a second-conductive-type first silicon carbide region at a surface of the first silicon carbide layer; a first-conductive-type second silicon carbide region at the surface of the first silicon carbide region; a second-conductive-type third silicon carbide region at the surface of the first silicon carbide region; a second-conductive-type fourth silicon carbide region formed between the first silicon carbide region and the second silicon carbide region, and having an impurity concentration higher than that of the first silicon carbide region; a gate insulator; a gate electrode formed on the gate insulator; an inter-layer insulator; a first electrode connected to the second silicon carbide region and the third silicon carbide region; and a second electrode on the second principal surface.

Abstract: A semiconductor device of an embodiment includes: an n-type first SiC epitaxial layer; a p-type second SiC epitaxial layer on the first SiC epitaxial layer containing a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D forming a combination of Al, Ga, or In and N, and/or a combination of B and P, the ratio of the concentration of the element D to the element A being higher than 0.33 but lower than 1.0; a surface region at the surface of the second SiC epitaxial layer containing the element A at a lower concentration than in the second SiC epitaxial layer, the ratio being higher than in the second SiC epitaxial layer; n-type first and second SiC regions; a gate insulating film; a gate electrode; a first electrode; and a second electrode.

Abstract: A method of manufacturing a semiconductor device of an embodiment includes: preparing a substrate; and growing a p-type SiC single-crystal layer on the surface of the substrate from a liquid phase that contains Si (silicon), C (carbon), a p-type impurity, and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D forming a first combination that is at least one combination selected from Al (aluminum) and N (nitrogen), Ga (gallium) and N (nitrogen), and In (indium) and N (nitrogen), and/or a second combination of B (boron) and P (phosphorus), the ratio of the concentration of the element D to the concentration of the element A in the first or second combination being higher than 0.33 but lower than 1.0.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, and a third semiconductor region. The first semiconductor region includes silicon carbide. A conductivity type of the first semiconductor region is a first conductivity type. The second semiconductor region includes silicon carbide. A conductivity type of the second semiconductor region is a second conductivity type. The third semiconductor region includes silicon carbide. A conductivity type of the third semiconductor is the second conductivity type. The third semiconductor region is provided between the first semiconductor region and the second semiconductor region. As viewed in a direction connecting the first semiconductor region and the second semiconductor region, an area of an overlapping region of the second semiconductor region and the third semiconductor region is smaller than an area of an overlapping region of the first semiconductor region and the second semiconductor region.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a first electrode, a first insulating section, and a second insulating section. The first semiconductor region includes silicon carbide, is of a first conductivity type and includes first and second parts. The second semiconductor region includes silicon carbide, is of a second conductivity type and is provided on the second part. The third semiconductor region includes silicon carbide, is of the first conductivity type and is provided on the second semiconductor region. The first electrode is provided on the first part and the third semiconductor region. The first insulating section is provided on the third semiconductor region and juxtaposed with the first electrode. The second insulating section is provided between the first electrode and the first part and between the first electrode and the first insulating section.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, and a first electrode. The first semiconductor region is of a first conductivity type. The second semiconductor region is provided on the first semiconductor region, and is of a second conductivity type. The third semiconductor region is provided on the second semiconductor region, and is of the second conductivity type. The third semiconductor region contains a first impurity of the first conductivity type and a second impurity of the second conductivity type, and satisfies 1<D2/D1<3, where D1 is a first concentration of the first impurity, and D2 is a second concentration of the second impurity. The first electrode is provided on the first, second, and third semiconductor regions. The first electrode is in contact with the second and third semiconductor regions.

Abstract: A semiconductor device according to an embodiment includes an i-type or a p-type first diamond semiconductor layer, an n-type second diamond semiconductor layer provided on the first diamond semiconductor layer, a mesa structure and an n-type first diamond semiconductor region provided on the side surface. The mesa structure includes the first diamond semiconductor layer, the second diamond semiconductor layer, a top surface with a plane orientation of ±10 degrees or less from a {100} plane, and a side surface inclined by 20 to 90 degrees with respect to a direction of <011>±20 degrees from the {100} plane. The first diamond semiconductor region is in contact with the second diamond semiconductor layer and has an n-type impurity concentration lower than an n-type impurity concentration of the second diamond semiconductor layer.