Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip may comprise a first metal line disposed over a substrate. A via may be disposed directly over a top of the first metal line and the via may comprise a first lower surface and a second lower surface above the first lower surface. A first dielectric structure may be disposed laterally adjacent to the first metal line and may be disposed along a sidewall of the first metal line. A first protective etch-stop structure may be disposed directly over a top of the first dielectric structure and the first protective etch-stop structure may vertically separate the second lower surface of the via from the top of the first dielectric structure.

Abstract: Some embodiments relate to a semiconductor structure. The semiconductor structure includes a first substrate including a first plurality of conductive pads that are laterally spaced apart from one another on the first substrate. A first plurality of conductive bumps are disposed on the first plurality of conductive pads, respectively. A multi-tiered solder-resist structure is disposed on the first substrate and arranged between the first plurality of conductive pads. The multi-tiered solder-resist structure has different widths at a different heights over the first substrate and contacts sidewalls of the first plurality of conductive bumps to separate the first plurality of conductive bumps from one another.

Abstract: A method includes receiving a wafer, measuring a surface topography of the wafer; calculating a topographical variation based on the surface topography measurement performing a single-zone alignment compensation when the topographical variation is less than a predetermined value or performing a multi-zone alignment compensation when the topographical variation is greater than the predetermined value; and performing a wafer alignment according to the single-zone alignment compensation or the multi-zone alignment compensation.

Abstract: A centrifugal heat dissipation fan including a housing and an impeller is provided. The housing has at least one inlet disposed along an axis and at least one first outlet and a second outlet located in different radial directions, wherein the first outlet and the second outlet are opposite to and separated from each other. The impeller is disposed in the housing along the axis. A heat dissipation system of an electronic device is also provided.

Abstract: A multi-chip device includes a first material within a substrate. The first material has a first coefficient of thermal expansion different than a second coefficient of thermal expansion of the substrate. A first chip overlies a first portion of the first material and a first portion of the substrate. A second chip overlies a second portion of the first material and a second portion of the substrate. The first material is between the first portion of the substrate and the second portion of the substrate.

Abstract: An electronic window is provided for adjusting light and includes a first panel, a second panel, and an intermediate layer. The first panel includes a first alignment layer. The second panel includes a second alignment layer. The intermediate layer is disposed between the first panel and the second panel. The angle of orientation of the first alignment layer is between 25 degrees and 65 degrees, and the angle of orientation of the second alignment layer is between 115 degrees and 155 degrees.

Abstract: A projection lens projecting an image beam provided by a light valve onto a screen is provided. The projection lens includes first to fourth lenses in order from a screen side to a display side along an optical axis. Each lens has a screen side surface facing the screen side and allowing the image beam to pass, and a display side surface facing the display side and allowing the image beam to pass. The first and third lenses have a negative refractive power, and the second and fourth lenses have a positive refractive power. The projection lens satisfies 2<TTL/f<5. TTL is a distance from the screen side surface of the first lens to the display side surface of the fourth lens on the optical axis. f is an effective focal length of the projection lens. The projection lens covers a wide range of operating temperatures while being lightweight.

Abstract: A power converter that properly copes with the wiring defects on a feedback path is shown. According to a control signal, a power driver couples an input voltage to an energy storage element to provide an output voltage that is down-converted from the input voltage. The output voltage is further converted into a feedback voltage by a feedback circuit, and is entered to an error amplifier with a reference voltage for generation of an amplified error. A control signal generator generates the control signal of the power driver according to the amplified error. The power converter specifically has a comparator, which is enabled in a soft-start stage till the output voltage reaches a stable status. The comparator compares the amplified error with a critical value. When the amplified error exceeds the critical value, the input voltage is disconnected from the energy storage element.

Abstract: A method of growing a single crystal ingot includes growing a single crystal silicon ingot from a silicon melt in a crucible within an inner chamber, adding a volatile dopant into a feed tube, positioning the feed tube within an inner chamber at a first height relative to a surface of the melt, adjusting the feed tube within the inner chamber to a second height at a speed rate, and heating the volatile dopant to form a gaseous dopant as the feed tube is moved from the first height to the second height at the speed rate. Each of the second height and the speed rate are selected to control a vaporization rate of the volatile dopant. The method also includes introducing dopant species into the melt while growing the ingot by contacting the surface of the melt with the gaseous dopant.

Abstract: A method of growing a single crystal ingot includes growing a single crystal silicon ingot from a silicon melt in a crucible within an inner chamber, adding a volatile dopant into a feed tube, positioning the feed tube within an inner chamber at a first height relative to a surface of the melt, adjusting the feed tube within the inner chamber to a second height at a speed rate, and heating the volatile dopant to form a gaseous dopant as the feed tube is moved from the first height to the second height at the speed rate. Each of the second height and the speed rate are selected to control a vaporization rate of the volatile dopant. The method also includes introducing dopant species into the melt while growing the ingot by contacting the surface of the melt with the gaseous dopant.

Abstract: A light emitting diode device includes a substrate, a conductive via, first and second conductive pads, a driving chip, a flat layer, a redistribution layer, a light emitting diode, and an encapsulating layer. The substrate has a first surface and a second surface opposite thereto. The conductive via penetrates from the first surface to the second surface. The first and second conductive pads are respectively disposed on the first and second surface and in contact with the conductive via. The driving chip is disposed on the first surface. The flat layer is disposed over the first surface and covers the driving chip and the first conductive pad. The redistribution layer is disposed on the flat layer and electrically connects to the driving chip. The light emitting diode is flip-chip bonded to the redistribution layer. The encapsulating layer covers the redistribution layer and the light emitting diode.

Abstract: A method for determining a height of a plant, an electronic device, and a storage medium are disclosed. In the method, a target image is obtained by mapping an obtained color image with an obtained depth image. The electronic device processes the color image by using a pre-trained mobilenet-ssd network, obtains a detection box appearance of the plant, and extracts target contours of the plant to be detected from the detection box. The electronic device determines a depth value of each of pixel points in the target contour according to the target image. Target depth values are obtained by performing a de-noising on depth values of the pixel points, and a height of the plant to be detected is determined according to the target depth value. The method improves accuracy of height determination of a plant.

Abstract: A device may include a display that display an image frame that is divided into adjustable regions having respective resolutions based on compensated image data. The device may also include image processing circuitry to generate the compensated image data by applying gains that compensate for burn-in related aging of pixels of the display. The gains are based on an aggregation of history updates indicative of estimated amounts of aging associated with pixel utilization. The circuitry may generate a history update by obtaining boundary data indicative of the boundaries between the adjustable regions, determining an estimated amount of aging, and dynamically resampling the estimated amount of aging by resampling a portion of the estimated amount of aging corresponding to an adjustable region by a factor and resampling of a different portion of the estimated amount of aging corresponding to another adjustable region by a different factor based on the boundary data.

Abstract: A resource allocation method comprises using resources with a used resource quantity of a machine learning system to execute a first experiment which has a first minimum resource demand, receiving an experiment request associated with a target dataset, deciding a second experiment according to the target dataset, deciding a second minimum resource demand of the second experiment, allocating resources with a quantity equal to the second minimum resource demand for an execution of the second experiment when a total resource quantity of the machine learning system meets a sum of the first minimum resource demand and the second minimum resource demand and a difference between the total resource quantity and the used resource quantity meets the second minimum resource demand, determining that the machine learning system has an idle resource, and selectively allocating said the idle resource for at least one of the first experiment and the second experiment.

Abstract: An electronic device including a bracket and an antenna is provided. The bracket includes first, second, third, and fourth surfaces. The antenna includes a radiator. The radiator includes first, second, third, and fourth portions. The first portion is located on the first surface and includes connected first and second sections. The second portion is located on the second surface and includes third, fourth, fifth, and sixth sections. The third section, the fourth section, and the fifth sections are bent and connected to form a U shape. The third portion is located on the third surface and is connected to the second section and the fourth section. The fourth portion is located on the fourth surface and is connected to the fifth section, the sixth section, and the third portion. The radiator is adapted to resonate at a low frequency band and a first high frequency band.

Abstract: A method for detecting defects on a wafer including the steps of obtaining a reference image of a chip pattern formed on a reference wafer, using a computer algorithm to analyze the reference image to produce a division map for the chip pattern; setting respective thresholds for divisions of the division map, obtaining a comparison data between a test image of the chip pattern formed on a test wafer and the reference image, using the division map and the thresholds to examine the comparison data to identify a defect in the test image.

Abstract: A magnetic tunnel junction (MTJ) device includes two magnetic tunnel junction elements and a magnetic shielding layer. The two magnetic tunnel junction elements are arranged side by side. The magnetic shielding layer is disposed between the magnetic tunnel junction elements. A method of forming said magnetic tunnel junction (MTJ) device includes the following steps. An interlayer including a magnetic shielding layer is formed. The interlayer is etched to form recesses in the interlayer. The magnetic tunnel junction elements fill in the recesses. Or, a method of forming said magnetic tunnel junction (MTJ) device includes the following steps. A magnetic tunnel junction layer is formed. The magnetic tunnel junction layer is patterned to form magnetic tunnel junction elements. An interlayer including a magnetic shielding layer is formed between the magnetic tunnel junction elements.

Abstract: A device includes a substrate; semiconductor fins extending from the substrate; a liner layer on sidewalls of the semiconductor fins; an etch stop layer over the substrate and extending laterally from a first portion of the liner layer on a first one of the semiconductor fins to a second portion of the line layer on a second one of the semiconductor fins; an isolation structure over the etch stop layer, wherein the etch stop layer and the isolation structure include different materials; a gate dielectric layer over a top surface of the isolation structure; and a dielectric feature extending through the gate dielectric layer and into the isolation structure, wherein the isolation structure and the dielectric feature collectively extend laterally from the first portion of the liner layer to the second portion of the line layer.

Abstract: The light emitting diode packaging structure includes a flexible substrate, a first adhesive layer, micro light emitting elements, a conductive pad, a redistribution layer, and an electrode pad. The first adhesive layer is disposed on the flexible substrate. The micro light emitting elements are disposed on the first adhesive layer and have a first surface facing to the first adhesive layer and an opposing second surface. The micro light emitting elements include a red micro light emitting element, a blue micro light emitting element, and a green micro light emitting element. The conductive pad is disposed on the second surface of the micro light emitting element. The redistribution layer covers the micro light emitting elements and the conductive pad. The electrode pad is disposed on the redistribution layer and is electrically connected to the circuit layer. A thickness of the flexible substrate is less than 100 um.

Abstract: A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.