Patents by Inventor Ching Wang

Ching Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190149618
    Abstract: Systems and methods for a local proxy for service discovery. In some embodiments, an Internet-of-Things (IoT) gateway may include: a processor; and a memory coupled to the processor, the memory including program instructions stored thereon that, upon execution by the processor, cause the IoT gateway to: retrieve, by a service discovery agent, endpoint information maintained by a service discovery server remotely located with respect to the IoT gateway; store the service endpoint information in the memory; receive a service request aimed at a service endpoint; and provide the service endpoint information, from the memory, in response to the service request.
    Type: Application
    Filed: November 14, 2017
    Publication date: May 16, 2019
    Applicant: Dell Products, L.P.
    Inventors: Chen-Hsi Tsai, Yu-Ching Wang, Tzu-Hui Sung, Rezwanul Kabir
  • Publication number: 20190139476
    Abstract: A pixel array substrate includes a substrate, first and second scan lines, data lines, and pixel structures. The first and second scan lines are disposed alternately and are enabled for different time durations in the same frame time. The data lines intersect with the first and second scan lines. Each of the pixel structures includes first and second active devices, and a pixel electrode. The first and second active devices are turned on and off by the first and second scan lines, respectively. The pixel electrode is connected to the first active device which is connected to one of the data lines by being connected to the second active device. A distance between the first and second scan lines adjacent to each other is a third to a half of a pitch of the pixel structures.
    Type: Application
    Filed: September 14, 2018
    Publication date: May 9, 2019
    Applicant: E Ink Holdings Inc.
    Inventors: Shu-Fen Tsai, Jia-Hung Chen, Kuang-Heng Liang, Chih-Ching Wang, Ian French
  • Publication number: 20190131190
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first overlay grating over a substrate. The first overlay grating has a first strip portion and a second strip portion. The method includes forming a first layer over the first overlay grating. The first layer has a first trench elongated in a second elongated axis, the second elongated axis is substantially perpendicular to the first elongated axis, and the first trench extends across the first strip portion and the second strip portion. The method includes forming a second overlay grating over the first layer. The second overlay grating has a third strip portion and a fourth strip portion. The third strip portion and the fourth strip portion are elongated in the first elongated axis and are spaced apart from each other.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Long-Yi CHEN, Jia-Hong CHU, Chi-Wen LAI, Chia-Ching LIANG, Kai-Hsiung CHEN, Yu-Ching WANG, Po-Chung CHENG, Hsin-Chin LIN, Meng-Wei CHEN, Kuei-Shun CHEN
  • Publication number: 20190117616
    Abstract: The present invention relates to a method for inhibiting activity of a protein selected from the group consisting of KDM4A, KDM4B, and KDM4C, comprising the step of exposing the protein to an effective inhibiting amount of a compound having the formula wherein R1 is H or C7O5H8; R2 is H, OH, or OCH3; and R3 is H or OH. The present invention also relates to a method for treating or lessening the severity of a disease, condition, or disorder in which modulation of KDM4A, KDM4B, or KDM4C is beneficial, which method comprises administering to a subject suffering from said disease, condition, or disorder a therapeutically-effective amount of: a) a compound having the formula wherein R1 is H or C7O5H8; R2 is H, OH, or OCH3; and R3 is H or OH; or b) a composition comprising the compound and a pharmaceutically acceptable adjuvant, vehicle, or carrier.
    Type: Application
    Filed: October 20, 2017
    Publication date: April 25, 2019
    Applicant: National Tsing Hua University
    Inventors: Wen-Ching Wang, Hsing-Jien Kung
  • Patent number: 10267958
    Abstract: A display module includes a bottom substrate, a display device having a plurality of display pixels, and a diffusion module. The display pixels are disposed between the bottom substrate and the diffusion module. The diffusion module has a thickness and a haze, wherein the haze of the diffusion module satisfies: A < Haze < B ; wherein A = 0.642 × ( NP ) 0.35 ( NT ) 0.32 ; B = 0.821 × ( NP ) 0.45 ( NT ) 0.60 ; NP = 25400 / PPI 63 ? ? µm ; and NT = T 500 ? ? µm ; wherein PPI is a resolution of the display module, T is the thickness of the diffusion module, and Haze is the haze of the diffusion module.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: April 23, 2019
    Assignee: AU OPTRONICS CORP.
    Inventors: Shang-Ta Tsai, Yu-Ching Wang, Ching-Yan Chao, Li-Wei Shih
  • Patent number: 10270645
    Abstract: A network of switches having ports coupled to other switches or end hosts may be controlled by a controller. The controller may identify whether any switch ports have failed. In response to identifying that a port has failed at a first switch, the controller may modify link aggregation group mappings of the other switches to handle failover. The controller may modify the link aggregation group mapping of each other switch to include a first mapping that includes ports coupled to the first switch and a second mapping that does not include any ports coupled to the first switch. The controller may configure forwarding tables at the switches to forward network packets using the first or second mappings based on network topology information maintained by the controller.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: April 23, 2019
    Assignee: Big Switch Networks, Inc.
    Inventors: Srinivasan Ramasubramanian, Vishnu Emmadi, Sudeep Dilip Modi, Kanzhe Jiang, Kuang-Ching Wang, Gregor Mathias Maier, Mei Yang, Robert W. Sherwood, Mandeep Singh Dhami
  • Publication number: 20190115313
    Abstract: A method of manufacturing a semiconductor structure includes receiving a first substrate including an IMD layer disposed over the first substrate and a plurality of conductive bumps disposed in the IMD layer; receiving a second substrate; disposing a patterned adhesive over the first substrate, wherein at least a portion of the IMD layer is exposed through the patterned adhesive; and bonding the first substrate with the second substrate, wherein a top surface of the at least portion of the IMD layer is exposed through the patterned adhesive after bonding the first substrate with the second substrate.
    Type: Application
    Filed: December 21, 2018
    Publication date: April 18, 2019
    Inventors: ALEXANDER KALNITSKY, YI-YANG LEI, HSI-CHING WANG, CHENG-YU KUO, TSUNG LUNG HUANG, CHING-HUA HSIEH, CHUNG-SHI LIU, CHEN-HUA YU, CHIN-YU KU, DE-DUI LIAO, KUO-CHIO LIU, KAI-DI WU, KUO-PIN CHANG, SHENG-PIN YANG, ISAAC HUANG
  • Patent number: 10250529
    Abstract: A controller implemented on computing equipment may be used to control switches in a network. End hosts may be coupled to the switches. The controller may generate a virtual network topology of virtual switches, virtual routers, and virtual system routers that are distributed over underlying switches in the network. The controller may form virtual switches from respective groups of end hosts, virtual routers from groups of virtual switches that include virtual interfaces that are coupled to virtual switches, and a virtual system router from groups of virtual routers that includes virtual system router interfaces that are coupled to the virtual routers. The controller may control the virtual network topology by generating respective flow table entries based on identified network policies for each of the virtual routers, virtual system routers, and virtual switches. The controller may control the virtual system routers to route packets between the virtual routers.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: April 2, 2019
    Assignee: Big Switch Networks, Inc.
    Inventors: Gregor Mathias Maier, Vishnu Emmadi, Sudeep Dilip Modi, Kanzhe Jiang, Kuang-Ching Wang, Srinivasan Ramasubramanian, Mei Yang, Robert W. Sherwood, Mandeep Singh Dhami
  • Publication number: 20190085505
    Abstract: A cloth structure includes a bottom cloth layer, a biting layer combined with the bottom cloth layer, and a color layer combined with the biting layer. A tissue material polymer forms a substrate which is treated by a non-toxic fluorescent bleaching process to form the bottom cloth layer. A first fluorescent color paste has a first color pigment, and a second fluorescent color paste has a second color pigment. The first fluorescent color paste is coated on the bottom cloth layer to form the biting layer. The second fluorescent color paste is coated on the biting layer, to form the color layer. The surface of the bottom cloth layer is dried, and formaldehyde is removed from the surface of the bottom cloth layer, to form the cloth structure.
    Type: Application
    Filed: September 19, 2017
    Publication date: March 21, 2019
    Inventor: Man-Ching Wang
  • Publication number: 20190067203
    Abstract: A metrology target of a semiconductor device is provided. The metrology target includes a substrate including first and second layers. The first layer includes a first grating, a second grating, and a first dummy structure. The first dummy structure is at least formed between the first grating and the second grating. The second layer is formed over the first layer and includes a third grating and a fourth grating. The first, second, third and fourth gratings are formed based on the first spatial period. The third grating and fourth grating are placed to overlap the first grating and second grating, respectively. The first grating and the third grating are formed with a first positional offset which is along a first direction. The second grating and the fourth grating are formed with a second positional offset which is along a second direction which is opposite to the first direction.
    Type: Application
    Filed: August 31, 2017
    Publication date: February 28, 2019
    Inventors: Long-Yi CHEN, Jia-Hong CHU, Hsin-Chin LIN, Hsiang-Yu SU, Yun-Heng TSENG, Kai-Hsiung CHEN, Yu-Ching WANG, Po-Chung CHENG, Kuei-Shun CHEN, Chi-Kang CHANG
  • Patent number: 10204867
    Abstract: A metrology target of a semiconductor device is provided. The metrology target includes a substrate including first and second layers. The first layer includes a first grating, a second grating, and a first dummy structure. The first dummy structure is at least formed between the first grating and the second grating. The second layer is formed over the first layer and includes a third grating and a fourth grating. The first, second, third and fourth gratings are formed based on the first spatial period. The third grating and fourth grating are placed to overlap the first grating and second grating, respectively. The first grating and the third grating are formed with a first positional offset which is along a first direction. The second grating and the fourth grating are formed with a second positional offset which is along a second direction which is opposite to the first direction.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: February 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Long-Yi Chen, Jia-Hong Chu, Hsin-Chin Lin, Hsiang-Yu Su, Yun-Heng Tseng, Kai-Hsiung Chen, Yu-Ching Wang, Po-Chung Cheng, Kuei-Shun Chen, Chi-Kang CHang
  • Patent number: 10188894
    Abstract: A barbell includes a grip unit, a support unit and a carrier unit. The grip unit includes two frames spaced apart from each other along a first direction, and a grip rod connected between the frames and configured to be gripped by a user's hand. The support unit includes at least one support member that is connected between the frames, that is spaced apart from the grip rod along a second direction transverse to the first direction, and that is configured to abut against a user's forearm. The carrier unit includes two hanging rods extending outwardly and respectively from the frames and located between the grip rod and the at least one support member.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: January 29, 2019
    Inventor: Hua-Ching Wang
  • Publication number: 20190001178
    Abstract: A barbell includes a grip unit, a support unit and a carrier unit. The grip unit includes two frames spaced apart from each other along a first direction, and a grip rod connected between the frames and configured to be gripped by a user's hand. The support unit includes at least one support member that is connected between the frames, that is spaced apart from the grip rod along a second direction transverse to the first direction, and that is configured to abut against a user's forearm. The carrier unit includes two hanging rods extending outwardly and respectively from the frames and located between the grip rod and the at least one support member.
    Type: Application
    Filed: June 29, 2017
    Publication date: January 3, 2019
    Inventor: Hua-Ching WANG
  • Publication number: 20180374543
    Abstract: A decoding method for a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The decoding method includes: reading first data from memory cells of the rewritable non-volatile memory module, wherein the first data includes a first bit stored in a first memory cell; obtaining a storage state of at least one second memory cell which is different from the first memory cell; obtaining first reliability information corresponding to the first bit according to the storage state of the second memory cell, wherein the first reliability information is different from default reliability information corresponding to the first bit; and decoding the first data according to the first reliability information. Therefore, a decoding efficiency can be improved.
    Type: Application
    Filed: August 31, 2017
    Publication date: December 27, 2018
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei Lin, Yu-Cheng Hsu, Szu-Wei Chen, Tien-Ching Wang
  • Publication number: 20180375737
    Abstract: A sensor estimation server and a sensor estimation method thereof are provided. The sensor estimation server receives first sensor values of deploying sensors to each of servers from the servers, and receives added sensor values of deploying added sensor to each of the servers from the servers. The sensor estimation server calculates correlations between the added sensor and the sensors based on the added sensor values and the first sensor values, and selects target sensors accordingly. The sensor estimation server calculates estimation parameters according to the added sensor values and target sensor values of deploying the target sensors to each of servers. The sensor estimation server receives second sensor values of deploying the target sensors to under-test servers from the under-test servers, and calculates a sensor estimation value based on the estimation parameters and the second sensor values.
    Type: Application
    Filed: July 7, 2017
    Publication date: December 27, 2018
    Inventor: Chia-Ching WANG
  • Patent number: 10163849
    Abstract: A method of manufacturing a semiconductor structure, including receiving a first substrate including a plurality of conductive bumps disposed over the first substrate; receiving a second substrate; disposing an adhesive over the first substrate; removing a portion of the adhesive to expose at least one of the plurality of conductive bumps; and bonding the first substrate with the second substrate.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: December 25, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Alexander Kalnitsky, Yi-Yang Lei, Hsi-Ching Wang, Cheng-Yu Kuo, Tsung Lung Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu, Chin-Yu Ku, De-Dui Liao, Kuo-Chio Liu, Kai-Di Wu, Kuo-Pin Chang, Sheng-Pin Yang, Isaac Huang
  • Publication number: 20180364068
    Abstract: An absolute position readout apparatus includes an encoder device and a readout device. The readout device includes multiple first and second magnetic sensing components that correspond to an absolute track of the encoder device, and a third magnetic sensing component and a fourth magnetic sensing components that correspond to an incremental track of the encoder device. The third magnetic sensing component is configured to be spaced apart from the fourth magnetic sensing component by a specific distance, so as to prevent misreading of absolute position information from the first or second magnetic sensing components being at positions corresponding to boundaries between adjacent magnetized regions of the absolute track.
    Type: Application
    Filed: June 14, 2017
    Publication date: December 20, 2018
    Inventors: HENG-SHENG HSIAO, CHI-YUAN CHENG, CHENG-KUO SUNG, TSUNG-SHUNE CHIN, SHENG-CHING WANG, JEN-YUAN CHANG
  • Patent number: 10145709
    Abstract: An absolute position detecting device and method are provided. The absolute position detecting device utilizes the incremental magnetization on a magnetic encoding ruler with two different pole widths, such that elliptical Lissajous curves may be obtained by magnetoresistive sensors. The absolute position may be obtained by determining the region of the signals on the ellipses read by the magnetoresistive sensors.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: December 4, 2018
    Assignee: National Tsing Hua University
    Inventors: Cheng-Yi Lin, Heng-Sheng Hsiao, Sheng-Ching Wang, Tsung-Shune Chin, Cheng-Kuo Sung, Jen-Yuan Chang
  • Publication number: 20180328071
    Abstract: A light-emitting warning rope is provided with one end integrated to a tent and other end integrated to an anchoring point. The light-emitting warning rope is disposed between the anchoring point and the tent to provide a tension to set the tent upright. The rope comprises a light-emitting core and a structural rope. The structural rope comprises a plurality of bearing yarns which is knitted into a strip body with the light-emitting core as an axis, and the strip body knitted by each bearing yarn is knitted in a mesh shape on the radial side and has a plurality of gaps through which light from the light-emitting core is transmitted. In any segment of the rope, the light-emitting core has a stretching length less than that of each bearing yarn, so that the axial tension acts substantially on the bearing yarns when the rope suffers an axial tension.
    Type: Application
    Filed: April 24, 2018
    Publication date: November 15, 2018
    Inventor: CHING WANG
  • Patent number: 10067824
    Abstract: An error processing method for a rewritable non-volatile memory module, a memory storage device and a memory controlling circuit unit are provided. The rewritable non-volatile memory module includes a plurality of memory cells. The error processing method includes: sending a first read command sequence for reading a plurality of bits from the memory cells; performing a first decoding on the bits; determining whether each error belongs to a first type error or a second type error if the bits have at least one error; recording related information of a first error in the at least one error if the first error belongs to the first type error; and not recording the related information of the first error if the first error belongs to the second type error. Accordingly, errors with particular type may be processed suitably.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: September 4, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Wei Lin, Yu-Cheng Hsu, Shao-Wei Yen, Tien-Ching Wang, Yu-Hsiang Lin, Kuo-Hsin Lai, Li-Chun Liang