Abstract: A power semiconductor package comprises a lead frame, a low side field-effect transistor (FET), a high side FET, a capacitor, a resistor, an inductor assembly, a first plurality of bonding wires, and a molding encapsulation. In one example, an entirety of the inductor assembly is disposed at a position higher than an entirety of the low side FET, higher than an entirety of the high side FET, and higher than an entirety of the first plurality of bonding wires. In another example, a bottom surface of the low side FET and a bottom surface of the inductor assembly are co-planar.

Abstract: The current disclosure describes techniques for forming a gate-all-around device where semiconductor layers are released by etching out the buffer layers that are vertically stacked between semiconductor layers in an alternating manner. The buffer layers stacked at different vertical levels include different material compositions, which bring about different etch rates with respect to an etchant that is used to remove at least partially the buffer layers to release the semiconductor layers.

Abstract: The present invention relates to a suction device, including a body. A cavity is disposed in the body. The cavity has a closed end face and an open end face. The open end face forms an end face to suck a workpiece. A tangential nozzle is disposed on a sidewall surface of the cavity. An external fluid enters the cavity through the tangential nozzle along a tangential direction of the cavity. A suction hole is disposed on the closed end face. The suction hole is connected to a suction unit. The suction unit sucks the fluid in the cavity through the suction hole. The suction device can suck a workpiece by using both a rotational flow negative pressure and a negative suction pressure of a fluid in the cavity, and therefore can suppress impact of a workpiece surface on a suction force and generate a larger suction force.

Abstract: The present invention relates to a scalable process for the purification of human cytomegalovirus particles from cell culture medium. In particular, the process involves a two step chromatography process starting with an anion exchange chromatography step followed by a polishing chromatography step selected from mixed mode chromatography or cation exchange chromatography.

Abstract: A display device includes a display module and an optical film. The display module has a through hole. At least one optical film is located on the display module and has an alignment through hole aligned with the through hole and an alignment mark surrounding the alignment through hole.

Abstract: A display apparatus includes a wireless transmission unit and a display panel. The display panel includes a substrate, a plurality of pixel units and a signal line. The substrate includes a display region and a periphery region. The periphery region surrounds the display region. The pixel units are disposed on the display region. Each of the pixel units includes an active device and a pixel electrode. The active device is electrically connected to the pixel electrode. The signal line is on the periphery region. As viewed from a top view, the signal line has an annular shape having a gap and surrounds the display region.

Abstract: A charger comprises a housing, a first multi-layer printed circuit board (PCB), a second multi-layer PCB, and a third multi-layer PCB. The first PCB comprises at least a portion of a primary side circuit. The second PCB comprises at least a portion of a secondary side circuit. The third PCB is perpendicular to the first PCB and the second PCB. An isolation coupling element is disposed on the third PCB. The isolation coupling element comprises a multi-layer PCB. The first PCB comprises a high voltage (HV) semiconductor package. A surface of a die paddle of the HV semiconductor package is exposed from a molding encapsulation of the HV semiconductor package.

Abstract: A method includes depositing a first dielectric layer over a substrate; forming a first dummy metal layer over the first dielectric layer, wherein the first dummy metal layer has first and second portions laterally separated from each other; depositing a second dielectric layer over the first dummy metal layer; etching an opening having an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first dummy metal layer, and a lower portion in the first dielectric layer, wherein a width of the lower portion of the opening is greater than a width of the middle portion of the opening, and a bottom of the opening is higher than a bottom of the first dielectric layer; and forming a dummy via in the opening and a second dummy metal layer over the dummy via and the second dielectric layer.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first overlay grating over a substrate. The first overlay grating has a first strip portion and a second strip portion, and the first strip portion and the second strip portion are elongated in a first elongated axis and are spaced apart from each other. The method includes forming a layer over the first overlay grating. The layer has a first trench elongated in a second elongated axis, the second elongated axis is substantially perpendicular to the first elongated axis, and the first trench extends across the first strip portion and the second strip portion. The method includes forming a second overlay grating over the layer. The second overlay grating has a third strip portion and a fourth strip portion.

Abstract: A touch panel with a single plate includes a plate and a sensing circuit structure. The substrate is taken as a cover. The sensing circuit structure is formed on the plate.

Abstract: The invention provides a 3D histopathology imaging method. The method includes collecting a tissue specimen from a subject, staining the tissue so as to obtain a stained tissue, obtaining, by a microscopy, a 3D image of the stained tissue, and performing an image slicing procedure on the 3D image to generate a plurality of 2D images.

Abstract: An organic light emitting diode (OLED) display panel includes a substrate, a reflective electrode disposed on the substrate, and a pixel define layer (PDL) formed on the substrate and the reflective electrode layer. The reflective electrode layer has multiple reflective structures, and each reflective structure has a first region and a second region. The PDL is provided with multiple openings corresponding to the reflective structures, such that the first region and the second region of each of the reflective structures are exposed in a corresponding one of the openings. Multiple organic emissive structures are correspondingly formed in the openings and covering the reflective structures, forming a plurality of pixels. For each respective pixel of the pixels, a first reflective ratio of the respective pixel corresponding to the first region is greater than a second reflective ratio of the respective pixel corresponding to the second region.

Abstract: A recycled fancy yarn includes at least two core strands forming a warp thread, and at least one ornamental strand that is twined, twisted or wound around the warp thread to form a weft thread. The core strand is formed by a single first monofilament or a single first filament bundle, and the ornamental strand is formed by a single second monofilament or a single second filament bundle. The first monofilament and/or second monofilament is made of an environmentally friendly material; or the recycled fancy yarn can be recycled or naturally decomposed in the environment, such that the quantity of produced wastes can be reduced, and environmental burden is hardly caused.

Abstract: A warning triangle structure includes a base, a triangular frame, a pulling assembly, and a fluorescent cloth. The triangular frame includes a bottom end and a top end opposite the bottom end. The bottom end is fixedly coupled to the base. The pulling assembly is located adjacent to the top end. The pulling assembly includes a spring and a drawstring that is resiliently coupled to the spring and that is stretchable relative to the spring. The fluorescent cloth includes a fixed end fixed to the triangular frame and a movable end coupled to the drawstring. The movable end is configured to be closed or opened relative to the triangular frame.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first overlay grating over a substrate. The first overlay grating has a first strip portion and a second strip portion, and the first strip portion and the second strip portion are elongated in a first elongated axis and are spaced apart from each other. The method includes forming a layer over the first overlay grating. The layer has a first trench elongated in a second elongated axis, the second elongated axis is substantially perpendicular to the first elongated axis, and the first trench extends across the first strip portion and the second strip portion. The method includes forming a second overlay grating over the layer. The second overlay grating has a third strip portion and a fourth strip portion.

Abstract: A method that is disclosed that includes the operations outlined below. Dies are arranged on a test fixture, and each of the dies includes first antennas and at least one via array, wherein the at least one via array is formed between at least two of the first antennas to separate the first antennas. By the first antennas of the dies, test processes are sequentially performed on an under-test device including second antennas that positionally correspond to the first antennas, according to signal transmissions between the first antennas and the second antennas.

Abstract: A charger comprises a housing, a first multi-layer printed circuit board (PCB), a second multi-layer PCB, and a third multi-layer PCB. The first PCB comprises at least a portion of a primary side circuit. The second PCB comprises at least a portion of a secondary side circuit. The third PCB is perpendicular to the first PCB and the second PCB. An isolation coupling element is disposed on the third PCB. The isolation coupling element comprises a multi-layer PCB. The first PCB comprises a high voltage (HV) semiconductor package. A surface of a die paddle of the HV semiconductor package is exposed from a molding encapsulation of the HV semiconductor package.

Abstract: An electronic device is provided, including a base, a display module, and a hinge mechanism. The hinge mechanism connects the base and the display module, and includes a fixed member, an elastic piece assembly, a rotating shaft, and a locking assembly. The fixed member is fixed to the base, and the elastic piece assembly is disposed on the fixed member and has a through slot. The rotating shaft is disposed through the fixed member and the elastic piece assembly, and is connected to the display module. The locking assembly is disposed through the elastic piece assembly. When the locking assembly is locked into the through slot in a first direction, the locking assembly drives the elastic piece assembly to move toward and clamps the rotating shaft, wherein the elastic piece assembly applies a first clamping force to the rotating shaft.

Abstract: Described is a system that matches a query with a set of sentences. When a query is received, the system may extract features from the query including one or more words as tokens and retrieve a set of candidate sentences as potential results for the query. For example, the query may be in the form of a question, and the candidate sentences may be alternative phrasings of the query that potentially match the user's search intent. The relevant set of candidate sentences may be determined based on using multiple relevancy scores and the system may rank the candidates according to an overall or aggregate score. Accordingly, the set of results to a query may be provided by recognizing the sentence as a whole and, for example when the query is a question, the interrogative intent of the query.

Abstract: A semiconductor device and a method of manufacture thereof are provided. The method for manufacturing the semiconductor device includes forming a first dielectric layer on a substrate. Next, forming a first dummy metal layer on the first dielectric layer. Then, forming a second dielectric layer over the first dummy metal layer. Furthermore, forming an opening in the second dielectric layer and the first dummy metal layer. Then, forming a dummy via in the opening, wherein the dummy via extending through the second dielectric layer and at least partially through the first dummy metal layer. Finally, forming a second dummy metal layer on the second dielectric layer and contact the dummy via.