Patents by Inventor Ching-Yu Chang

Ching-Yu Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10658184
    Abstract: A method for semiconductor manufacturing includes providing a substrate and a patterning layer over the substrate; forming a hole in the patterning layer; applying a first directional etching along a first direction to inner sidewalls of the hole; and applying a second directional etching along a second direction to the inner sidewalls of the hole, wherein the second direction is different from the first direction.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: May 19, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Tien Shen, Chi-Cheng Hung, Chin-Hsiang Lin, Chien-Wei Wang, Ching-Yu Chang, Chih-Yuan Ting, Kuei-Shun Chen, Ru-Gun Liu, Wei-Liang Lin, Ya Hui Chang, Yuan-Hsiang Lung, Yen-Ming Chen, Yung-Sung Yen
  • Patent number: 10655210
    Abstract: The present invention provides a roll-to roll sputtering process with a hybrid target comprising: unwinding a flexible polymer substrate from an unwinding axis; sputtering a hybrid target to the flexible polymer substrate for forming a first metal film, and a second metal film; and rewinding the flexible polymer substrate to a rewinding axis, and further comprising the following steps of: using laser to form a first electrode section and a second electrode section on the first metal film and the second metal film; and disposing a detecting substance layer on the second electrode section. Moreover, a product made by the roll-to-roll sputtering process is provided. Compared to the prior art, the hybrid target of the present invention is formed by multiple metals and can be sputtered to the substrate for forming multiple metal thin films. The present invention has an advantage of shortening the processing time and saving cost.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: May 19, 2020
    Assignee: Ace Medical Technology Co., Ltd.
    Inventors: Ching-Yu Chang, Chien-Fa Liao
  • Publication number: 20200152468
    Abstract: A method includes forming a metal-containing material layer over a substrate, patterning the metal-containing material layer, where the patterned material layer has an average roughness, and electrochemically treating the patterned metal-containing material layer to reduce the average roughness. The treatment may be implemented by exposing the patterned metal-containing material layer to an electrically conducting solution and applying a potential between the patterned material layer and a counter electrode exposed to the solution, such that the treating reduces the average roughness of the patterned material layer. The electrically conducting solution may include an ionic compound dissolved in water, alcohol, and/or a surfactant.
    Type: Application
    Filed: December 23, 2019
    Publication date: May 14, 2020
    Inventors: Chien-Wei Wang, Joy Cheng, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10649339
    Abstract: A resist material and methods for forming a semiconductor structure including using the resist material are provided. The method for forming a semiconductor structure includes forming a resist layer over a substrate and exposing a portion of the resist layer to form an exposed portion of the resist layer by performing an exposure process. The method for forming a semiconductor structure further includes developing the resist layer in a developer. In addition, the resist layer is made of a resist material including a photosensitive polymer and a contrast promoter, and a protected functional group of the photosensitive polymer is deprotected to form a deprotected functional group during the exposure process, and a functional group of the contrast promoter bonds to the deprotected functional group of the photosensitive polymer.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: May 12, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ya-Ching Chang, Chen-Yu Liu, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20200146154
    Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate. The patterned resist layer has a first pattern width, and the patterned resist layer has a first pattern profile having a first proportion of active sites. In some examples, the patterned resist layer is coated with a treatment material. In some embodiments, the treatment material bonds to surfaces of the patterned resist layer to provide a treated patterned resist layer having a second pattern profile with a second proportion of active sites greater than the first proportion of active sites. By way of example, and as part of the coating the patterned resist layer with the treatment material, a first pattern shrinkage process may be performed, where the treated patterned resist layer has a second pattern width less than a first pattern width.
    Type: Application
    Filed: December 20, 2019
    Publication date: May 7, 2020
    Inventors: Siao-Shan WANG, Cheng-Han WU, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20200142314
    Abstract: A lithography developing composition includes an alkaline aqueous solution having a quaternary ammonium hydroxide with both a steric functional group and an electron withdrawing group on its side chains.
    Type: Application
    Filed: December 20, 2019
    Publication date: May 7, 2020
    Inventors: Lilin Chang, Ching-Yu Chang
  • Publication number: 20200142316
    Abstract: The present disclosure provides lithography resist materials and corresponding lithography techniques for improving lithography resolution, in particular, by reducing swelling of resist layers during development. An exemplary lithography method includes performing a treatment process on a resist layer to cause cross-linking of acid labile group components of the resist layer via cross-linkable functional components, performing an exposure process on the resist layer, and performing a development process on the resist layer. In some implementations, the resist layer includes an exposed portion and an unexposed portion after the exposure process, and the treatment process reduces solubility of the unexposed portion to a developer used during the development process by increasing a molecular weight of a polymer in the unexposed portion. The treatment process is performed before or after the exposure process.
    Type: Application
    Filed: December 20, 2019
    Publication date: May 7, 2020
    Inventors: Ming-Hui Weng, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20200135452
    Abstract: A method for performing a photolithography process is provided. The method includes forming a layer over a substrate, and exposing a portion of the layer to form an exposed region. The method also includes performing a baking process on the layer, so that voids are formed in the exposed region of the layer. The method further includes filling the void with a post treatment coating material, and the post treatment coating material is over the exposed region of the layer.
    Type: Application
    Filed: December 31, 2019
    Publication date: April 30, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsung-Han KO, Joy CHENG, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20200135451
    Abstract: A method includes forming protective layer over substrate edge and photoresist over substrate. Protective layer removed and photoresist exposed to radiation. Protective layer made of composition including acid generator and polymer having pendant acid-labile groups.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 30, 2020
    Inventors: An-Ren ZI, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20200135462
    Abstract: A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.
    Type: Application
    Filed: September 26, 2019
    Publication date: April 30, 2020
    Inventors: Ching-Yu Chang, Jung-Hau Shiu, Jen Hung Wang, Tze-Liang Lee
  • Publication number: 20200133124
    Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a photoresist layer over a substrate. The photoresist layer includes at least an acid labile group (ALG) and a thermo-base generator (TBG). The method further includes exposing a portion of the photoresist layer to a radiation and performing a baking process after the exposing of the portion of the photoresist layer. The TBG releases a base during the performing of the baking process, resulting in a chemical reaction between the ALG and the base. The method further includes removing an unexposed portion of the photoresist layer, resulting in a patterned photoresist layer.
    Type: Application
    Filed: December 23, 2019
    Publication date: April 30, 2020
    Inventors: Chen-Yu Liu, Ya-Ching Chang, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20200135454
    Abstract: In a method of manufacturing a semiconductor device, an underlying structure is formed. A surface grafting layer is formed on the underlying structure. A photo resist layer is formed on the surface grafting layer. The surface grafting layer includes a coating material including a backbone polymer, a surface grafting unit coupled to the backbone polymer and an adhesion unit coupled to the backbone polymer.
    Type: Application
    Filed: December 31, 2019
    Publication date: April 30, 2020
    Inventors: Yu-Ling Chang CHIEN, Chien-Chih CHEN, Chin-Hsiang LIN, Ching-Yu CHANG, Yahru CHENG
  • Publication number: 20200135510
    Abstract: The present disclosure provides a semiconductor fabrication apparatus. The semiconductor apparatus includes a processing chamber; a substrate stage provided in the processing chamber and being configured to secure and rotate a semiconductor wafer; a gas injector configured to inject a chemical to the processing chamber; a window attached to the gas injector; and an adjustable fastening device coupled with the gas injector and the window.
    Type: Application
    Filed: December 26, 2019
    Publication date: April 30, 2020
    Inventors: Yung-Shun Hsu, Ching-Yu Chang, Chiao-Kai Chang, Wai Hong Cheah, Chien-Fang Lin
  • Publication number: 20200133125
    Abstract: Shrinkage and mass losses are reduced in photoresist exposure and post exposure baking by utilizing a small group which will decompose. Alternatively a bulky group which will not decompose or a combination of the small group which will decompose along with the bulky group which will not decompose can be utilized. Additionally, polar functional groups may be utilized in order to reduce the diffusion of reactants through the photoresist.
    Type: Application
    Filed: December 23, 2019
    Publication date: April 30, 2020
    Inventors: Wei-Han Lai, Ching-Yu Chang, Chen-Hau Wu
  • Patent number: 10635000
    Abstract: The present disclosure provides a method that includes coating an edge portion of a wafer by a first chemical solution including a chemical mixture of an acid-labile group, a solubility control unit and a thermal acid generator; curing the first chemical solution to form a first protecting layer on the edge portion of the wafer; coating a resist layer on a front surface of the wafer; removing the first protecting layer by a first removing solution; and performing an exposing process to the resist layer.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: April 28, 2020
    Assignee: TAIWAIN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Joy Cheng, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20200124971
    Abstract: The present disclosure provides NTD developers and corresponding lithography techniques that can overcome resolution, line edge roughness (LER), and sensitivity (RLS) tradeoff barriers particular to extreme ultraviolet (EUV) technologies, thereby achieving high patterning fidelity for advanced technology nodes. An exemplary lithography method includes forming a negative tone resist layer over a workpiece; exposing the negative tone resist layer to EUV radiation; and removing an unexposed portion of the negative tone resist layer in a negative tone developer, thereby forming a patterned negative tone resist layer. The negative tone developer includes an organic solvent having a log P value greater than 1.82. The organic solvent is an ester acetate derivative represented by R1COOR2. R1 and R2 are hydrocarbon chains having four or less carbon atoms. In some implementations, R1, R2, or both R1 and R2 are propyl functional groups, such as n-propyl, isopropyl, or 2-methylpropyl.
    Type: Application
    Filed: December 18, 2019
    Publication date: April 23, 2020
    Inventors: Chen-Yu Liu, Wei-Han Lai, Tzu-Yang Lin, Ming-Hui Weng, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20200126849
    Abstract: A method for forming openings in an underlayer includes: forming a photoresist layer on an underlayer formed on a substrate; exposing the photoresist layer; forming photoresist patterns by developing the exposed photoresist layer, the photoresist patterns covering regions of the underlayer in which the openings are to be formed; forming a liquid layer over the photoresist patterns; after forming the liquid layer, performing a baking process so as to convert the liquid layer to an organic layer in a solid form; performing an etching back process to remove a portion of the organic layer on a level above the photoresist patterns; removing the photoresist patterns, so as to expose portions of the underlayer by the remaining portion of the organic layer; forming the openings in the underlayer by using the remaining portion of the organic layer as an etching mask; and removing the remaining portion of the organic layer.
    Type: Application
    Filed: December 18, 2019
    Publication date: April 23, 2020
    Inventors: Tzu-Yang LIN, Cheng-Han WU, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20200124992
    Abstract: Immersion lithography system and method using a sealed wafer bottom are described. One embodiment is an immersion lithography apparatus comprising a lens assembly comprising an imaging lens and a wafer stage for retaining a wafer beneath the lens assembly, the wafer stage comprising a seal ring disposed on a seal ring frame along a top edge of the wafer retained on the wafer stage, the seal ring for sealing a gap between an edge of the wafer and the wafer stage. The embodiment further includes a fluid tank for retaining immersion fluid, the fluid tank situated with respect to the wafer stage for enabling full immersion of the wafer retained on the wafer stage in the immersion fluid and a cover disposed over at least a portion of the fluid tank for providing a temperature-controlled, fluid-rich environment within the fluid tank.
    Type: Application
    Filed: December 19, 2019
    Publication date: April 23, 2020
    Inventors: Burn Jeng Lin, Ching-Yu Chang
  • Patent number: 10622211
    Abstract: A wafer is rinsed with a solvent. The wafer has an increased hydrophobicity as a result of being rinsed with the solvent. A metal-containing material is formed over the wafer after the wafer has been rinsed with the solvent. One or more lithography processes are performed at least in part using the metal-containing material. The metal-containing material is removed during or after the performing of the one or more lithography processes. The increased hydrophobicity of the wafer facilitates a removal of the metal-containing material.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: April 14, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Joy Cheng, Ching-Yu Chang
  • Publication number: 20200110338
    Abstract: Materials directed to a photosensitive material and a method of performing a lithography process using the photosensitive material are described. A semiconductor substrate is provided. A first layer including a floating additive is formed over the semiconductor substrate. A second layer including an additive component having a metal cation is formed over the first layer. One or more bonds are formed to bond the metal cation and one or more anions. Each of the one or more anions is one of a protecting group and a polymer chain bonding component. The polymer chain bonding component is bonded to a polymer chain of the layer. The second layer is exposed to a radiation beam.
    Type: Application
    Filed: December 9, 2019
    Publication date: April 9, 2020
    Inventors: An-Ren Zi, Ching-Yu Chang, Chien-Wei Wang