Patents by Inventor Ching-Yu Chang

Ching-Yu Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Lithography techniques for reducing resist swelling
    Patent number: 10866517
    Abstract: The present disclosure provides lithography resist materials and corresponding lithography techniques for improving lithography resolution, in particular, by reducing swelling of resist layers during development. An exemplary lithography method includes performing a treatment process on a resist layer to cause cross-linking of acid labile group components of the resist layer via cross-linkable functional components, performing an exposure process on the resist layer, and performing a development process on the resist layer. In some implementations, the resist layer includes an exposed portion and an unexposed portion after the exposure process, and the treatment process reduces solubility of the unexposed portion to a developer used during the development process by increasing a molecular weight of a polymer in the unexposed portion. The treatment process is performed before or after the exposure process.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Hui Weng, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Material composition and methods thereof
    Patent number: 10863630
    Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate. The patterned resist layer has a first pattern width, and the patterned resist layer has a first pattern profile having a first proportion of active sites. In some examples, the patterned resist layer is coated with a treatment material. In some embodiments, the treatment material bonds to surfaces of the patterned resist layer to provide a treated patterned resist layer having a second pattern profile with a second proportion of active sites greater than the first proportion of active sites. By way of example, and as part of the coating the patterned resist layer with the treatment material, a first pattern shrinkage process may be performed, where the treated patterned resist layer has a second pattern width less than a first pattern width.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: December 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Siao-Shan Wang, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Adhesion layer for multi-layer photoresist
    Patent number: 10859915
    Abstract: A method is provided including forming a first layer over a substrate and forming an adhesion layer over the first layer. The adhesion layer has a composition including an epoxy group. A photoresist layer is formed directly on the adhesion layer. A portion of the photoresist layer is exposed to a radiation source. The composition of the adhesion layer and the exposed portion of the photoresist layer cross-link using the epoxy group. Thee photoresist layer is then developed (e.g., by a negative tone developer) to form a photoresist pattern feature, which may overlie the formed cross-linked region.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: December 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Yu Liu, Tzu-Yang Lin, Ya-Ching Chang, Ching-Yu Chang, Chin-Hsiang Lin
  • Preparing Patterned Neutral Layers and Structures Prepared Using the Same
    Publication number: 20200363717
    Abstract: Embodiments provided herein provide methods for preparing patterned neutral layers using photolithography, and structures prepared using the same. A method of preparing a structure may include disposing a film over a surface of a substrate, and removing plurality of elongated trenches from the film so as to define a plurality of spaced lines. A neutral layer may be disposed over the outer surface of each line, and may include a neutral group attached to the outer surface of that line via a covalent bond or a hydrogen bond. The surface of the substrate between the lines may be substantially free of the neutral layer.
    Type: Application
    Filed: August 5, 2020
    Publication date: November 19, 2020
    Inventors: Kuan-Hsin Lo, Ching-Yu Chang
  • METHOD FOR FORMING SEMICONDUCTOR STRUCTURE BY PATTERNING RESIST LAYER HAVING INORGANIC MATERIAL
    Publication number: 20200365398
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate, and forming a first layer over the material layer. The method also includes forming a second layer over the first layer, and the second layer includes an auxiliary. The method further includes forming a third layer over the second layer, and the third layer includes an inorganic material, the inorganic material includes a plurality of metallic cores, and a plurality of first linkers bonded to the metallic cores. A topmost surface of the second layer is in direct contact with a bottommost surface of the third layer. The method includes exposing a portion of the second layer by performing an exposure process, and the auxiliary reacts with the first linkers during the exposure process.
    Type: Application
    Filed: August 6, 2020
    Publication date: November 19, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: An-Ren ZI, Chin-Hsiang LIN, Ching-Yu CHANG
  • Adjustable fastening device for plasma gas injectors
    Patent number: 10840066
    Abstract: An embodiment is an apparatus, such as a plasma chamber. The apparatus includes chamber walls and a chamber window defining an enclosed space. A chamber window is disposed between a plasma antenna and a substrate support. A gas delivery source is mechanically coupled to the chamber window. The gas delivery source comprises a gas injector having a passageway, a window at a first end of the passageway, and a nozzle at a second end of the passageway. The nozzle of the gas delivery source is disposed in the enclosed space. A fastening device is mechanically coupled to the gas delivery source. The fastening device is adjustable to adjust a sealing force against the gas injector.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: November 17, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yung-Shun Hsu, Ching-Yu Chang, Chiao-Kai Chang, Wai Hong Cheah, Chien-Fang Lin
  • Priming material for organometallic resist
    Patent number: 10838304
    Abstract: Semiconductor systems and methods are provided. In an embodiment, a method of film formation includes receiving a substrate, dispensing a priming material on the substrate, and applying an organometallic resist solution over the priming material on the substrate, thereby forming an organometallic resist layer over the priming material. The priming material includes water.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: November 17, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Chih Ho, An-Ren Zi, Ching-Yu Chang
  • Method for Manufacturing a Semiconductor Device
    Publication number: 20200357634
    Abstract: A method of manufacturing a semiconductor device includes depositing a dielectric layer over a substrate, performing a first patterning to form an opening in the dielectric layer, and depositing an oxide film over and contacting the dielectric layer and within the opening in the dielectric layer. The oxide film is formed from multiple precursors that are free of O2, and depositing the oxide film includes forming a plasma of a first precursor of the multiple precursors.
    Type: Application
    Filed: July 27, 2020
    Publication date: November 12, 2020
    Inventors: Wan-Lin Tsai, Jung-Hau Shiu, Ching-Yu Chang, Jen Hung Wang, Shing-Chyang Pan, Tze-Liang Lee
  • Anti-Reflective Gap Filling Materials and Methods
    Publication number: 20200350155
    Abstract: In accordance with an embodiment a bottom anti-reflective layer comprises a surface energy modification group which modifies the surface energy of the polymer resin to more closely match a surface energy of an underlying material in order to help fill gaps between structures. The surface energy of the polymer resin may be modified by either using a surface energy modifying group or else by using an inorganic structure.
    Type: Application
    Filed: July 21, 2020
    Publication date: November 5, 2020
    Inventors: Yu-Chung Su, Ching-Yu Chang
  • Method Composition and Methods Thereof
    Publication number: 20200335349
    Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate, where the patterned resist layer has a first line width roughness. In various embodiments, the patterned resist layer is coated with a treatment material, where a first portion of the treatment material bonds to surfaces of the patterned resist layer. In some embodiments, a second portion of the treatment material (e.g., not bonded to surfaces of the patterned resist layer) is removed, thereby providing a treated patterned resist layer, where the treated patterned resist layer has a second line width roughness less than the first line width roughness.
    Type: Application
    Filed: June 1, 2020
    Publication date: October 22, 2020
    Inventors: Siao-Shan Wang, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang LIN
  • Underlayer Material for Photoresist
    Publication number: 20200333710
    Abstract: A method includes providing a layered structure on a substrate, the layered structure including a bottom layer formed over the substrate, a hard mask layer formed over the bottom layer, a material layer formed over the hard mask layer, and a photoresist layer formed over the material layer, exposing the photoresist layer to a radiation source, developing the photoresist layer, where the developing removes portions of the photoresist layer and the material layer in a single step without substantially removing portions of the hard mask layer, and etching the hard mask layer using the photoresist layer as an etch mask. The material layer may include acidic moieties and/or acid-generating molecules. The material layer may also include photo-sensitive moieties and crosslinking agents.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 22, 2020
    Inventors: An-Ren Zi, Wei-Han Lai, Ching-Yu Chang
  • CLEANING SOLUTION AND METHOD OF CLEANING WAFER
    Publication number: 20200328075
    Abstract: A cleaning solution includes first solvent having Hansen solubility parameters 25>?d>13, 25>?p>3, and 30>?h>4; acid having acid dissociation constant, pKa, of ?11<pKa<4, or base having pKa of 40>pKa>9.5; and surfactant. Surfactant is one or more of ionic surfactant, polyethylene oxide and polypropylene oxide, non-ionic surfactant, and combinations. Ionic surfactant is selected from group consisting of R is substituted or unsubstituted aliphatic, alicyclic, or aromatic group, and non-ionic surfactant has A-X or A-X-A-X structure, A is unsubstituted or substituted with oxygen or halogen, branched or unbranched, cyclic or non-cyclic, saturated C2-C100 aliphatic or aromatic group, and X includes polar functional groups selected from —OH, ?O, S P, P(O2), —C(?O)SH, —C(?O)OH, —C(?O)OR—, —O—; —N—, —C(?O)NH, —SO2OH, —SO2SH, —SOH, —SO2—, —CO—, —CN—, —SO—, —CON—, —NH—, —SO3NH—, SO2NH.
    Type: Application
    Filed: February 3, 2020
    Publication date: October 15, 2020
    Inventors: An-Ren ZI, Ching-Yu CHANG
  • Material composition and process for substrate modification
    Patent number: 10802402
    Abstract: Provided is a material composition and method for substrate modification. A substrate is patterned to include a plurality of features. The plurality of features includes a first subset of features having one or more substantially inert surfaces. In various embodiments, a priming material is deposited over the substrate, over the plurality of features, and over the one or more substantially inert surfaces. By way of example, the deposited priming material bonds at least to the one or more substantially inert surfaces. Additionally, the deposited priming material provides a modified substrate surface. After depositing the priming material, a layer is spin-coated over the modified substrate surface, where the spin-coated layer is substantially planar.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: October 13, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Han Lai, Chien-Wei Wang, Ching-Yu Chang, Chin-Hsiang Lin
  • METHOD FOR PERFORMING LITHOGRAPHY PROCESS WITH POST TREATMENT
    Publication number: 20200319560
    Abstract: Methods for performing a lithography process are provided. The method for performing a lithography process includes forming a resist layer over a substrate and exposing a portion of the resist layer to form an exposed portion between unexposed portions. The method for performing a lithography process further includes developing the resist layer to remove the exposed portion of the resist layer such that an opening is formed between the unexposed portions and forming a post treatment coating material in the opening and over the unexposed portions of the resist layer. The method for performing a lithography process further includes reacting a portion of the unexposed portions of the resist layer with the post treatment coating material by performing a post treatment process and removing the post treatment coating material.
    Type: Application
    Filed: June 18, 2020
    Publication date: October 8, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hui WENG, Ching-Yu CHANG, Chin-Hsiang LIN
  • Humidity Control in EUV Lithography
    Publication number: 20200319565
    Abstract: A layer is formed over a wafer. The layer contains a material that is sensitive to an extreme ultraviolet (EUV) radiation. A first baking process is performed to the layer. The first baking process is performed with a first humidity level that is greater than about 44%. After the first baking process, the layer is exposed to EUV radiation. A second baking process is performed to the layer. The second baking process is performed with a second humidity level that is greater than about 44%. The layer is rinsed with a liquid that contains water before the second baking process or after the second baking process. After the exposing, the layer is developed with a developer solution that contains water.
    Type: Application
    Filed: June 18, 2020
    Publication date: October 8, 2020
    Inventors: An-Ren Zi, Chin-Hsiang Lin, Ching-Yu Chang, Joy Cheng
  • Method for performing a photolithography process
    Patent number: 10796910
    Abstract: A method for performing a photolithography process is provided. The method includes forming a layer over a substrate, and exposing a portion of the layer to form an exposed region. The method also includes performing a baking process on the layer, so that voids are formed in the exposed region of the layer. The method further includes filling the void with a post treatment coating material, and the post treatment coating material is over the exposed region of the layer.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semicondutor Manufacturing Co., Ltd.
    Inventors: Tsung-Han Ko, Joy Cheng, Ching-Yu Chang, Chin-Hsiang Lin
  • Patterning Method for Semiconductor Devices and Structures Resulting Therefrom
    Publication number: 20200312662
    Abstract: A hard mask formed over a patterned photoresist layer in a tri-layer photoresist and a method for patterning a target layer using the same are disclosed. In an embodiment, a method includes depositing a photoresist layer over a first hard mask layer; patterning the photoresist layer to form a plurality of openings in the photoresist layer; depositing a second hard mask layer over the photoresist layer, the second hard mask layer filling the plurality of openings, the second hard mask layer having a first etch selectivity relative to the first hard mask layer, the photoresist layer having a second etch selectivity relative to the first hard mask layer, the first etch selectivity being greater than the second etch selectivity; planarizing the second hard mask layer; removing the photoresist layer; and etching the first hard mask layer using the second hard mask layer as a mask.
    Type: Application
    Filed: March 29, 2019
    Publication date: October 1, 2020
    Inventors: Ching-Yu Chang, Jung-Hau Shiu, Szu-Ping Tung, Chun-Kai Chen, Jen Hung Wang, Tze-Liang Lee
  • METHOD FOR FORMING SEMICONDUCTOR STRUCTURE
    Publication number: 20200301280
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming an assist layer over a material layer. The assist layer includes a first polymer with a first polymer backbone, a floating group bonded to the first polymer backbone, and the floating group includes carbon fluoride (CxFy), and a second polymer. The method includes forming a resist layer over the assist layer, and the first polymer is closer to an interface between the assist layer and the resist layer than the second polymer.
    Type: Application
    Filed: June 11, 2020
    Publication date: September 24, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: An-Ren ZI, Ching-Yu CHANG, Chin-Hsiang LIN
  • Grafting Design for Pattern Post-Treatment in Semiconductor Manufacturing
    Publication number: 20200294801
    Abstract: A method for lithography patterning includes forming an opening in a first layer over a substrate and coating a grafting solution over the first layer and filling in the opening. The grafting solution comprises a grafting compound and a solvent. The grafting compound comprises a grafting unit chemically bonded to a linking unit chemically bonded to a polymer backbone. The grafting unit is attachable to the first layer. The method further includes curing the grafting solution so that a first portion of the grafting compound is attached to a surface of the first layer, thereby forming a second layer over the surface of the first layer. The method further includes transferring a pattern including the first layer and the second layer to the substrate.
    Type: Application
    Filed: June 1, 2020
    Publication date: September 17, 2020
    Inventors: Siao-Shan Wang, Ching-Yu Chang, Chin-Hsiang Lin
  • Multi-layer photoresist
    Patent number: 10777681
    Abstract: A method includes spin-coating a first metal-free layer over the substrate, depositing a metal-containing layer over the first metal-free layer, spin-coating a second metal-free layer over the first metal-containing layer, forming a photoresist layer over the second metal-free layer, the photoresist layer including a first metallic element, exposing the photoresist layer, and subsequently developing the photoresist layer to form a pattern. The metal-containing layer includes a second metallic element selected from zirconium, tin, lanthanum, or manganese, and the first metallic element is selected from zirconium, tin, cesium, barium, lanthanum, indium, silver, or cerium.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: September 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Ching-Yu Chang, Chin-Hsiang Lin