Patents by Inventor Ching-Yu Chang

Ching-Yu Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10770293
    Abstract: In a method of manufacturing a semiconductor device, a photo resist layer is formed over a substrate with underlying structures. The first photo resist layer is exposed to exposure radiation. The exposed first photo resist layer is developed with a developing solution. A planarization layer is formed over the developed photo resist layer. The underlying structures include concave portions, and a part of the concave portions is not filled by the developed first photo resist.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: September 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Chung Su, Yahru Cheng, Ching-Yu Chang
  • Patent number: 10768527
    Abstract: A method includes providing a photoresist solution that includes a first solvent having a first volume and a second solvent having a second volume, where the first solvent is different from the second solvent and where the first volume is less than the second volume; dispersing the photoresist solution over a substrate to form a film, where the dispersing evaporates a portion of the first solvent and a portion of the second solvent such that a remaining portion of the first solvent is greater than a remaining portion of the second solvent; baking the film; after baking the film, exposing the film to form an exposed film; and developing the exposed film.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: September 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Chung Su, Kuan-Hsin Lo, Yahru Cheng, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20200279743
    Abstract: A method for semiconductor manufacturing includes providing a substrate, forming a patterning layer over the substrate, and patterning the patterning layer to form a hole in the patterning layer. The method also includes applying a first directional etching to two inner sidewalls of the hole to expand the hole along a first direction and applying a second directional etching to another two inner sidewalls of the hole to expand the hole along a second direction that is different from the first direction.
    Type: Application
    Filed: May 19, 2020
    Publication date: September 3, 2020
    Inventors: Yu-Tien Shen, Chi-Cheng Hung, Chin-Hsiang Lin, Chien-Wei Wang, Ching-Yu Chang, Chih-Yuan Ting, Kuei-Shun Chen, Ru-Gun Liu, Wei-Liang Lin, Ya Hui Chang, Yuan-Hsiang Lung, Yen-Ming Chen, Yung-Sung Yen
  • Publication number: 20200272051
    Abstract: A photoresist composition includes a conjugated resist additive, a photoactive compound, and a polymer resin. The conjugated resist additive is one or more selected from the group consisting of a polyacetylene, a polythiophene, a polyphenylenevinylene, a polyfluorene, a polypryrrole, a polyphenylene, and a polyaniline. The polyacetylene, polythiophene, polyphenylenevinylene, polyfluorene, polypryrrole, the polyphenylene, and polyaniline includes a substituent selected from the group consisting of an alkyl group, an ether group, an ester group, an alkene group, an aromatic group, an anthracene group, an alcohol group, an amine group, a carboxylic acid group, and an amide group. Another photoresist composition includes a polymer resin having a conjugated moiety and a photoactive compound. The conjugated moiety is one or more selected from the group consisting of a polyacetylene, a polythiophene, a polyphenylenevinylene, a polyfluorene, a polypryrrole, a polyphenylene, and a polyaniline.
    Type: Application
    Filed: September 26, 2019
    Publication date: August 27, 2020
    Inventors: Chun-Chih HO, Ching-Yu CHANG, Chin-Hsiang LIN
  • Patent number: 10755927
    Abstract: In accordance with an embodiment a bottom anti-reflective layer comprises a surface energy modification group which modifies the surface energy of the polymer resin to more closely match a surface energy of an underlying material in order to help fill gaps between structures. The surface energy of the polymer resin may be modified by either using a surface energy modifying group or else by using an inorganic structure.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Chung Su, Ching-Yu Chang
  • Patent number: 10747114
    Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a material layer on a substrate; forming a blocking layer on the material layer, wherein a bottom portion of the blocking layer reacts with the material layer, resulting in a capping layer that seals the material layer from an upper portion of the blocking layer. The method further includes forming a photoresist layer on the blocking layer; exposing the photoresist layer; and developing the photoresist layer, resulting in a patterned photoresist layer.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: August 18, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Siao-Shan Wang, Chen-Yu Liu, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20200257203
    Abstract: The present disclosure provides a method that includes coating an edge portion of a wafer by a first chemical solution including a chemical mixture of an acid-labile group, a solubility control unit and a thermal acid generator; curing the first chemical solution to form a first protecting layer on the edge portion of the wafer; coating a resist layer on a front surface of the wafer; removing the first protecting layer by a first removing solution; and performing an exposing process to the resist layer.
    Type: Application
    Filed: April 27, 2020
    Publication date: August 13, 2020
    Inventors: An-Ren Zi, Joy Cheng, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10741391
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and forming a resist layer over the material layer. The resist layer includes an inorganic material and an auxiliary, and the inorganic material includes a plurality of metallic cores, and a plurality of first linkers bonded to the metallic cores. The method also includes exposing a portion of the resist layer by performing an exposure process, and the auxiliary reacts with the first linkers during the exposure process. The method further includes etching a portion of the resist layer to form a patterned resist layer and patterning the material layer by using the patterned resist layer as a mask. The method also includes removing the patterned resist layer.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: August 11, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Chin-Hsiang Lin, Ching-Yu Chang
  • Patent number: 10741410
    Abstract: Provided is a material composition and method for that includes providing a substrate and forming a resist layer over the substrate. In various embodiments, the resist layer includes a metal complex including a radical generator, an organic core, and an organic solvent. By way of example, the organic core includes at least one cross-linker site. In some embodiments, an exposure process is performed to the resist layer. After performing the exposure process, the exposed resist layer is developed to form a patterned resist layer.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: August 11, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Joy Cheng, Ching-Yu Chang
  • Patent number: 10739673
    Abstract: Embodiments provided herein provide methods for preparing patterned neutral layers using photolithography, and structures prepared using the same. A method of preparing a structure may include disposing a film over a surface of a substrate, and removing plurality of elongated trenches from the film so as to define a plurality of spaced lines. A neutral layer may be disposed over the outer surface of each line, and may include a neutral group attached to the outer surface of that line via a covalent bond or a hydrogen bond. The surface of the substrate between the lines may be substantially free of the neutral layer.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: August 11, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Kuan-Hsin Lo, Ching-Yu Chang
  • Patent number: 10727045
    Abstract: A method of manufacturing a semiconductor device includes depositing a dielectric layer over a substrate, performing a first patterning to form an opening in the dielectric layer, and depositing an oxide film over and contacting the dielectric layer and within the opening in the dielectric layer. The oxide film is formed from multiple precursors that are free of O2, and depositing the oxide film includes forming a plasma of a first precursor of the multiple precursors.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: July 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wan-Lin Tsai, Jung-Hau Shiu, Ching-Yu Chang, Jen Hung Wang, Shing-Chyang Pan, Tze-Liang Lee
  • Publication number: 20200206735
    Abstract: A detection method for enhancing detection signal intensity is provided. The detection method includes the following steps. Firstly, a detection device is provided. The detection device includes a channel, an inlet port and an air chamber. The air chamber includes an elastic layer. A bonding material is immobilized in the channel and served as a reaction area. Then, a sample containing a detection material is loaded into the inlet port. As the elastic layer is moved upwardly and downwardly, the sample is moved toward the air chamber and the inlet port in a reciprocating manner. Consequently, the possibility of combining the detection material of the sample with the bonding material in the reaction area is increased. Afterwards, an optical signal from the reaction area is measured.
    Type: Application
    Filed: December 10, 2019
    Publication date: July 2, 2020
    Inventors: Chi-Han Chiou, Shu-Hsien Liao, Yu-Hsuan Tsai, Ching-Yu Chang
  • Patent number: 10698317
    Abstract: A method includes providing a layered structure on a substrate, the layered structure including a bottom layer formed over the substrate, a hard mask layer formed over the bottom layer, a material layer formed over the hard mask layer, and a photoresist layer formed over the material layer, exposing the photoresist layer to a radiation source, developing the photoresist layer, where the developing removes portions of the photoresist layer and the material layer in a single step without substantially removing portions of the hard mask layer, and etching the hard mask layer using the photoresist layer as an etch mask. The material layer may include acidic moieties and/or acid-generating molecules. The material layer may also include photo-sensitive moieties and crosslinking agents.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: June 30, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Wei-Han Lai, Ching-Yu Chang
  • Patent number: 10691023
    Abstract: Methods for performing a lithography process are provided. The method for performing a lithography process includes forming a resist layer over a substrate and exposing a portion of the resist layer to form an exposed portion between unexposed portions. The method for performing a lithography process further includes developing the resist layer to remove the exposed portion of the resist layer such that an opening is formed between the unexposed portions and forming a post treatment coating material in the opening and over the unexposed portions of the resist layer. The method for performing a lithography process further includes reacting a portion of the unexposed portions of the resist layer with the post treatment coating material by performing a post treatment process and removing the post treatment coating material.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hui Weng, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10684545
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and forming a assist layer over the material layer. The assist layer includes a polymer backbone, an acid labile group (ALG) bonded to the polymer backbone, and a floating group bonded to the polymer backbone. The floating group includes carbon fluoride (CxFy). The method also includes forming a resist layer over the assist layer and patterning the resist layer.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: June 16, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10672610
    Abstract: A method for lithography patterning includes forming an opening in a first layer over a substrate and coating a grafting solution over the first layer and filling in the opening. The grafting solution comprises a grafting compound and a solvent. The grafting compound comprises a grafting unit chemically bonded to a linking unit chemically bonded to a polymer backbone. The linking unit comprises an alkyl segment. The grafting unit is attachable to the first layer. The method further includes curing the grafting solution so that a first portion of the grafting compound is attached to a surface of the first layer, thereby forming a second layer over the surface of the first layer.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: June 2, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Siao-Shan Wang, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10672619
    Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate, where the patterned resist layer has a first line width roughness. In various embodiments, the patterned resist layer is coated with a treatment material, where a first portion of the treatment material bonds to surfaces of the patterned resist layer. In some embodiments, a second portion of the treatment material (e.g., not bonded to surfaces of the patterned resist layer) is removed, thereby providing a treated patterned resist layer, where the treated patterned resist layer has a second line width roughness less than the first line width roughness.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: June 2, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Siao-Shan Wang, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20200159110
    Abstract: A lithography method includes forming a resist layer over a substrate. The resist layer is exposed to radiation. The exposed resist layer is developed using a developer that removes an exposed portion of the exposed resist layer, thereby forming a patterned resist layer. The patterned resist layer is rinsed using a basic aqueous rinse solution.
    Type: Application
    Filed: January 15, 2019
    Publication date: May 21, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Hui WENG, Chen-Yu LIU, Cheng-Han WU, Ching-Yu CHANG, Chin-Hsiang LIN
  • Patent number: 10658191
    Abstract: A method includes performing a first polymerization process on a monomer solution to form a partially processed resin solution, the partially processed resin solution comprising a solvent and a silicon-based resin, spin coating the partially processed resin solution on a substrate, and performing a second polymerization process on the partially processed resin solution to shrink the partially processed resin solution to form a conformal silicon-based resin layer.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: May 19, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Yu Liu, Ching-Yu Chang, Ming-Huei Weng
  • Patent number: 10655019
    Abstract: A coating technique and a priming material are provided. In an exemplary embodiment, the coating technique includes receiving a substrate and applying a priming material to the substrate. The applying of the priming material may include rotating the substrate to disperse the priming material radially on the substrate. In the embodiment, the priming material includes a solvent with at least six carbon atoms per molecule. A film-forming material is applied to the substrate on the priming material, and the application includes rotating the substrate to disperse the film-forming material radially on the substrate. The priming material and the film-forming material are evaporated to leave a component of the film-forming material in a solid form. In various embodiments, the priming material is selected based on at least one of an evaporation rate, a viscosity, or an intermolecular force between the priming material and the film-forming material.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: May 19, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ya-Ling Cheng, Ching-Yu Chang