Patents by Inventor Ching Yu

Ching Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PHOTORESIST DEVELOPER AND METHOD OF DEVELOPING PHOTORESIST
    Publication number: 20220244639
    Abstract: A photoresist developer includes a solvent having Hansen solubility parameters of 15<?d<25, 10<?p<25, and 6<?p<30; an acid having an acid dissociation constant, pKa, of ?15<pKa<4, or a base having a pKa of 40>pKa>9.5; and a chelate.
    Type: Application
    Filed: April 11, 2022
    Publication date: August 4, 2022
    Inventors: An-Ren ZI, Chin-Hsiang LIN, Ching-Yu CHANG, Joy CHENG
  • MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
    Publication number: 20220246578
    Abstract: A memory device including a first semiconductor die and a memory cube mounted on and connected with the first semiconductor die is described. The memory cube includes multiple stacked tiers, and each tier of the multiple stacked tiers includes second semiconductor dies laterally wrapped by an encapsulant and a redistribution structure disposed on the second semiconductor dies and the encapsulant. The second semiconductor dies of the multiple stacked tiers are electrically connected with the first semiconductor die through the redistribution structures in the multiple stacked tiers.
    Type: Application
    Filed: April 19, 2022
    Publication date: August 4, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Huang, Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang, Yu-Sheng Hsieh
  • METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
    Publication number: 20220230889
    Abstract: A method of manufacturing a semiconductor device includes forming a first layer of a first planarizing material over a patterned surface of a substrate, forming a second layer of a second planarizing material over the first planarizing layer, crosslinking a portion of the first planarizing material and a portion of the second planarizing material, and removing a portion of the second planarizing material that is not crosslinked. In an embodiment, the method further includes forming a third layer of a third planarizing material over the second planarizing material after removing the portion of the second planarizing material that is not crosslinked. The third planarizing material can include a bottom anti-reflective coating or a spin-on carbon, and an acid or an acid generator. The first planarizing material can include a spin-on carbon, and an acid, a thermal acid generator or a photoacid generator.
    Type: Application
    Filed: April 4, 2022
    Publication date: July 21, 2022
    Inventors: Yen-Hao CHEN, Wei-Han LAI, Ching-Yu CHANG, Chin-Hsiang LIN
  • Forming low-stress silicon nitride layer through hydrogen treatment
    Patent number: 11393674
    Abstract: A method includes placing a wafer into a process chamber, and depositing a silicon nitride layer on a base layer of the wafer. The process of depositing the silicon nitride layer includes introducing a silicon-containing precursor into the process chamber, purging the silicon-containing precursor from the process chamber, introducing hydrogen radicals into the process chamber, purging the hydrogen radicals from the process chamber; introducing a nitrogen-containing precursor into the process chamber, and purging the nitrogen-containing precursor from the process chamber.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: July 19, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Che Hsieh, Ching Yu Huang, Hsin-Hao Yeh, Chunyao Wang, Tze-Liang Lee
  • Grafting design for pattern post-treatment in semiconductor manufacturing
    Patent number: 11387104
    Abstract: A method for lithography patterning includes forming an opening in a first layer over a substrate and coating a grafting solution over the first layer and filling in the opening. The grafting solution comprises a grafting compound and a solvent. The grafting compound comprises a grafting unit chemically bonded to a linking unit chemically bonded to a polymer backbone. The grafting unit is attachable to the first layer. The method further includes curing the grafting solution so that a first portion of the grafting compound is attached to a surface of the first layer, thereby forming a second layer over the surface of the first layer. The method further includes transferring a pattern including the first layer and the second layer to the substrate.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: July 12, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Siao-Shan Wang, Ching-Yu Chang, Chin-Hsiang Lin
  • Method of fabricating semiconductor device with reduced trench distortions
    Patent number: 11387113
    Abstract: A method includes forming a material layer over a substrate, forming a first hard mask (HM) layer over the material layer, forming a first trench, along a first direction, in the first HM layer. The method also includes forming first spacers along sidewalls of the first trench, forming a second trench in the first HM layer parallel to the first trench, by using the first spacers to guard the first trench. The method also includes etching the material layer through the first trench and the second trench, removing the first HM layer and the first spacers, forming a second HM layer over the material layer, forming a third trench in the second HM layer. The third trench extends along a second direction that is perpendicular to the first direction and overlaps with the first trench. The method also includes etching the material layer through the third trench.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: July 12, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung-Sung Yen, Chung-Ju Lee, Chun-Kuang Chen, Chia-Tien Wu, Ta-Ching Yu, Kuei-Shun Chen, Ru-Gun Liu, Shau-Lin Shue, Tsai-Sheng Gau, Yung-Hsu Wu
  • Extreme ultraviolet photoresist and method
    Patent number: 11378884
    Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a photoresist layer over a substrate. The photoresist layer includes at least an acid labile group (ALG) and a thermo-base generator (TBG). The method further includes exposing a portion of the photoresist layer to a radiation and performing a baking process after the exposing of the portion of the photoresist layer. The TBG releases a base during the performing of the baking process, resulting in a chemical reaction between the ALG and the base. The method further includes removing an unexposed portion of the photoresist layer, resulting in a patterned photoresist layer.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: July 5, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Yu Liu, Ya-Ching Chang, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Power over Ethernet system having multiple power source devices and control device thereof
    Publication number: 20220206560
    Abstract: Control device for a power over Ethernet system having multiple power source devices comprises plural control circuits and a signal bus connecting them. Each control device connects plural power source devices and plural port switches, which controls power supply to a port to be connected by a power consuming device. Detection circuit detects at least one power supply state combination. Control signal generator picks up a power control combination signal corresponding to a detected power supply state combination from a power supply to power control look-up-table, upon change in the power supply state and provides the power control signals to corresponding port switches.
    Type: Application
    Filed: July 7, 2021
    Publication date: June 30, 2022
    Inventor: Chuan Ching YU
  • FAN ASSEMBLY
    Publication number: 20220186923
    Abstract: A fan assembly including a base, a fan, a light-emitting unit, and a lighting effect component is provided. The fan is rotatably disposed above the base, and includes a central part and multiple blades extending outwards from the central part, and each of the blades has a top surface away from the base. The light-emitting unit is disposed on the base and located between the base and the central part of the fan. The lighting effect component is disposed on the base and surrounds the light-emitting unit. A projection of the lighting effect component projected onto the base is greater than a projection of the fan projected onto the base. A height of the lighting effect component protruding from the base is less than a distance between the top surface of one of the blades and the base. The lighting effect component includes an inclined inner surface.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 16, 2022
    Applicant: GIGA-BYTE TECHNOLOGY CO.,LTD.
    Inventors: Shun-Chih Huang, Ching-Yu Lu, Kai-Yan Huang, Liang Yu Wu, Jeffrey Lee
  • CHIPLET BASED ARTIFICIAL INTELLIGENCE ACCELERATORS AND CONFIGURATION METHODS
    Publication number: 20220188492
    Abstract: A processing unit can include a plurality of chiplets coupled in a cascade topology by a plurality of interfaces. A set of the plurality of cascade coupled chiplets can be configured to execute a plurality of layers or blocks of layers of an artificial intelligence model. The set of cascade coupled chiplets can also be configured with parameter data of corresponding ones of the plurality of layers or blocks of layers of the artificial intelligence model.
    Type: Application
    Filed: December 10, 2020
    Publication date: June 16, 2022
    Inventors: Ching-Yu KO, Chester LIU, Mohammed ZIDAN, Jacob BOTIMER, Timothy WESLEY, Zhengya ZHANG, Wei LU
  • Underlayer Material for Photoresist
    Publication number: 20220187711
    Abstract: A method includes providing a layered structure on a substrate, the layered structure including a bottom layer formed over the substrate, a hard mask layer formed over the bottom layer, a material layer formed over the hard mask layer, and a photoresist layer formed over the material layer, exposing the photoresist layer to a radiation source, developing the photoresist layer, where the developing removes portions of the photoresist layer and the material layer in a single step without substantially removing portions of the hard mask layer, and etching the hard mask layer using the photoresist layer as an etch mask. The material layer may include acidic moieties and/or acid-generating molecules. The material layer may also include photo-sensitive moieties and crosslinking agents.
    Type: Application
    Filed: March 8, 2022
    Publication date: June 16, 2022
    Inventors: An-Ren ZI, Wei-Han Lai, Ching-Yu Chang
  • Adjustable fastening device for plasma gas injectors
    Patent number: 11361943
    Abstract: An embodiment is an apparatus, such as a plasma chamber. The apparatus includes chamber walls and a chamber window defining an enclosed space. A chamber window is disposed between a plasma antenna and a substrate support. A gas delivery source is mechanically coupled to the chamber window. The gas delivery source comprises a gas injector having a passageway, a window at a first end of the passageway, and a nozzle at a second end of the passageway. The nozzle of the gas delivery source is disposed in the enclosed space. A fastening device is mechanically coupled to the gas delivery source. The fastening device is adjustable to adjust a sealing force against the gas injector.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: June 14, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yung-Shun Hsu, Ching-Yu Chang, Chiao-Kai Chang, Wai Hong Cheah, Chien-Fang Lin
  • METHODS AND APPARATUS FOR ENABLING SERVICE CONTINUITY IN AN EDGE COMPUTING ENVIRONMENT
    Publication number: 20220182890
    Abstract: Devices, systems and methods for transitioning a UE to a new application server in response to a mobility event comprising, at a source application server handler: receiving an application ID (AC-ID) associated with an application client for a user equipment (UE); receiving a mobility event notification including a UE ID of the UE and a target data network access identifier (DNAI) to indicate a target edge data network to which a transition of a data connection for the application client is to be performed; encoding an outgoing transition request for transmission to a source application server to indicate the transition of the data connection from the source application server; and encoding an incoming transition request for transmission to a target application server handler (ASH) of the target edge data network to indicate the transition of the data connection to the target edge data network.
    Type: Application
    Filed: April 29, 2020
    Publication date: June 9, 2022
    Inventors: Changhong SHAN, Alexandre Saso STOJANOVSKI, Ching-Yu LIAO, Danny MOSES
  • Adjustable fastening device for plasma gas injectors
    Patent number: 11355318
    Abstract: An embodiment is an apparatus, such as a plasma chamber. The apparatus includes chamber walls and a chamber window defining an enclosed space. A chamber window is disposed between a plasma antenna and a substrate support. A gas delivery source is mechanically coupled to the chamber window. The gas delivery source comprises a gas injector having a passageway, a window at a first end of the passageway, and a nozzle at a second end of the passageway. The nozzle of the gas delivery source is disposed in the enclosed space. A fastening device is mechanically coupled to the gas delivery source. The fastening device is adjustable to adjust a sealing force against the gas injector.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: June 7, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yung-Shun Hsu, Ching-Yu Chang, Chiao-Kai Chang, Wai Hong Cheah, Chien-Fang Lin
  • Filter with seal treatment
    Patent number: 11351509
    Abstract: In accordance with an embodiment, a filter membrane is sealed with a sealing material prior to using the filter membrane to filter process fluids. The sealing material is a fluorine-based polymer or a polymer with a cross-linking group. Once the sealing material has been placed in contact with the filter membrane, a cross-linking reaction may be initiated using either physical or chemical processes to cross-link the sealing material and to seal the filter membrane within the sealing material, thereby separating the filter membrane from the process fluids, reducing or eliminating leaching of the filter membrane into the process fluid.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: June 7, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Hsin Lo, Ching-Yu Chang
  • Kit and method for producing induced embryonic neural progenitors
    Patent number: 11339405
    Abstract: Disclosed herein are kits comprising transcription factors for inducing a fibroblast cell into an induced embryonic neural progenitor cell. The induced embryonic neural progenitor cell is then capable of differentiating into an astrocyte, an oligodendrocyte or a neuron. Also disclosed are the uses of the kit as a platform for selecting a drug candidate to treat neurological diseases.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: May 24, 2022
    Assignee: ACADEMIA SINICA
    Inventors: Hung-Chih Kuo, Ching-Yu Chuang, Chan-Hsien Yeh
  • BACTERIOPHAGE TREATMENT AND REDUCTION IN INFLAMMATORY RESPONSE
    Publication number: 20220152131
    Abstract: The present invention relates to the treatment of bacterial infections and the reduction of inflammatory response using bacteriophage compositions. In an aspect, provided herein are methods of treating a bacterial infection characterized by inflammation in a subject, the method comprising administering to the subject a bacteriophage composition that is essentially free of impurities, wherein the composition reduces inflammation.
    Type: Application
    Filed: August 17, 2021
    Publication date: May 19, 2022
    Inventors: Ching Yu Lin, Jonathan Ripley Iredell
  • Method and System for Classification and Visualisation of 3D Images
    Publication number: 20220157048
    Abstract: A computer-aided diagnosis (CAD) system for classification and visualisation of a 3D medical image comprises a classification component comprising a 2D convolutional neural network (CNN) that is configured to generate a prediction of one or more classes for 2D slices of the 3D medical image. The system also comprises a visualisation component that is configured to: determine, for a target class of said one or more classes, which slices belong to the target class; for each identified slice, determine, by back-propagation to an intermediate layer of the CNN, a contribution of each pixel of the identified slice to classification of the identified slice as belonging to the target class; and generate a heatmap that provides a visual indication of the contributions of respective pixels.
    Type: Application
    Filed: February 7, 2020
    Publication date: May 19, 2022
    Inventors: Daniel Shu Wei Ting, Gavin Siew Wei Tan, Tien Yin Wong, Ching-Yu Cheng, Chui Ming Gemmy Cheung, Yong Liu, Shaohua Li, Rick Siow Mong Goh
  • AVOIDING PAGING COLLISIONS IN A DEVICE WITH MULTIPLE SUBSCRIPTIONS
    Publication number: 20220159616
    Abstract: In an example method, a user equipment (UE) determines a first identifier assigned to the UE for use on a first wireless communications network and one or more first time slots for monitoring the first wireless communication networks. The UE determines a second identifier assigned to the UE for use on a second wireless communications network and one or more second time slots for monitoring the second wireless communication networks. The UE determines that the one or more first time slots at least partially overlap the one or more second time slots, and in response, transmits to the second wireless communications network, a request for a third identifier to be assigned to the UE for use on the second wireless communications network and/or a request that the one or more second time slots be offset by an interval of time.
    Type: Application
    Filed: May 28, 2020
    Publication date: May 19, 2022
    Inventors: Alexandre Saso Stojanovski, Ching-Yu Liao, Sudeep Palat, Sheetal Bhasin
  • Memory device and manufacturing method thereof
    Patent number: 11335666
    Abstract: A memory device including a first semiconductor die and a memory cube mounted on and connected with the first semiconductor die is described. The memory cube includes multiple stacked tiers, and each tier of the multiple stacked tiers includes second semiconductor dies laterally wrapped by an encapsulant and a redistribution structure disposed on the second semiconductor dies and the encapsulant. The second semiconductor dies of the multiple stacked tiers are electrically connected with the first semiconductor die through the redistribution structures in the multiple stacked tiers.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: May 17, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Huang, Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang, Yu-Sheng Hsieh