Patents by Inventor Ching Yu

Ching Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230036859
    Abstract: A photoresist includes a polymer and a photoactive compound. The photoactive compound contains a sensitizer component. The photoactive compound contains an acid generator or a base molecular. The acid generator or the base molecular bonds the sensitizer component. The photoactive compound is within a polymer backbone. The sensitizer component is configured to absorb an EUV light to produce electrons.
    Type: Application
    Filed: July 16, 2021
    Publication date: February 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chieh-Hsin HSIEH, Wei-Han LAI, Ching-Yu CHANG
  • Patent number: 11569195
    Abstract: A semiconductor packaging structure manufactured in a manner which does not leave the chip damaged or susceptible to damage upon the removal of temporary manufacturing supports includes at least one electrical conductor, at least one conductive layer, a chip, and a colloid. The chip is spaced from the conductive layer, the electrical conductor is disposed between the conductive layer and the chip and electrically connects the conductive layer to the chip. The colloid covers all outer surfaces of the chip. A method of fabricating such a semiconductor packaging structure is also provided.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: January 31, 2023
    Assignee: Kore Semiconductor Co., Ltd.
    Inventors: Ching-Yu Ni, Young-Way Liu
  • Publication number: 20230028673
    Abstract: A photoresist composition includes a conjugated resist additive, a photoactive compound, and a polymer resin. The conjugated resist additive is one or more selected from the group consisting of a polyacetylene, a polythiophene, a polyphenylenevinylene, a polyfluorene, a polypryrrole, a polyphenylene, and a polyaniline. The polyacetylene, polythiophene, polyphenylenevinylene, polyfluorene, polypryrrole, the polyphenylene, and polyaniline includes a substituent selected from the group consisting of an alkyl group, an ether group, an ester group, an alkene group, an aromatic group, an anthracene group, an alcohol group, an amine group, a carboxylic acid group, and an amide group. Another photoresist composition includes a polymer resin having a conjugated moiety and a photoactive compound. The conjugated moiety is one or more selected from the group consisting of a polyacetylene, a polythiophene, a polyphenylenevinylene, a polyfluorene, a polypryrrole, a polyphenylene, and a polyaniline.
    Type: Application
    Filed: July 25, 2022
    Publication date: January 26, 2023
    Inventors: Chun-Chih HO, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20230028006
    Abstract: Novel photoresist additive compositions including developer solubility groups which enhance the solubility of the photoresist additive in a developer, such as a TMAH developer. The novel photoresist additive compositions also include functional groups to address outgassing and out-of-band issues.
    Type: Application
    Filed: May 5, 2022
    Publication date: January 26, 2023
    Inventors: Yen-Hao CHEN, Wei-Han LAI, Ching-Yu CHANG
  • Publication number: 20230016635
    Abstract: A semiconductor device includes first, second, and third conductive regions and first and second active regions. The first conductive region has a first width and extends along a first direction. The second conductive region has a second width and extends along the first direction. The first width is greater than the second width. The first active region has a third width and extends along the first direction. The second active region has a fourth width and extends along the first direction. The third width is less than the fourth width. The third conductive region extends along a second direction and is electrically connected to the first conductive region. The second direction is different from the first direction. The first and second active regions are neighboring active regions.
    Type: Application
    Filed: April 1, 2022
    Publication date: January 19, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu HUANG, Shih-Wei PENG, Wei-Cheng TZENG, Wei-Cheng LIN, Jiann-Tyng TZENG
  • Publication number: 20230012705
    Abstract: A method for forming a semiconductor device is provided. The method includes applying a photoresist composition over a substrate, thereby forming a photoresist layer over the substrate; performing a first baking process to the photoresist layer; exposing the photoresist layer to an extreme ultraviolet (EUV) radiation, thereby forming a pattern therein; performing a second baking process to the photoresist layer; and developing the photoresist layer having the pattern therein using a developer, thereby forming a patterned photoresist layer. The first baking process and the second baking process are conducted under an ambient atmosphere having a humidity level ranging from 55% to 100%.
    Type: Application
    Filed: January 21, 2022
    Publication date: January 19, 2023
    Inventors: An-Ren ZI, Yahru CHENG, Ching-Yu CHANG, Chin-Hsiang LIN
  • Patent number: 11550220
    Abstract: A negative tone photoresist and method for developing the negative tone photoresist is disclosed. For example, the negative tone photoresist includes a solvent, a dissolution inhibitor, and a polymer. The polymer includes a hydroxyl group. The polymer may be greater than 40 weight per cent of a total weight of the negative tone photoresist.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: January 10, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Po Yang, Wei-Han Lai, Ching-Yu Chang
  • Publication number: 20220414310
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a first conductive pattern disposed within a first region from a top view perspective and extending along a first direction, a first phase shift circuit disposed within the first region, a first transmission circuit disposed within a second region from the top view perspective, and a first gate conductor extending from the first region to the second region along a second direction perpendicular to the first direction. The first phase shift circuit and the first transmission circuit are electrically connected with the first conductive pattern through the first gate conductor.
    Type: Application
    Filed: January 18, 2022
    Publication date: December 29, 2022
    Inventors: Shih-Wei PENG, Ching-Yu HUANG, Jiann-Tyng TZENG
  • Publication number: 20220406741
    Abstract: A method of manufacturing a bump structure includes forming a passivation layer over a substrate. A metal pad structure is formed over the substrate, wherein the passivation layer surrounds the metal pad structure. A polyimide layer including a polyimide is formed over the passivation layer and the metal pad structure. A metal bump is formed over the metal pad structure and the polyimide layer. The polyimide is a reaction product of a dianhydride and a diamine, wherein at least one of the dianhydride and the diamine comprises one selected from the group consisting of a cycloalkane, a fused ring, a bicycloalkane, a tricycloalkane, a bicycloalkene, a tricycloalkene, a spiroalkane, and a heterocyclic ring.
    Type: Application
    Filed: July 27, 2022
    Publication date: December 22, 2022
    Inventors: Ching-Yu CHANG, Ming-Da CHENG, Ming-Hui WENG
  • Publication number: 20220404705
    Abstract: A method for reducing resist consumption (RRC) is provided. The method includes treating a surface of a substrate using a RRC composition and forming a photoresist layer comprising a metal-containing material on the RRC composition treated surface. The RRC composition includes a solvent and an acid or a base. The solvent has a dispersion parameter between 10 and 25. The acid has an acid dissociation constant between -20 and 6.8. The base having an acid dissociation constant between 7.2 and 45.
    Type: Application
    Filed: April 5, 2022
    Publication date: December 22, 2022
    Inventors: An-Ren ZI, Ming-Hui WENG, Ching-Yu CHANG
  • Publication number: 20220394551
    Abstract: Methods, apparatus circuitry, and storage media are described for mobile-terminated packet transmissions. In one embodiment, an apparatus of a control plane device configured to operate within an evolved packet network core identifies a first service flow event trigger associated with a first packet data unit (PDU) session and processes a path reselection for a first PDU session in response to the first service flow event trigger, wherein the path reselection determines a new gateway for the first PDU session resulting from the path reselection. Transmission of a change notification to an application server controller associated with the first PDU session is initiated in response to the path reselection. Transmission of a routing update to the new gateway in response to the path reselection is also initiated. In various embodiments, the trigger may be a mobility event, a load balancing event, or operations in association with an application server controller.
    Type: Application
    Filed: August 17, 2022
    Publication date: December 8, 2022
    Inventors: Ching-Yu Liao, Mohammad Mamunur Rashid, S. M. lftekharul ALAM, Rath Vannithamby
  • Publication number: 20220392764
    Abstract: A method includes providing a layered structure on a substrate, the layered structure including a bottom layer formed over the substrate and a photoresist layer formed over the bottom layer, exposing the photoresist layer to a radiation source, developing the photoresist layer, patterning the bottom layer and removing portions of the substrate through openings in the patterned bottom layer. In some embodiments, a middle layer is provided between the bottom layer and the photoresist layer. The material of the bottom layer includes at least one cross-linking agent that has been functionalized to decrease its affinity to other materials in the bottom layer.
    Type: Application
    Filed: September 22, 2021
    Publication date: December 8, 2022
    Inventors: Jing-Hong HUANG, Wei-Han LAI, Ching-Yu CHANG
  • Publication number: 20220392763
    Abstract: A method of manufacturing a semiconductor device includes forming a first protective layer over an edge portion of a first main surface of a semiconductor substrate. A metal-containing photoresist layer is formed over the first main surface of the semiconductor substrate. The first protective layer is removed, and the metal-containing photoresist layer is selectively exposed to actinic radiation. A second protective layer is formed over the edge portion of the first main surface of the semiconductor substrate. The selectively exposed photoresist layer is developed to form a patterned photoresist layer, and the second protective layer is removed.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 8, 2022
    Inventors: An-Ren ZI, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20220394552
    Abstract: Methods, apparatus circuitry, and storage media are described for mobile-terminated packet transmissions. In one embodiment, an apparatus of a control plane device configured to operate within an evolved packet network core identifies a first service flow event trigger associated with a first packet data unit (PDU) session and processes a path reselection for a first PDU session in response to the first service flow event trigger, wherein the path reselection determines a new gateway for the first PDU session resulting from the path reselection. Transmission of a change notification to an application server controller associated with the first PDU session is initiated in response to the path reselection. Transmission of a routing update to the new gateway in response to the path reselection is also initiated. In various embodiments, the trigger may be a mobility event, a load balancing event, or operations in association with an application server controller.
    Type: Application
    Filed: August 17, 2022
    Publication date: December 8, 2022
    Inventors: Ching-Yu Liao, Mohammad Mamunur Rashid, S. M. lftekharul Alam, Rath Vannithamby
  • Patent number: 11522067
    Abstract: A high electron mobility transistor (HEMT) device and a method of forming the same are provided. The method includes forming a first III-V compound layer over a substrate. A second III-V compound layer is formed over the first III-V compound layer. The second III-V compound layer has a greater band gap than the first III-V compound layer. A third III-V compound layer is formed over the second III-V compound layer. The third III-V compound layer and the first III-V compound layer comprise a same III-V compound. A passivation layer is formed along a topmost surface and sidewalls of the third III-V compound layer. A fourth III-V compound layer is formed over the second III-V compound layer. The fourth III-V compound layer has a greater band gap than the first III-V compound layer.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: December 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Ling Yeh, Ching Yu Chen
  • Publication number: 20220384630
    Abstract: Disclosed is a semiconductor device and a method for fabricating such semiconductor device, specifically a High Electron Mobility Transistor (HEMT) with a back barrier layer for blocking electron leakage and improve threshold voltage. In one embodiment, a semiconductor device, includes: a Gallium Nitride (GaN) layer; a front barrier layer over the GaN layer; a source electrode, a drain electrode and a gate electrode formed over the front barrier layer; a 2-Dimensional Electron Gas (2-DEG) in the GaN layer at a first interface between the GaN layer and the front barrier layer; and a back barrier layer in the GaN layer, wherein the back barrier layer comprises Aluminum Nitride (AIN).
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: Chia-Ling YEH, Pravanshu Mohanta, Ching-Yu Chen, Jiang-He Xie, Yu-Shine Lin
  • Publication number: 20220384649
    Abstract: A method includes etching a first portion and a second portion of a dummy gate stack to form a first opening and a second opening, respectively, and depositing a silicon nitride layer to fill the first opening and the second opening. The deposition of the silicon nitride layer comprises a first process selected from treating the silicon nitride layer using hydrogen radicals, implanting the silicon nitride layer, and combinations thereof. The method further includes etching a third portion of the dummy gate stack to form a trench, etching a semiconductor fin underlying the third portion to extend the trench down into a bulk portion of a semiconductor substrate underlying the dummy gate stack, and depositing a second silicon nitride layer into the trench.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 1, 2022
    Inventors: Chung-Ting Ko, Han-Chi Lin, Chunyao Wang, Ching Yu Huang, Tze-Liang Lee, Yung-Chih Wang
  • Publication number: 20220376086
    Abstract: Various embodiments of the present disclosure are directed toward an integrated chip including an undoped layer overlying a substrate. A first barrier layer overlies the undoped layer. A doped layer overlies the first barrier layer. Further, a second barrier layer overlies the first barrier layer, where the second barrier layer is laterally offset from a perimeter of the doped layer by a non-zero distance. The first and second barrier layers comprise a same III-V semiconductor material. A first atomic percentage of a first element within the first barrier layer is less than a second atomic percentage of the first element within the second barrier layer.
    Type: Application
    Filed: August 5, 2022
    Publication date: November 24, 2022
    Inventors: Yun-Hsiang Wang, Chun Lin Tsai, Jiun-Lei Jerry Yu, Po-Chih Chen, Chia-Ling Yeh, Ching Yu Chen
  • Publication number: 20220373891
    Abstract: A method includes forming a bottom layer over a semiconductor substrate, where the bottom layer includes a polymer bonded to a first cross-linker and a second cross-linker, the first cross-linker being configured to be activated by ultraviolet (UV) radiation and the second cross-linker being configured to be activated by heat at a first temperature. The method then proceeds to exposing the bottom layer to a UV source to activate the first cross-linker, resulting in an exposed bottom layer, where the exposing activates the first cross-linker. The method further includes baking the exposed bottom layer, where the baking activates the second cross-linker.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 24, 2022
    Inventors: Jing Hong Huang, Chien-Wei Wang, Shang-Wern Chang, Ching-Yu Chang
  • Publication number: 20220367179
    Abstract: A method of forming a semiconductor device includes forming a mask layer over a substrate and forming an opening in the mask layer. A gap-filling material is deposited in the opening. A plasma treatment is performed on the gap-filling material. The height of the gap-filling material is reduced. The mask layer is removed. The substrate is patterned using the gap-filling material as a mask.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: Ching-Yu Chang, Jei Ming Chen, Tze-Liang Lee