Abstract: Circuitry and a method provide a plurality of timed control and bias voltages to sense amplifiers and write drivers of a spin-torque magnetoresistive random access memory array for improved power supply noise rejection, increased sensing speed with immunity for bank-to-bank noise coupling, and reduced leakage from off word line select devices in an active column.

Abstract: A method includes destructively reading bits of a spin torque magnetic random access memory and immediately writing back the original or inverted values. A detection of the majority state of the write back bits and a conditional inversion of write back bits are employed to reduce the number of write back pulses. A subsequent write command received within a specified time or before an original write operation is commenced will cause a portion of the write back pulses or the original write operation pulses to abort. Write pulses during subsequent write operations will follow the conditional inversion determined for the write back bits during destructive read.

Abstract: Radiation flux can be adjusted “on the fly” as an object (204) is being scanned in a security examination apparatus. Adjustments are made to the radiation flux based upon radiation incident on a first radiation detector (226) in an upstream portion (233) of an examination region. The object under examination is thus exposed to different radiation flux in coordination with a downstream motion (235) of the object relative to a second radiation detector (228). The radiation flux is adjusted so that a sufficient number of x-rays (that traverse the object) are incident on the second radiation detector. Images of the object can then be generated based upon data from the second radiation detector, where these images are thus of a desired/higher quality.

Abstract: A method of and a system for extracting 3D bag images from continuously reconstructed 2D image slices are provided. The method detects the boundaries of baggage in the reconstructed images, and provides better flexibilities for threat detection and displaying. The method comprises detecting starting and ending slices using multiple slices, counting bag slices, splitting 3D bag images when maximum number of slices of a 3D bag image is reached, and creating overlapping slices for the split 3D bag images.

Abstract: An antifuse circuit provides on a per bit basis a signal that indicates whether an MTJ (magnetic tunnel junction) antifuse has been previously programmed to a low resistance state in response to a program voltage. A sense amplifier provides the resistance state signal. A plurality of reference magnetic tunnel junctions are coupled in parallel and to the sense amplifier, each having a resistance within a range to provide a collective resistance that can be determined by the sense amplifier to differ from each resistance state of the MTJ antifuse. A write circuit selectively provides a current sufficient to create the program voltage when the write circuit is enabled to program the antifuse magnetic tunnel junction. Upon detecting a change in resistance in the MTJ antifuse, the write circuit reduces current supplied to the antifuse. Multiple antifuses may be programmed concurrently. Gate oxide thicknesses of transistors are adjusted for optimal performance.

Abstract: A method of and a system for spectral correction in multi-energy computed tomography are provided to correct reconstructed images, including high-energy CT images and Z (effective atomic number) images, for spectral variations, which include time variations on a scanner due to HVPS drift and scanner to scanner variations due to the beamline component differences. The method uses a copper filter mounted on the detector array for tracking the spectral changes. The method comprises: generating copper ratios; computing working air tables; calculating scales and offsets; and correcting high-energy CT images and Z images using calculated scales and offsets. The method further includes an off-line calibration procedure to generate necessary parameters for the online correction.

Abstract: An antifuse circuit provides on a per bit basis a signal that indicates whether an MTJ (magnetic tunnel junction) antifuse has been previously programmed to a low resistance state in response to a program voltage. A sense amplifier provides the resistance state signal. A plurality of reference magnetic tunnel junctions are coupled in parallel and to the sense amplifier, each having a resistance within a range to provide a collective resistance that can be determined by the sense amplifier to differ from each resistance state of the MTJ antifuse. A write circuit selectively provides a current sufficient to create the program voltage when the write circuit is enabled to program the antifuse magnetic tunnel junction. Upon detecting a change in resistance in the MTJ antifuse, the write circuit reduces current supplied to the antifuse. Multiple antifuses may be programmed concurrently. Gate oxide thicknesses of transistors are adjusted for optimal performance.

Abstract: A controller for a toggle memory that performs burst writes by reading a group of bits in the toggle memory and comparing each received data word of the burst with a portion of the group to determine which cells to toggle to enter the data of the burst write in the toggle memory. In one example the toggle memory includes magnetoresistive random access memory (MRAM) with cells using multiple free magnetic layers that toggle between states when subjected to a sequence of magnetic pulses along two directions. Because one read is performed for a group of data of the burst, the time needed to perform the burst write is reduced.

Abstract: A method of and a system for spectral correction in multi-energy computed tomography are provided to correct reconstructed images, including high-energy CT images and Z (effective atomic number) images, for spectral variations, which include time variations on a scanner due to HVPS drift and scanner to scanner variations due to the beamline component differences. The method uses a copper filter mounted on the detector array for tracking the spectral changes. The method comprises: generating copper ratios; computing working air tables; calculating scales and offsets; and correcting high-energy CT images and Z images using calculated scales and offsets. The method further includes an off-line calibration procedure to generate necessary parameters for the online correction.

Abstract: A method of and a system for extracting 3D bag images from continuously reconstructed 2D image slices are provided. The method detects the boundaries of baggage in the reconstructed images, and provides better flexibilities for threat detection and displaying. The method comprises detecting starting and ending slices using multiple slices, counting bag slices, splitting 3D bag images when maximum number of slices of a 3D bag image is reached, and creating overlapping slices for the split 3D bag images.

Abstract: A magnetoresistive random access memory (MRAM) has separate read and write paths. This reduces the peripheral circuitry by not requiring switching between read and write functions on a particular line. By having the paths dedicated to either read signals or write signals, the voltage levels can be optimized for these functions. The select transistors, which are part of only the read function, may be of the low-voltage type because they do not have to receive the relatively higher voltages of the write circuitry. Similarly, the write voltages do not have to be degraded to accommodate the lower-voltage type transistors. The size of the overall memory is kept efficiently small while improving performance. The memory cells are grouped so that adjacent to groups are coupled to a common global bit line which reduces the space required for providing the capacitance-reducing group approach to memory cell selection.

Abstract: In a magnetoresistive random access memory (MRAM), a magnetic tunnel junction (MTJ) (54) cell is stacked with an asymmetric tunnel device (56). This device, when used in a crosspoint MRAM array, improves the sensing of the state or resistance of the MTJ cells. Each MTJ cell has at least two ferromagnetic layers (42, 46) separated by an insulator (44). The asymmetric tunnel device (56) is electrically connected in series with the MTJ cell and is formed by at least two conductive layers (48, 52) separated by an insulator (50). The asymmetric tunnel device may be a MIM (56), MIMIM (80) or a MIIM (70). Asymmetry results from conducting electrons in a forward biased direction at a significantly greater rate than in a reversed biased direction. Materials chosen for the asymmetric tunnel device are selected to obtain an appropriate electron tunneling barrier shape to obtain the desired rectifying current/voltage characteristic.

Abstract: A circuit and method for counteracting stray magnetic fields generated by write currents in an MRAM memory reuses the write current in adjoining write columns via a current redistribution bus at a first end of the write lines. A first switch connected to a second end of each write line controls the write current in the write line. If the first switch is not conductive, a second switch connects the second end of the write line to a reference voltage terminal. For write lines located at sub-array edges, a predetermined amount of spacing may be used to avoid magnetic field disturbance in an adjacent sub-array. The number of spaces required can be minimized by specific activation of write line switches.

Abstract: A method for processing a conductive layer, such as a doped polysilicon layer (14) of a gate stack, provides a degas step after precleaning to reduce particle count and defectivity. The conductive layer is provided on a substrate (10), e.g., a silicon wafer. The substrate (10) and conductive layer are subjected to an elevated temperature, under a vacuum, whereby certain species are liberated. The substrate having the conductive layer formed thereon is then removed from the chamber, and moved to a second, separate chamber, in which a second conductive layer (20) is deposited. By switching chambers, the liberated species are largely prevented from contributing to particle count at the interface between the conductive layers. Alternatively, the second conductive layer is formed in the same chamber, provided that the liberated species are removed from the chamber prior to deposition of the second conductive layer.

Abstract: A semiconductor device (10) is formed having an SRAM array with a plurality of SRAM cells. In forming the access and latch transistors, two different gate electrode compositions are used to form the access and latch transistors. More specifically, a dielectric layer (22) is formed between two conductive layers (26 and 28) within the gate electrode (52) for the access transistors while the dielectric layer is not formed between the two conductive layers (26 and 28) for the latch transistors. This structure allows an increase in the beta ratio for the SRAM cell thereby making a more stable SRAM cell without having to use diffused resistors between the access transistors in storage nodes or by having to form a differential thickness between the gate dielectric layers for the latch transistors and the access transistors.