Patents by Inventor Chong Zhang

Chong Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190287815
    Abstract: The systems and methods described herein provide for the fabrication of semiconductor package substrates having magnetic inductors formed in at least a portion of the through-holes formed in the semiconductor package substrate. Such magnetic inductors are formed without exposing the magnetic material disposed in the through-hole to any wet chemistry (desmear, electro-less plating, etc.) processes by sealing the magnetic material with a patterned sealant (e.g., patterned dry film resist) which seals the magnetic material prior to performing steps involving wet chemistry on the semiconductor package substrate. Such beneficially minimizes or even eliminates the contamination of wet chemistry reagents by the magnetic material should the magnetic material remain exposed during the wet chemistry processes. The patterned sealant is removed subsequent to the semiconductor package processing steps involving wet chemistry.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 19, 2019
    Applicant: Intel Corporation
    Inventors: CHENG XU, CHONG ZHANG, YIKANG DENG, JUNNAN ZHAO, YING WANG
  • Publication number: 20190272936
    Abstract: Embodiments include inductors with embedded magnetic cores and methods of forming such inductors. Some embodiments may include an integrated circuit package that utilizes such inductors. For example, the integrated circuit package may include an integrated circuit die and a multi-phase voltage regulator electrically coupled to the integrated circuit die. In an embodiment, the multi-phase voltage regulator includes a substrate core and a plurality of inductors in the substrate core. In an embodiment, the inductors may include a conductive loop in and around the substrate core. In an embodiment, the conductive loops are electrically coupled to a voltage out line. Embodiments may also include a magnetic core surrounded by the conductive loops.
    Type: Application
    Filed: March 5, 2018
    Publication date: September 5, 2019
    Inventors: Chong ZHANG, Cheng XU, Ying WANG, Junnan ZHAO, Meizi JIAO, Yikang DENG
  • Publication number: 20190274217
    Abstract: Embodiments may include inductors with embedded magnetic cores and methods of making such inductors. In an embodiment, an integrated circuit package may include an integrated circuit die with a multi-phase voltage regulator electrically coupled to the integrated circuit die. In such embodiments, the multi-phase voltage regulator may include a substrate core and a plurality of inductors. The inductors may include a conductive through-hole disposed through the substrate core and a plugging layer comprising a dielectric material surrounding the conductive through-hole. In an embodiment, a magnetic sheath is formed around the plugging layer. In an embodiment, the magnetic sheath is separated from the plated through hole by the plugging layer. Additionally, a first layer comprising a dielectric material may be disposed over a first surface of the magnetic sheath, and a second layer comprising a dielectric material may be disposed over a second surface of the magnetic sheath.
    Type: Application
    Filed: March 2, 2018
    Publication date: September 5, 2019
    Inventors: Chong ZHANG, Ying WANG, Junnan ZHAO, Cheng XU, Yikang DENG
  • Patent number: 10396521
    Abstract: A laser includes a traveling wave laser cavity with an active section, a pulse stretcher, and a pulse compressor. The pulse stretcher is coupled to the waveguide before the active section and the pulse compressor is coupled to the waveguide after the active section.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: August 27, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Geza Kurczveil, Raymond G. Beausoleil, Di Liang, Chong Zhang, David Kielpinski
  • Publication number: 20190235545
    Abstract: Power supply rejection (PSR) peaking in Low Dropout (LDO) voltage regulators can lead to reduced bandwidth and efficiency. This paper presents a new design method by combining power transmission lines (PTL) with LDOs for enhancing its bandwidth and efficiency. This approach is applicable for LDOs regulating high speed I/O drivers. The PTL combined with decoupling capacitors on the package or board are used to mitigate the PSR peaking. This methodology is demonstrated using printed circuit board test vehicles with off-the-shelf components. When compared to conventional approaches, the PTL solution showed ˜80% lower power supply noise.
    Type: Application
    Filed: January 31, 2018
    Publication date: August 1, 2019
    Inventors: David Chong Zhang, Arijit Raychowdhury, Madhavan Swaminathan
  • Publication number: 20190227711
    Abstract: A computer-implemented method includes identifying a source data object of a distributed computing environment. The distributed computing environment includes two or more storage nodes. The source data object exists as two or more slices. At least one of the slices is replicated on at least two storage nodes. The computer-implemented method further includes associating the source data object with a tape. The tape is written by a tape drive controlled from the distributed computing environment. The computer-implemented method further includes copying the source data object to the tape by, for each source slice of the two or more slices, in sequence: selecting a source node of the two or more storage nodes whereon the source slice is replicated, mounting the tape drive to the source node, appending the source slice to the tape, and unmounting the tape drive.
    Type: Application
    Filed: April 2, 2019
    Publication date: July 25, 2019
    Inventors: Ke Jin, Chong Zhang, Xin Zhang, Kai Zhu
  • Patent number: 10286488
    Abstract: Embodiments of the present disclosure are directed towards an acousto-optics deflector and mirror for laser beam steering and associated techniques and configurations. In one embodiment, a laser system may include an acousto-optics module to deflect a laser beam in a first scanning direction of the laser beam on an integrated circuit (IC) substrate when the IC substrate is in a path of the laser beam and a mirror having at least one surface to receive the laser beam from the acousto-optics module, the mirror to move to control position of the laser beam in a second scanning direction, wherein the second scanning direction is substantially perpendicular to the first scanning direction. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: May 14, 2019
    Assignee: INTEL CORPORATION
    Inventors: Chong Zhang, Islam A. Salama
  • Publication number: 20190103719
    Abstract: A laser includes a traveling wave laser cavity with an active section, a pulse stretcher, and a pulse compressor. The pulse stretcher is coupled to the waveguide before the active section and the pulse compressor is coupled to the waveguide after the active section.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Inventors: Geza Kurczveil, Raymond G. Beausoleil, Di Liang, Chong Zhang, David Kielpinski
  • Publication number: 20190079781
    Abstract: A method for rendering interface elements, including: obtaining a first set of one or more interface elements associated with a target user interface (UI) to be rendered, the first set of one or more interface elements comprising one or more interface elements that meet a pre-configured priority condition; rendering the first set of one or more interface elements at a higher priority than other interface elements associated with the target UI; and outputting a rendering result of the first set of one or more interface elements.
    Type: Application
    Filed: July 10, 2018
    Publication date: March 14, 2019
    Inventors: Qinghe Xu, Xu Zeng, Zheng Liu, Yongcai Ma, Lidi Jiang, Kerong Shen, Decai Jin, Chong Zhang
  • Publication number: 20190075297
    Abstract: A graphics server and method for streaming rendered content via a remote graphics rendering service is provided. In one embodiment, the server includes a memory, a graphics renderer, a frame capturer, an encoder, and a processor. The memory is configured to store a pre-computed skip-frame message indicative to a client to re-use a previously transmitted frame of the video stream. The graphics renderer is configured to identify when rendered content has not changed. When the graphics renderer identifies that the rendered content has not changed, the processor is configured to cause: (1) the frame capturer to not capture the frames of the rendered content; (2) the encoder to not encode the frames of the rendered content; and (3) the pre-encoded skip-frame message to be transmitted without requiring any pixel processing.
    Type: Application
    Filed: November 6, 2018
    Publication date: March 7, 2019
    Inventors: Thomas Meier, Chong Zhang, Bhanu Murthy, Sharad Gupta, Karthik Vijayan
  • Publication number: 20190066258
    Abstract: A method for processing images, including: determining, subsequent to transmitting content of a target image corresponding to a current processing request to a processor, whether the target image is being used by other processing requests; and in response to the determination that the target image is not being used by the other processing requests, releasing memory utilized by the target image at a target memory, the target memory being used to store a copy corresponding to the target image.
    Type: Application
    Filed: September 5, 2018
    Publication date: February 28, 2019
    Inventor: Chong Zhang
  • Patent number: 10204108
    Abstract: The method for manufacturing a file system update package includes: file information of each source file in a file system to be updated is acquired; an operation type of a target file corresponding to each source file is determined according to the file information of each source file, the operation type including one of a dynamic type, a static type and a recently-added type; when the operation type of the target file is the dynamic type or the recently-added type, the target file is compressed to form a compressed file package, and when the operation type of a certain target file is the static type, a differential operation is executed according to a difference between the target file and the corresponding source file to form a differential file package; and all the compressed file packages and all the differential file packages are packaged to form a file system update package.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: February 12, 2019
    Assignee: XI'AN ZHONGXING NEW SOFTWARE CO., LTD.
    Inventors: Xi Chen, Jianping Shuang, Chong Zhang
  • Patent number: 10154265
    Abstract: A graphics server and method for streaming rendered content via a remote graphics rendering service. One embodiment of the graphics server includes: (1) a frame capturer configured to capture frames of rendered content at a frame rate, (2) an encoder configured to encode captured frames at the frame rate, and (3) a processor configured to cause encoded frames to be transmitted if the rendered content is at least partially changed, and cause a skip-frame message to be transmitted, the skip-frame message configured to cause the frame capturer to forgo capturing and the encoder to forgo encoding if the rendered content is unchanged.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: December 11, 2018
    Assignee: Nvidia Corporation
    Inventors: Thomas Meier, Chong Zhang, Bhanu Murthy, Sharad Gupta, Karthik Vitjayan
  • Patent number: 10142408
    Abstract: A hardware loading adjusting method includes performing a first thread for receiving and decompressing the compressed data, to generate and to store decompressed data to a first storage module by a first speed; performing a second thread for storing the decompressed data to a second storage module by a second speed; and adjusting a ratio between the size of the compressed data and the decompressed data stored in the first storage module and the size of the first storage module according to the relationship between the first speed and the second speed.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: November 27, 2018
    Assignee: Winstron Corporation
    Inventor: Chong Zhang
  • Patent number: 10136362
    Abstract: Embodiments of the present invention provide a capability negotiation method, system and apparatus, which are applied to the field of communications, and can improve the flexibility of capability negotiation. The capability negotiation method is applied to a base station, including: acquiring a gateway capability identifier, where the gateway capability identifier is a description of an end to end quality of service EtoE QoS control capability of a gateway; parsing the gateway capability identifier to obtain the EtoE QoS control capability of the gateway; and determining whether the EtoE QoS control capability of the gateway matches a local EtoE QoS control capability, so that when the EtoE QoS control capability of the gateway matches the local EtoE QoS control capability, EtoE QoS control is established.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: November 20, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Min Liao, Yufang Wang, Chong Zhang, Hui Lu
  • Patent number: 9953959
    Abstract: A metal protected fan-out cavity enables assembly of a package-on-package (PoP) integrated circuit while reducing PoP solder spacing and overall z-height. A horizontal fan-out conductor provides a contact between a die contact and a lower package via. A metal protection layer may be used during manufacture to protect the fan-out conductor, such as providing a laser stop during laser skiving. The metal protection layer materials and an etching solution may be selected to allow for subsequent removal via etching while leaving the fan-out conductor intact. The metal protection layer and fan-out conductor materials may also be selected to reduce or eliminate formation of an intermetallic compound (IMC) between the metal protection layer and the fan-out conductor.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: April 24, 2018
    Assignee: Intel Corporation
    Inventors: Kristof Darmawikarta, Robert Alan May, Yikang Deng, Amruthavalli Pallavi Alur, Sheng Li, Chong Zhang, Sri Chaitra Jyotsna Chavali, Amanda E. Schuckman
  • Publication number: 20180107394
    Abstract: A computer-implemented method includes identifying a source data object of a distributed computing environment. The distributed computing environment includes two or more storage nodes. The source data object exists as two or more slices. At least one of the slices is replicated on at least two storage nodes. The computer-implemented method further includes associating the source data object with a tape. The tape is written by a tape drive controlled from the distributed computing environment. The computer-implemented method further includes copying the source data object to the tape by, for each source slice of the two or more slices, in sequence: selecting a source node of the two or more storage nodes whereon the source slice is replicated, mounting the tape drive to the source node, appending the source slice to the tape, and unmounting the tape drive. A corresponding computer program product and computer system are also disclosed.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 19, 2018
    Inventors: Ke Jin, Chong Zhang, Xin Zhang, Kai Zhu
  • Publication number: 20180107395
    Abstract: A computer-implemented method includes identifying a source data object of a distributed computing environment. The distributed computing environment includes two or more storage nodes. The source data object exists as two or more slices. At least one of the slices is replicated on at least two storage nodes. The computer-implemented method further includes associating the source data object with a tape. The tape is written by a tape drive controlled from the distributed computing environment. The computer-implemented method further includes copying the source data object to the tape by, for each source slice of the two or more slices, in sequence: selecting a source node of the two or more storage nodes whereon the source slice is replicated, mounting the tape drive to the source node, appending the source slice to the tape, and unmounting the tape drive. A corresponding computer program product and computer system are also disclosed.
    Type: Application
    Filed: December 13, 2017
    Publication date: April 19, 2018
    Inventors: Ke Jin, Chong Zhang, Xin Zhang, Kai Zhu
  • Patent number: 9917044
    Abstract: Some embodiments of the present disclosure describe a multi-layer package with a bi-layered dielectric structure and associated techniques and configurations. In one embodiment, an integrated circuit (IC) package assembly includes a dielectric structure coupled with a metal layer, with the dielectric structure including a first dielectric layer and a second dielectric layer, wherein the first dielectric layer has a thickness less than a thickness of the second dielectric layer and a dielectric loss tangent greater than a dielectric loss tangent of the second layer. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: March 13, 2018
    Assignee: INTEL CORPORATION
    Inventors: Zheng Zhou, Mihir K. Roy, Chong Zhang, Kyu-Oh Lee, Amanda E. Schuckman
  • Publication number: 20170103941
    Abstract: Some embodiments of the present disclosure describe a multi-layer package with a bi-layered dielectric structure and associated techniques and configurations. In one embodiment, an integrated circuit (IC) package assembly includes a dielectric structure coupled with a metal layer, with the dielectric structure including a first dielectric layer and a second dielectric layer, wherein the first dielectric layer has a thickness less than a thickness of the second dielectric layer and a dielectric loss tangent greater than a dielectric loss tangent of the second layer. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: May 13, 2015
    Publication date: April 13, 2017
    Inventors: Zheng Zhou, Mihir K. Roy, Chong Zhang, Kyu-Oh Lee, Amanda E. Schuckman