Patents by Inventor Choon Kim

Choon Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10937771
    Abstract: A semiconductor package is provided which includes a redistribution substrate, an interconnect substrate on the redistribution substrate, a metal layer on the semiconductor chip, a semiconductor chip on the redistribution substrate and in the hole of the interconnect substrate, and a mold layer in a gap between the semiconductor chip and the interconnect substrate. The interconnect substrate includes a hole penetrating thereinside. The interconnect substrate includes base layers and a conductive member extending through the base layers. A top surface of the interconnect substrate is positioned either above or below the level of the top surface of the metal layer.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: March 2, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jichul Kim, Jae Choon Kim, Hansung Ryu, KyongSoon Cho, YoungSang Cho, Yeo-Hoon Yoon
  • Publication number: 20210033768
    Abstract: A polarizing plate and an optical display apparatus are provided. A polarizing plate includes: a polarizer; and a first retardation layer and a second retardation layer sequentially stacked on a lower surface of the polarizer, and the first retardation layer has a short wavelength dispersion of about 1 to about 1.03, a long wavelength dispersion of about 0.98 to about 1, and an in-plane retardation of about 180 nm to about 220 nm at a wavelength of 550 nm, the second retardation layer has a short wavelength dispersion of about 1 to about 1.1, a long wavelength dispersion of about 0.96 to about 1, and an in-plane retardation Re of about 70 nm to about 120 nm at a wavelength of 550 nm, and a ratio of out-of-plane retardation of the second retardation layer at a wavelength of 550 nm to thickness thereof is about ?33 nm/?m to about ?15 nm/?m.
    Type: Application
    Filed: July 28, 2020
    Publication date: February 4, 2021
    Inventors: Jun Mo KOO, Bong Choon KIM, Dong Yoon SHIN, Jung Hun YOU, Sang Hum LEE
  • Patent number: 10912131
    Abstract: A method of controlling, by using a mobile terminal, at least one Bluetooth Low Energy (BLE) device is provided. The method includes searching for at least one BLE device, displaying a BLE device list, including the at least one searched for BLE device, on a display unit of the mobile terminal, receiving an input of selection of a BLE device from the BLE device list, receiving an input of user added information from a user regarding the selected BLE device, and mapping and storing property information and the user added information regarding the selected BLE device.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: February 2, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ju-youn Lee, Sang-hyup Lee, Min-jeong Ko, Kwang-choon Kim, Jung-won Suh, Seung-hyuck Shin, Sung-jin Yoon
  • Publication number: 20210023369
    Abstract: A cranial nerve control device includes: goggles worn on a patient head; a functional electric stimulator adapted to apply peripheral nerve stimulation to a patient; a plurality of module guides provided to the goggles; a functional electric stimulator controller adapted to control the functional electric stimulator; a transcranial current stimulator-combined near-infrared spectroscopy measurement module controller adapted to control the transcranial current stimulator-combined functional near-infrared spectroscopy measurement module; and a simulation device connected to both the transcranial current stimulator-combined near-infrared spectroscopy measurement module controller and the functional electric stimulator to provide feedback of a transcranial current stimulation control signal to the transcranial current stimulator and feedback of a functional electrical stimulation control signal to the functional electric stimulator while monitoring the patient brain activity.
    Type: Application
    Filed: November 1, 2018
    Publication date: January 28, 2021
    Applicant: CYBERMEDIC CO., LTD.
    Inventors: Ho Choon JEONG, Hyun Hee LEE, Sang Sea LEE, Myoung Choon KIM
  • Patent number: 10879225
    Abstract: A semiconductor package includes a package substrate, a first semiconductor device arranged on the package substrate, at least one second semiconductor device on the first semiconductor device to partially cover the first semiconductor device from a top down view, a heat dissipating insulation layer coated on the first semiconductor device and the at least one second semiconductor device, a conductive heat dissipation structure arranged on the heat dissipating insulation layer on a portion of the first semiconductor device not covered by the second semiconductor device, and a molding layer on the package substrate to cover the first semiconductor device and the at least one second semiconductor device. The heat dissipating insulation layer is formed of an electrically insulating and thermally conductive material, and the conductive heat dissipation structure formed of an electrically and thermally conductive material.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: December 29, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-Keun Kim, Kyung-Suk Oh, Hwa-Il Jin, Dong-Kwan Kim, Yeong-Seok Kim, Jae-Choon Kim, Seung-Tae Hwang
  • Patent number: 10879294
    Abstract: An image sensor package includes an image sensor chip, a logic chip, and a memory chip structure that are vertically stacked. The image sensor chip includes a pixel array and an interconnection structure that receives a power voltage, ground voltage, or signals. The logic chip processes pixel signals from the image sensor chip and receives the power voltage, ground voltage, or signals via the image sensor chip. The memory chip structure includes a memory chip, a molding portion surrounding the memory chip, and at least one through mold via contact vertically passing through the molding portion and connected to at least one of the logic or memory chip. The memory chip stores at least one of a pixel signal processed by the logic chip or a pixel signal from the image sensor chip and receives the power voltage, ground voltage, or signals via the image sensor chip and logic chip.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: December 29, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-hoon Kim, Ji-chul Kim, Seung-yong Cha, Jae-choon Kim
  • Patent number: 10868209
    Abstract: A sensor element is disclosed.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: December 15, 2020
    Assignee: OSRAM OLED GMBH
    Inventors: Choon Kim Lim, Choo Kean Lim, Jeok Pheng Go
  • Patent number: 10854788
    Abstract: An optoelectronic component and a method for producing an optoelectronic component are disclosed. In an embodiment a method includes attaching a plurality of optoelectronic semiconductor chips on predetermined locations of an intermediate film, providing a cavity film with a plurality of separated openings, attaching the cavity film to the intermediate film such that each optoelectronic semiconductor chip is associated with a respective opening, wherein the cavity film is thicker than the optoelectronic semiconductor chips such that the cavity film exceeds the optoelectronic semiconductor chips in a direction away from the intermediate film, filling a casting material in each of the openings such that the optoelectronic semiconductor chips are casted with the casting material and removing the intermediate film.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: December 1, 2020
    Assignee: OSRAM OLED GMBH
    Inventors: Choo Kean Lim, Choon Keat Or, Choon Kim Lim, Ai Cheng Chan
  • Publication number: 20200335480
    Abstract: A semiconductor package includes: a first thermal pillar disposed on a package substrate, and having an opening; a first chip stack disposed on the package substrate and in the opening of the first thermal pillar, and including a first lateral surface; a semiconductor chip disposed on the package substrate and in the opening, wherein the semiconductor chip is spaced apart from the first chip stack; and a first heat transfer film disposed between the first thermal pillar and the first lateral surface of the first chip stack.
    Type: Application
    Filed: December 23, 2019
    Publication date: October 22, 2020
    Inventors: HEEJUNG HWANG, JAE CHOON KIM, YUN SEOK CHOI
  • Publication number: 20200322471
    Abstract: A communication terminal and a method of providing a unified natural language interface to the same are disclosed. The method includes: determining, when text information containing many characters is created, whether the text information conforms to one of preset grammatical constraints; extracting, when the text information conforms to one of the grammatical constraints, tokens of one or more of characters from the text information, and extracting, when the text information does not conform to one of the grammatical constraints, one or more characters having an attribute probability higher than a reference probability as a token; and analyzing the extracted tokens to determine a function to handle the extracted tokens, and executing the determined function based on the extracted tokens.
    Type: Application
    Filed: June 23, 2020
    Publication date: October 8, 2020
    Inventors: Myeong Gi JEONG, Young Hee PARK, Kwang Choon KIM, Jung Yun SEO, Choong Nyoung SEON
  • Patent number: 10790213
    Abstract: A heat radiation device includes a semiconductor substrate. A first electrode is disposed on the semiconductor substrate. A second electrode is disposed on the semiconductor substrate and is spaced apart from the first electrode. A first through electrode is disposed in the semiconductor substrate. The first through electrode is electrically connected to the first electrode.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: September 29, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Choon Kim, Young-Deuk Kim, Younghoon Hyun
  • Publication number: 20200303276
    Abstract: A chip on film package includes; a flexible base film having a first surface and a second surface opposite to each other, and having a chip mounting region on the first surface; a plurality of wirings extending in a first direction toward the chip mounting region; a semiconductor chip mounted in the chip mounting region on the first surface of the base film and electrically connected to the wirings; a pair of first heat dissipation members on the first surface of the base film and spaced apart from the semiconductor chip, and extending in a second direction perpendicular to the first direction; and a second heat dissipation member on the first surface of the base film and covering the semiconductor chip and the pair of first heat dissipation members.
    Type: Application
    Filed: November 4, 2019
    Publication date: September 24, 2020
    Inventors: Seung-Tae Hwang, Jae-Choon Kim, Kyung-Suk Oh, Woon-Bae Kim, Jae-Min Jung
  • Patent number: 10764570
    Abstract: The present invention relates to a rotating inspector for a camera module. The rotating inspector includes a rotary table having one or more socket units on which the camera module mounted; a plurality of inspection devices disposed around the rotary table to inspect the camera module; test boards disposed on the rotary table, each of test boards being connected to the one or more socket units, respectively to control the camera module and generate inspection data for the camera module; a first data processing unit disposed on the rotary table and analyzing the inspection data to generate result data for possible defects of the camera module; a second data processing unit disposed outside the rotary table, the second data processing unit being configured to receive the result data and to sort and store the received data; and a data transmission unit transmitting the result data generated in the first data processing unit to the second data processing unit.
    Type: Grant
    Filed: January 20, 2019
    Date of Patent: September 1, 2020
    Assignee: ISMedia Co., Ltd.
    Inventors: Seong Cheol Hong, Dong Choon Kim, Sung Oh Yim, Yong Woo Han, Eun Seok Shin, Cheon Su Mun, Min Seog Choi
  • Patent number: 10707196
    Abstract: An electronic device includes a substrate, a first electronic product arranged on the substrate, a second electronic product arranged on the substrate to be spaced apart from the first electronic product, and a heat dissipating assembly covering the first and second electronic products, the heat dissipating assembly comprising a heat dissipating chamber including a hermetically sealed space having a first portion having one or more gaps in which a flowable heat dissipation fluid is disposed and having a second portion in which a solid thermal conductive member is disposed to prevent the flow of the heat dissipation fluid across the second portion with respect to a plan view, wherein the first portion of the heat dissipating chamber has a first thermal conductivity and overlaps with the first electronic product in the plan view, wherein the solid thermal conductive member has a second thermal conductivity less than the first thermal conductivity, wherein the solid thermal conductive member overlaps with the se
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: July 7, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Choon Kim, Young-Deuk Kim, Woo-Hyun Park
  • Publication number: 20200196435
    Abstract: The present invention relates to a method of manufacturing a multi-structural high-heat-dissipation part having the controlled packing density of a carbon material and to a multi-structural high-heat-dissipation part manufactured thereby, the method including preparing a mixture by mixing a binder pitch with a carbon material including a first carbon material powder and a second carbon material powder having a smaller diameter than the diameter of the first carbon material powder, forming a compact from the mixture using a hot-forming process, and producing a graphitized pitch/carbon material compact by subjecting the compact to graphitization through heat treatment and cooling. Thereby, the packing density of the carbon material can be improved through bimodal distribution using pieces of carbon material having different diameters, thus increasing thermal conductivity in in-plane and through-plane directions and strength.
    Type: Application
    Filed: September 25, 2019
    Publication date: June 18, 2020
    Inventors: Jong Seok Woo, Mun Hee Lee, Byung Choon Kim, Kwang Sang Park, Sung Hoon Park
  • Publication number: 20200161201
    Abstract: A chip structure is provided. The chip structure includes: a first lower chip structure; and an upper chip structure on the first lower chip structure and having a pixel array region. The first lower chip structure includes: a first lower semiconductor substrate having a first side and a second side opposing each other; a first portion on the first side of the first lower semiconductor substrate; and a second portion on the second side of the first lower semiconductor substrate, the first portion of the first lower chip structure includes a gate wiring, the second portion of the first lower chip structure includes a second side wiring and a heating element, and the heating element is on the same plane as that of the second side wiring and has a length greater than that of the second side wiring.
    Type: Application
    Filed: January 24, 2020
    Publication date: May 21, 2020
    Inventors: Woo Hyun Park, Jae Choon KIM
  • Patent number: 10658266
    Abstract: A method for managing a temperature of a device includes determining a temperature of a circuit or a package including the circuit, and selectively operating a thermoelectric semiconductor based on the determined temperature to adjust the temperature of the circuit or the package.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: May 19, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Choon Kim, Jichul Kim, Jin-Kwon Bae, Eunseok Cho
  • Publication number: 20200135790
    Abstract: An image sensor package includes an image sensor chip, a logic chip, and a memory chip structure that are vertically stacked. The image sensor chip includes a pixel array and an interconnection structure that receives a power voltage, ground voltage, or signals. The logic chip processes pixel signals from the image sensor chip and receives the power voltage, ground voltage, or signals via the image sensor chip. The memory chip structure includes a memory chip, a molding portion surrounding the memory chip, and at least one through mold via contact vertically passing through the molding portion and connected to at least one of the logic or memory chip. The memory chip stores at least one of a pixel signal processed by the logic chip or a pixel signal from the image sensor chip and receives the power voltage, ground voltage, or signals via the image sensor chip and logic chip.
    Type: Application
    Filed: December 4, 2019
    Publication date: April 30, 2020
    Inventors: Yong-hoon KIM, Ji-chul KIM, Seung-yong CHA, Jae-choon KIM
  • Publication number: 20200135710
    Abstract: A semiconductor package includes a package substrate, a first semiconductor device arranged on the package substrate, at least one second semiconductor device on the first semiconductor device to partially cover the first semiconductor device from a top down view, a heat dissipating insulation layer coated on the first semiconductor device and the at least one second semiconductor device, a conductive heat dissipation structure arranged on the heat dissipating insulation layer on a portion of the first semiconductor device not covered by the second semiconductor device, and a molding layer on the package substrate to cover the first semiconductor device and the at least one second semiconductor device. The heat dissipating insulation layer is formed of an electrically insulating and thermally conductive material, and the conductive heat dissipation structure formed of an electrically and thermally conductive material.
    Type: Application
    Filed: June 4, 2019
    Publication date: April 30, 2020
    Inventors: Won-Keun KIM, Kyung-Suk OH, Hwa-Il JIN, Dong-Kwan KIM, Yeong-Seok KIM, Jae-Choon KIM, Seung-Tae HWANG
  • Publication number: 20200135980
    Abstract: An optoelectronic component and a method for producing an optoelectronic component are disclosed. In an embodiment a method includes attaching a plurality of optoelectronic semiconductor chips on predetermined locations of an intermediate film, providing a cavity film with a plurality of separated openings, attaching the cavity film to the intermediate film such that each optoelectronic semiconductor chip is associated with a respective opening, wherein the cavity film is thicker than the optoelectronic semiconductor chips such that the cavity film exceeds the optoelectronic semiconductor chips in a direction away from the intermediate film, filling a casting material in each of the openings such that the optoelectronic semiconductor chips are casted with the casting material and removing the intermediate film.
    Type: Application
    Filed: July 6, 2017
    Publication date: April 30, 2020
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Choo Kean LIM, Choon Keat OR, Choon Kim LIM, Ai Cheng CHAN