Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11901307
    Abstract: Semiconductor devices and method of manufacture are provided. In embodiments a conductive connector is utilized to provide an electrical connection between a substrate and an overlying shield. The conductive connector is placed on the substrate and encapsulated with an encapsulant. Once encapsulated, an opening is formed through the encapsulant to expose a portion of the conductive connector. The shield is deposited through the encapsulant to make an electrical connection to the conductive connector.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yao Chuang, Meng-Wei Chou, Shin-Puu Jeng
  • Patent number: 11896125
    Abstract: A bracket device of a slide rail assembly includes a longitudinal wall and a mounting member. The mounting member is movable relative to the longitudinal wall along a height direction of the longitudinal wall. When the bracket device is rotated to be switched from a first state to a second state, the mounting member is configured to be moved from a first position to a second position. When the mounting member is located at the first position, the mounting member is operable to be mounted to a rack. When the mounting member is located at the second position, the mounting member is prevented from being mounted to the rack.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: February 13, 2024
    Assignees: King Slide Works Co., Ltd., King Slide Technology Co., Ltd.
    Inventors: Ken-Ching Chen, Shun-Ho Yang, Chi-Chih Chou, Chun-Chiang Wang
  • Patent number: 11900896
    Abstract: A source driver includes a plurality of output terminals and a plurality of driving channels. Each of the plurality of driving channels is coupled to an output terminal among the plurality of output terminals and includes an output buffer, an output enable switch and a charge sharing circuit. The output enable switch is coupled between the output buffer and the corresponding output terminal. The charge sharing circuit is coupled to the corresponding output terminal. Wherein, the charge sharing circuits of at least two of the plurality of driving channels are commonly coupled to a charge sharing bus.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: February 13, 2024
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Jhih-Siou Cheng, Yen-Kai Chen, Jui-Chan Chang, Chih-Hsien Chou
  • Patent number: 11900525
    Abstract: Example embodiments of the present disclosure relate to systems and methods for compressing attributes of volumetric and hypervolumetric datasets. An example system performs operations including obtaining a reference dataset comprising attributes indexed by a domain of multidimensional coordinates; subdividing the domain into a plurality of blocks respectively associated with a plurality of attribute subsets; inputting, to a local nonlinear operator, a latent representation for an attribute subset associated with at least one block of the plurality of blocks; obtaining, using the local nonlinear operator and based on the latent representation, an attribute representation of one or more attributes of the attribute subset; and updating the latent representation based on a comparison of the attribute representation and the reference dataset.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: February 13, 2024
    Assignee: GOOGLE LLC
    Inventors: Philip Andrew Chou, Berivan Isik, Sung Jin Hwang, Nicholas Milo Johnston, George Dan Toderici
  • Patent number: 11902803
    Abstract: Methods, systems, and storage media are described for physical-layer cell identifier (PCI) configuration and Mobility Robustness Optimization (MRO). In particular, some embodiments may be directed to fifth-generation self-organizing network (5G SON) solutions such as the management of distributed physical-layer cell identifier (PCI) configuration, centralized PCI configuration, and MRO. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: February 13, 2024
    Assignee: Intel Corporation
    Inventors: Joey Chou, Yizhi Yao
  • Patent number: 11901171
    Abstract: In some embodiments, the present disclosure relates to a method that includes aligning a stealth laser apparatus over a wafer using an infrared camera coupled to the stealth laser apparatus. The stealth laser apparatus is used to form a stealth damage region within the wafer that is continuously connected around the wafer and separates an inner region from an outer region of the wafer. The stealth damage region is also arranged at a first distance from an edge of the wafer and extends from a first depth to a second depth beneath a top surface of the wafer. Further, the method includes forming a groove in the wafer to separate the outer region from the inner region of the wafer. The outer region of the wafer is removed using a blade, and a top portion of the inner region of the wafer is removed using a grinding apparatus.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Tung Wu, Hsun-Chung Kuang, Tung-He Chou
  • Patent number: 11900196
    Abstract: A radio frequency identification integrated circuit for reducing pin counts and an RFID providing method thereof are provided in the present invention. The radio frequency identification integrated circuit includes a first IO pin, a second IO pin and a third IO pin. The method includes determining whether the coil is coupled to the first IO pin, the second IO pin and the third IO pin when the RFID IC is enabled; and determining the identification according to the voltage status of the non-coupled pin and the pins coupled to the coil.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: February 13, 2024
    Assignee: GENERALPLUS TECHNOLOGY INC.
    Inventors: Hsin Chou Lee, Li Sheng Lo, Hsien-Yao Li
  • Patent number: 11895964
    Abstract: The inbred rice line designated DG263L is disclosed. Embodiments include the seeds of inbred rice line designated DG263L, the plants of inbred rice line designated DG263L, plant parts of inbred rice line designated DG263L, and methods for producing a rice plant produced by crossing rice DG263L with itself or with another rice variety. Embodiments include methods for producing a rice plant containing in its genetic material one or more genes or transgenes and the transgenic rice plants and plant parts produced by those methods. Embodiments also relate to rice cultivars, breeding cultivars, plant parts, and cells derived from inbred rice line designated DG263L, methods for producing other rice cultivars, lines or plant parts derived from inbred rice line designated DG263L, and the rice plants, varieties, and their parts derived from use of those methods. Embodiments further include hybrid rice seeds, plants, and plant parts produced by crossing DG263L with another rice cultivar.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: February 13, 2024
    Assignee: Nutrien AG Solutions, Inc.
    Inventors: Qiming Shao, Nanyen Chou, Kirk Douglas Johnson
  • Patent number: 11899188
    Abstract: An optical lens system includes, in order from a magnified side to a minified side, a first lens group of positive refractive power and a second lens group of positive refractive power. The first lens group includes a first lens and a second lens, and the second lens group includes a third lens and a fourth lens. One of the third lens and the fourth lens includes one aspheric surface, and each of the lenses in the optical lens system is a singlet lens. The optical lens satisfies a condition of TE(?=400)>94%, where TE(?=400) denotes an overall transmittance of all of the lenses in the optical lens system measured at a wavelength of 400 nm.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: February 13, 2024
    Assignee: YOUNG OPTICS INC.
    Inventors: Hung-You Cheng, Yu-Hung Chou, Ching-Lung Lai, Yi-Hua Lin, Wei-Hao Huang
  • Patent number: 11901455
    Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Su-Hao Liu, Kuo-Ju Chen, Kai-Hsuan Lee, I-Hsieh Wong, Cheng-Yu Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo, Syun-Ming Jang, Meng-Han Chou
  • Patent number: 11902895
    Abstract: Methods, systems, and storage media are described for Load Balancing Optimization (LBO) and Mobility Robustness Optimization (MRO) for fifth generation (5G) systems. In particular, some embodiments may be directed intra-radio access technology (RAT) energy saving scenarios while other embodiments may be directed to and inter-RAT energy saving scenarios. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: February 13, 2024
    Assignee: Intel Corporation
    Inventors: Joey Chou, Yizhi Yao
  • Patent number: 11898075
    Abstract: A yellow light emitting device may have a light source and a color converter wherein at most 1% of the total emitted radiant power of the yellow light emitting device is emitted in a wavelength range shorter than 520 nm, as well as the use of the yellow light emitting device.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: February 13, 2024
    Inventors: Hannah Stephanie Mangold, Sorin Ivanovici, Martin Koenemann, Siang Fu Hong, Chia Wei Tsai, Yen Te Lee, Wei Cheng Chou
  • Publication number: 20240047251
    Abstract: A gas purge device includes a first nozzle and a gas gate. The first nozzle is coupled to a front-opening unified pod (FOUP) through a first port of the FOUP. The gas gate is coupled to the first nozzle via a first pipe. The gas gate includes a first mass flow controller (MFC), a second MFC, and a first switch unit. The first MFC is configured to control a first flow of a first gas. The second MFC is configured to control a second flow of a second gas. The first switch unit is coupled to the first MFC and the second MFC, and is configured to provide the first gas to the first nozzle through the first pipe or receive the second gas from the first nozzle through the first pipe according to a process configuration.
    Type: Application
    Filed: October 19, 2023
    Publication date: February 8, 2024
    Inventors: MENG-LIANG WEI, SUN-FU CHOU
  • Publication number: 20240041849
    Abstract: Compounds and methods are provided for the treatment of neurological or mitochondrial diseases, including epilepsy. In some embodiments, the compounds are substituted 1,4-naphthoquinones.
    Type: Application
    Filed: September 29, 2023
    Publication date: February 8, 2024
    Applicant: MUSC FOUNDATION FOR RESEARCH DEVELOPMENT
    Inventors: James C. CHOU, Sherine S.L. CHAN, Richard A. HIMES
  • Publication number: 20240046394
    Abstract: A method and system for accelerating employee growth is disclosed. A growth track is created. The growth track is associated with one or more competencies. The growth track is associated with one or more track levels. The growth track is aligned with a job architecture. The job architecture includes a job function, a job type, and one or more job tracks. The one or more job levels are mapped to the one or more track levels. A growth area is created. The growth area relates to one or more competencies. A user interface is caused to be presented on a device of a user based on the user being associated with the job function and the job type. The user interface allows the user to share an update pertaining to a progress of the user within the growth area.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 8, 2024
    Inventors: Aleksandr Mistratov, Srilakshmi Manikantan, Joan Roig Arderiu, Jared Erondu, Ricky Rizal Zein, Teresa Do, Chuen Yan Lau, Scott Dennis Lindley, Neil Phillip Steiner, Angeles Arena, Sergio Minutoli, Colin VanLang, Benjamin Ki, Hari Vignesh Ganesan, Samuel John Brian Coxon, Sarah Zhao, Harmony Merva Geauvreau-Dashut, Thomas Chang, Jeffrey Cheung, Emily Marshall, Adam Romel David, Lance Allen Laughlin, JR., Carrie Jo Noonan, Nayana Srivastava, Jaclyn Anh Tu Tran, Kevin Cook, Dina Deng, Audrey Chou, Jay Ashish Mahabal
  • Publication number: 20240041328
    Abstract: A minimally invasive spectrophotometric system. In some embodiments, the system includes a minimally invasive device and a spectrophotometer. The spectrophotometer may include: a transmitting fiber, a receiving fiber, and a head. The head of the spectrophotometer may include: a light source connected to the transmitting fiber and a photodetector connected to the receiving fiber. A portion of the transmitting fiber may be in an insertion tube of the minimally invasive device, and a portion of the receiving fiber may be in the insertion tube of the minimally invasive device. The head of the spectrophotometer may occupy a volume of less than 300 cubic centimeters.
    Type: Application
    Filed: December 13, 2021
    Publication date: February 8, 2024
    Inventors: Paul Mannion, Kate LeeAnn Bechtel, Suresh Chengalva, Chia-Te Chou, Lok Man Chu, Craig Gardner, Alexander Gondarenko, Richard Grote, Vafa Jamali, Haydn Frederick Jones, Jennifer Lynn CORSO, Roozbeh Parsa, Kyle Rick, Aaron John Zilkie
  • Publication number: 20240047270
    Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a semiconductor substrate, a first patterned conductive layer, a second patterned conductive layer, a first dielectric layer, a third patterned conductive layer, a fourth patterned conductive layer, a second dielectric layer, and an oxide structure. The first dielectric layer is disposed on the semiconductor substrate and surrounds the first patterned conductive layer and the second patterned conductive layer. The third patterned conductive layer is disposed on the first patterned conductive layer. The fourth patterned conductive layer is disposed on the second patterned conductive layer. The second dielectric layer is disposed on the first dielectric layer. The oxide structure is in contact with the second dielectric layer, a side surface of the fourth patterned conductive layer, and a side surface of the third patterned conductive layer.
    Type: Application
    Filed: August 3, 2022
    Publication date: February 8, 2024
    Inventors: PEI-YU CHOU, TSAI-JUNG HO, MENG-KU CHEN, TZE-LIANG LEE
  • Publication number: 20240047542
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a source region, a drain region, a gate region and a gate oxide. The gate region is disposed between the source region and the drain region. The gate oxide is disposed on the gate region. A bottom interface is between the gate region and the gate oxide, and an entire of the bottom interface is substantially flat.
    Type: Application
    Filed: August 3, 2022
    Publication date: February 8, 2024
    Inventors: JHIH-BIN CHEN, HUNG-SHU HUANG, JHU-MIN SONG, CHIEN-CHIH CHOU, YU-CHANG JONG, FEI-YUN CHEN
  • Publication number: 20240047495
    Abstract: A semiconductor image-sensing structure includes a semiconductor substrate having a front side and a back side, a photo-sensing element disposed in the semiconductor substrate, a color filter disposed over the back side of the semiconductor substrate, and an electric-optical modulator disposed between the color filter and the photo-sensing element. The electric-optical modulator includes a first electrode, a second electrode over the first electrode, and a micro-lens between the first electrode and the second electrode.
    Type: Application
    Filed: August 8, 2022
    Publication date: February 8, 2024
    Inventors: WEI-LIN CHEN, CHUN-HAO CHOU, KUO-CHENG LEE
  • Publication number: 20240046946
    Abstract: A method includes obtaining, using at least one processing device, noisy speech signals and extracting, using the at least one processing device, acoustic features from the noisy speech signals. The method also includes receiving, using the at least one processing device, a predicted speech mask from a speech mask prediction model based on a first acoustic feature subset and receiving, using the at least one processing device, a predicted noise mask from a noise mask prediction model based on a second acoustic feature subset. The method further includes providing, using the at least one processing device, predicted speech features determined using the predicted speech mask and predicted noise features determined using the predicted noise mask to a filtering mask prediction model. In addition, the method includes generating, using the at least one processing device, a clean speech signal using a predicted filtering mask output by the filtering mask prediction model.
    Type: Application
    Filed: November 22, 2022
    Publication date: February 8, 2024
    Inventors: Chou-Chang Yang, Ching-Hua Lee, Rakshith Sharma Srinivasa, Yashas Malur Saidutta, Yilin Shen, Hongxia Jin