Abstract: A method for forming an image sensor package is provided. An image sensor chip is formed over a package substrate. A protection layer is formed overlying the image sensor chip. The protection layer has a planar top surface and a bottom surface lining and contacting structures under the protection layer. An opening is formed into the protection layer and spaced around a periphery of the image sensor chip. A light shielding material is filled in the opening to form an on-wafer shield structure having a sidewall directly contact the protection layer.

Abstract: A method and an apparatus for equipment anomaly detection are provided. In the method, multiple signals of an equipment during normal operation or appearance images of the equipment when an appearance is not damaged are acquired in advance by using a data acquisition device to train a machine learning model stored in a storage device. A real-time signal of the equipment during a current operation or a current image of the appearance of the equipment is acquired by using the data acquisition device, and input to the trained machine learning model to output a detection result indicating a current operation state of the equipment or a current state of the appearance of the equipment.

Abstract: The present disclosure provides a method to enlarge the process window for forming a source/drain contact. The method may include receiving a workpiece that includes a source/drain feature exposed in a source/drain opening defined between two gate structures, conformally depositing a dielectric layer over sidewalls of the source/drain opening and a top surface of the source/drain feature, anisotropically etching the dielectric layer to expose the source/drain feature, performing an implantation process to the dielectric layer, and after the performing of the implantation process, performing a pre-clean process to the workpiece. The implantation process includes a non-zero tilt angle.

Abstract: An optical device includes a waveguide configured to guide light, a taper integrated with the waveguide on a substrate configured for optical coupling, and an attenuator to degrade unwanted optical signal from the taper. The attenuator extends along one side of the taper, and includes one of a conductive structure, a doped structure and a refractive structure.

Abstract: A method of forming semiconductor device includes forming an active layer in a substrate including forming components of one or more transistors; forming an MD and gate (MDG) layer over the active layer including forming a gate line; forming a metal-to-S/D (MD) contact structure; and forming a waveguide between the gate line and the MD contact structure; forming a first interconnection layer over the MDG layer including forming a first via contact structure over the gate line; forming a second via contact structure over the MD contact structure; and forming a heater between the first and second via contact structures and over the waveguide.

Abstract: An imaging lens assembly includes optical elements and a light path folding mechanism. The light path folding mechanism is disposed on the optical axis to fold an optical axis at least once, and includes a light folding element, a light blocking structure and a nanostructure layer. The light folding element includes a reflecting surface, an incident surface and an exit surface. The reflecting surface is configured to fold an incident light path towards an exit light path. The light blocking structure is disposed on at least one of the incident surface and the exit surface, and includes a main light blocking portion located on a peripheral portion closest to the optical axis on a cross section passing through the optical axis. The nanostructure layer is continuously distributed over at least one of the incident surface and the exit surface and the main light blocking portion.

Abstract: A touch electronic device is provided, which includes: a substrate; a plurality of data fan-out lines disposed on the substrate; a plurality of first data pads disposed on the substrate; a plurality of touch fan-out lines disposed on the substrate; and a plurality of first touch pads disposed on the substrate, wherein one of the plurality of data fan-out lines is electrically connected to one of the plurality of first data pads, one of the plurality of touch fan-out lines is electrically connected to one of the plurality of first touch pads, and any of the plurality of data fan-out lines and any of the touch fan-out lines are not overlapped in a top view direction of the substrate.

Abstract: Systems and methods for estimating input current are provided, particularly when input currents are applied to an electric motor of a motor system. An Electric Control Unit (ECU), according to one implementation, is configured to control the motor system. The ECU is configured to store computer logic having instructions that, when executed, cause one or more processing devices to obtain a duty cycle parameter at an output of the ECU. The duty cycle parameter, for example, relates to control actions enforced on one or more switches of a power electronics circuit of the motor system. Based on the duty cycle parameter, the instructions further cause the one or more processing devices to estimate an input current provided to the electric motor of the motor system. A more accurate input current estimation may thereby be used to better estimate torque.

Abstract: Embodiments of the present disclosure relates to a wet bench processing including an in-situ pre-treatment prior to performing the first set of wet bench operations. The pre-treatment may include a pre-clean operation and/or a pre-heat operation. The pre-treatment may be performed in one of the existing ONB tanks without requiring adding new tanks to an existing wet bench tool. The pre-clean operation removes particles from a batch of wafers to avoid or reduce cross-contamination and defect issues, thus improving the yield rate of the wet bench process. The pre-heat operation provides better control and stabilize the temperature in the CHB tank to stabilize the process, such as to stabilize an etch rate.

Abstract: A substrate handling device includes a substrate reception area defined by an edge. The substrate reception area includes a planar surface, wherein the edge extends upward from the planar surface. The substrate reception area further includes a plurality of contact structures extending upwards from the planar surface, wherein a first contact structure of the plurality of contact structures directly contacts a side surface of the edge, and a second contact structure of the plurality of contact structures is separated from the edge. The substrate reception area and the planar surface include a first material. At least one contact structure of the plurality of contact structures includes a second material different from the first material, and the second material has a hardness aligned to a hardness of a substrate material.

Abstract: Semiconductor devices and methods are provided. A method according to the present disclosure includes receiving a substrate that includes a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer; forming a plurality of fins over the third semiconductor layer; forming a trench between two of the plurality of fins; depositing a dummy material in the trench; forming a gate structure over channel regions of the plurality of the fins; forming source/drain features over source/drain regions of the plurality of the fins; bonding the substrate on a carrier wafer; removing the first and second semiconductor layers to expose the dummy material; removing the dummy material in the trench; depositing a conductive material in the trench; and bonding the substrate to a silicon substrate such that the conductive material is in contact with the silicon substrate. The trench extends through the third semiconductor layer and has a bottom surface on the second semiconductor layer.

Abstract: Some implementations described herein provide techniques and apparatuses for a semiconductor processing tool including an electrostatic chuck having a voltage-regulation system to regulate an electrical potential throughout regions of a semiconductor substrate positioned above the electrostatic chuck. The voltage-regulation system may determine that an electrical potential within a region of the semiconductor substrate does not satisfy a threshold. The voltage-regulation system may, based on determining that the electrical potential throughout the region does not satisfy the threshold, position one or more electrically-conductive pins within the region. While positioned within the region, the one or more electrically-conductive pins may change the electrical potential of the region.

Abstract: The present disclosure provides mechanisms to support collection of measurements data to support radio access network (RAN) intelligence. The present disclosure contains concepts, use cases, requirements, and solutions for collecting the measurement data to support artificial intelligence (AI) and/or machine learning (ML) enabled RAN, wherein the AI/ML functions reside in the RAN, a network function(s), management function(s), and/or in an Operation, Administration, and Maintenance function(s).

Abstract: An optical sensing apparatus including: a substrate including a first material; an absorption region including a second material different from the first material; an amplification region formed in the substrate and configured to collect at least a portion of the photo-carriers from the absorption region and to amplify the portion of the photo-carriers; an interface-dopant region formed in the substrate between the absorption region and the amplification region; a buffer layer formed between the absorption region and the interface-dopant region; one or more field-control regions formed between the absorption region and the interface-dopant region and at least partially surrounding the buffer layer; and a buried-dopant region formed in the substrate and separated from the absorption region, where the buried-dopant region is configured to collect at least a portion of the amplified portion of the photo-carriers from the amplification region.

Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes a first doped region and a second doped region disposed within a substrate. A ferroelectric material is arranged over the substrate and between the first doped region and the second doped region. An isolation structure is arranged within the substrate along a first side of the ferroelectric material. The isolation structure has a first width measured along an uppermost surface of the isolation structure and a second width measured along a horizontal line below the uppermost surface of the isolation structure. The second width is larger than the first width.

Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a first region and a second region, forming a first bottom barrier metal (BBM) layer on the first region and the second region, forming a first work function metal (WFM) layer on the first BBM layer on the first region and the second region, and then forming a diffusion barrier layer on the first WFM layer.

Abstract: The embodiments of the present disclosure provide a biometric detection sensor and a signal processing method thereof. The biometric detection sensor includes an array of detection pixels, the signal processing method includes: acquiring a first detection signal of each detection pixel in the array of detection pixels; for each detection pixel of at least part of detection pixels, processing the first detection signal of the detection pixel based on a reference signal to obtain a detection processing signal of the detection pixel, wherein a resolution of the detection processing signal is lower than that of the first detection signal; and outputting the detection processing signals of the at least part of detection pixels in the array of detection pixels, wherein the detection processing signals are used for biometric identification. The signal processing method can effectively reduce the amount of data for the processor to receive and process during biometric identification.

Abstract: An electromagnetic rotating device is provided. The electromagnetic rotating device includes a base, a pole disc, and a plurality of pole control units. Magnetic elements of the pole disc are arranged on a disc body. A second circular orbit of the pole disc is disposed on a lower surface of the disc body. The second circular orbit is configured to be slidably combined on a first circular orbit of the base. The pole control units are arranged on the base and configured to magnetically drive the magnetic elements to move, so that the pole disc rotates relative to the base.

Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a first region and a second region, forming a first bottom barrier metal (BBM) layer on the first region and the second region, forming a first work function metal (WFM) layer on the first BBM layer on the first region and the second region, and then forming a diffusion barrier layer on the first WFM layer.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes an insulator layer arranged over a substrate. Further, an upper routing structure is arranged over the insulator layer and is made of a semiconductor material. A lower optical routing structure is arranged below the substrate and is embedded in a lower dielectric structure. The integrated chip further includes an anti-reflective layer that is arranged below the substrate and directly contacts the substrate.