Patents by Inventor Christian Jäger

Christian Jäger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210210604
    Abstract: An power semiconductor device having a barrier region is provided. A power unit cell of the power semiconductor device has at least two trenches that may both extend into the barrier region. The at least two trenches may both have a respective trench electrode coupled to a control terminal of the power semiconductor device. For example, the trench electrodes are structured to reduce the total gate charge of the power semiconductor device. The barrier region may be p-doped and vertically confined, i.e., in and against the extension direction, by the drift region. The barrier region can be electrically floating.
    Type: Application
    Filed: March 22, 2021
    Publication date: July 8, 2021
    Inventors: Alexander Philippou, Roman Baburske, Christian Jaeger, Johannes Georg Laven, Helmut Maeckel
  • Publication number: 20210119003
    Abstract: A semiconductor die includes a semiconductor body having first and second active portions. The first active portion includes first source regions. The second active portion includes second source regions. A gate structure extends from a first surface into the semiconductor body and has a longitudinal gate extension along a lateral first direction. A first load pad and the first source regions are electrically connected. A second load pad and the second source regions are electrically connected. A gap laterally separates the first and second load pads. A lateral longitudinal extension of the gap is parallel to the first direction or deviates therefrom by not more than 60 degree. A connection structure electrically connects the first and second load pads. The connection structure is formed in a groove extending from the first surface into the semiconductor body and/or in a wiring layer formed on the first surface.
    Type: Application
    Filed: October 9, 2020
    Publication date: April 22, 2021
    Inventors: Vera Van Treek, Roman Baburske, Christian Jaeger, Christian Robert Mueller, Franz-Josef Niedernostheide, Frank Dieter Pfirsch, Alexander Philippou, Judith Specht
  • Patent number: 10978560
    Abstract: A power semiconductor device having a barrier region is provided. A power unit cell of the power semiconductor device has at least two trenches that may both extend into the barrier region. The at least two trenches may both have a respective trench electrode coupled to a control terminal of the power semiconductor device. For example, the trench electrodes are structured to reduce the total gate charge of the power semiconductor device. The barrier region may be p-doped and vertically confined, i.e., in and against the extension direction, by the drift region. The barrier region can be electrically floating.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: April 13, 2021
    Assignee: Infineon Technologies AG
    Inventors: Alexander Philippou, Roman Baburske, Christian Jaeger, Johannes Georg Laven, Helmut Maeckel
  • Patent number: 10930772
    Abstract: An IGBT having a barrier region is presented. A power unit cell of the IGBT has at least two trenches that may both extend into the barrier region. The barrier region may be p-doped and vertically confined, i.e., in and against the extension direction, by means of the drift region. The barrier region can be electrically floating.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: February 23, 2021
    Assignee: Infineon Technologies AG
    Inventors: Alexander Philippou, Christian Jaeger, Johannes Georg Laven, Antonio Vellei
  • Publication number: 20210050436
    Abstract: A method of processing a power semiconductor device includes: providing a semiconductor body with a drift region of a first conductivity type; forming a plurality of trenches extending into the semiconductor body along a vertical direction and arranged adjacent to each other along a first lateral direction; providing a mask arrangement at the semiconductor body, the mask arrangement having a lateral structure according to which some of the trenches are exposed and at least one of the trenches is covered by the mask arrangement along the first lateral direction; forming, below bottoms of the exposed trenches, a plurality of doping regions of a second conductivity type complementary to the first conductivity type; removing the mask arrangement; and extending the plurality of doping regions in parallel to the first lateral direction such that the plurality of doping regions overlap and form a barrier region of the second conductivity type adjacent to the bottoms of the exposed trenches.
    Type: Application
    Filed: November 3, 2020
    Publication date: February 18, 2021
    Inventors: Antonio Vellei, Markus Beninger-Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven, Alexander Philippou, Francisco Javier Santos Rodriguez
  • Publication number: 20210043759
    Abstract: A power semiconductor device includes an active cell region with a drift region of a first conductivity type, a plurality of IGBT cells arranged within the active cell region, each of the IGBT cells includes at least one trench that extends into the drift, an edge termination region surrounding the active cell region, a transition region arranged between the active cell region and the edge termination region, at least some of the IGBT cells are arranged within or extend into the transition region, a barrier region of a second conductivity type, the barrier region is arranged within the active cell region and in contact with at least some of the trenches of the IGBT cells and does not extend into the transition region, and a first load terminal and a second load terminal, the power semiconductor device is configured to conduct a load current along a vertical direction between.
    Type: Application
    Filed: October 23, 2020
    Publication date: February 11, 2021
    Inventors: Alexander Philippou, Markus Beninger-Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven, Francisco Javier Santos Rodriguez, Antonio Vellei, Caspar Leendertz, Christian Philipp Sandow
  • Patent number: 10910487
    Abstract: A power semiconductor device is disclosed. In one example, the device comprises a semiconductor body coupled to a first load terminal and a second load terminal and comprising a drift region configured to conduct a load current between said terminals. The drift region comprises dopants of a first conductivity type. A source region is arranged in electrical contact with the first load terminal and comprises dopants of the first conductivity type. A channel region comprises dopants of a second conductivity. At least one power unit cell that includes at least one first type trench. The at least one power unit cell further includes a first mesa zone and a second mesa zone of the semiconductor body.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: February 2, 2021
    Assignee: Infineon Technologies AG
    Inventors: Alexander Philippou, Christian Jaeger, Johannes Georg Laven, Max Christian Seifert, Antonio Vellei
  • Patent number: 10876344
    Abstract: It is provided a carrier for a vehicle window lifter comprising a pane holder that comprises two opposed clamping parts between which a gap is provided for receiving a portion of a window pane and which are to be connected to each other via at least one fastening element when the window pane is inserted into the gap. The pane holder forms a bearing portion for one of the clamping parts, on which a swivel axis for the one clamping part is defined, and a swivel element protruding into the gap is provided, by means of which the one clamping part is pivotable in the direction of the other clamping part about the swivel axis by inserting the window pane into the gap.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: December 29, 2020
    Assignee: Brose Fahrzeugteile GmbH & Co. Kommanditgesellschaft, Bamberg
    Inventors: Udo Taubmann, Frank Wagner, Christian Salm, Christian Jaeger
  • Publication number: 20200392174
    Abstract: The present invention relates to novel compounds which are particularly useful as inhibitors of bacterial glutaminyl cyclases (bacQC); pharmaceutical compositions comprising such compounds; compounds and/or pharmaceutical compositions for use in methods for treatment, in particular for use in the treatment of periodontitis and related conditions; as well as to crystals comprising bacterial glutaminyl cyclases, methods for identifying candidate compounds which may associate with the binding pocket of a bacQC and/or are bacQC inhibitors.
    Type: Application
    Filed: February 22, 2019
    Publication date: December 17, 2020
    Inventors: Christian JÄGER, Linda LIEBE, Daniel RAMSBECK, Miriam LINNERT, Stefanie GEISSLER, Anke PIECHOTTA, Diane MEITZNER, Holger CYNIS, Mirko BUCHHOLZ
  • Patent number: 10854739
    Abstract: A power semiconductor device includes: a drift region; a plurality of IGBT cells each having a plurality of trenches extending into the drift region along a vertical direction and laterally confining at least one active mesa which includes an upper section of the drift region; and an electrically floating barrier region of an opposite conductivity type as the drift region and spatially confined, in and against the vertical direction, by the drift region. A total volume of all active mesas is divided into first and second shares, the first share not laterally overlapping with the barrier region and the second share laterally overlapping with the barrier region. The first share carries the load current at least within a range of 0% to 100% of a nominal load current. The second share carries the load current if the load current exceeds at least 0.5% of the nominal load current.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: December 1, 2020
    Assignee: Infineon Technologies AG
    Inventors: Antonio Vellei, Markus Beninger-Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven, Alexander Philippou, Francisco Javier Santos Rodriguez
  • Patent number: 10840362
    Abstract: A power semiconductor device includes an active cell region with a drift region, and IGBT cells at least partially arranged within the active cell region. Each IGBT cell includes at least one trench extending into the drift region along a vertical direction, an edge termination region surrounding the active cell region, and a transition region arranged between the active cell region and the edge termination region. The transition region has a width along a lateral direction from the active cell region towards the edge termination region. At least some of the IGBT cells are arranged within, or, respectively, extend into the transition region. An electrically floating barrier region of each IGBT cell is arranged within the active cell region and in contact with at least some of the trenches of the IGBT cells. The electrically floating barrier region does not extend into the transition region.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: November 17, 2020
    Assignee: Infineon Technologies AG
    Inventors: Alexander Philippou, Markus Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven, Francisco Javier Santos Rodriguez, Antonio Vellei, Caspar Leendertz, Christian Philipp Sandow
  • Patent number: 10825906
    Abstract: A semiconductor device includes transistor cells and enhancement cells. Each transistor cell includes a body zone that forms a first pn junction with a drift structure. The transistor cells may form, in the body zones, inversion channels when a first control signal exceeds a first threshold. The inversion channels form part of a connection between the drift structure and a first load electrode. A delay unit generates a second control signal which trailing edge is delayed with respect to a trailing edge of the first control signal. The enhancement cells form inversion layers in the drift structure when the second control signal falls below a second threshold lower than the first threshold. The inversion layers are effective as minority charge carrier emitters.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: November 3, 2020
    Assignee: Infineon Technologies AG
    Inventors: Johannes Georg Laven, Roman Baburske, Matteo Dainese, Christian Jaeger
  • Publication number: 20200235232
    Abstract: A power semiconductor device includes: a drift region; a plurality of IGBT cells each having a plurality of trenches extending into the drift region along a vertical direction and laterally confining at least one active mesa which includes an upper section of the drift region; and an electrically floating barrier region of an opposite conductivity type as the drift region and spatially confined, in and against the vertical direction, by the drift region. A total volume of all active mesas is divided into first and second shares, the first share not laterally overlapping with the barrier region and the second share laterally overlapping with the barrier region. The first share carries the load current at least within a range of 0% to 100% of a nominal load current. The second share carries the load current if the load current exceeds at least 0.5% of the nominal load current.
    Type: Application
    Filed: April 1, 2020
    Publication date: July 23, 2020
    Inventors: Antonio Vellei, Markus Beninger-Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven, Alexander Philippou, Francisco Javier Santos Rodriguez
  • Publication number: 20200123664
    Abstract: A coated tool has a substrate and a hard material coating deposited on the substrate. The hard material coating has a layer structure in the following order, starting from the substrate: a titanium nitride layer, a titanium boron nitride transition layer, and a titanium diboride layer. The titanium boron nitride transition layer has a boron content that increases from the titanium nitride layer in the direction of the titanium diboride layer. The boron content does not exceed 15 at %.
    Type: Application
    Filed: January 23, 2018
    Publication date: April 23, 2020
    Inventors: CHRISTOPH CZETTEL, JOSEF THURNER, MARKUS LECHLEITNER, CHRISTIAN JAEGER
  • Patent number: 10615272
    Abstract: A method of processing a semiconductor device includes: providing a semiconductor body with a drift region; forming trenches extending into the semiconductor body along a vertical direction and arranged adjacent to each other along a first lateral direction; providing a mask arrangement having a lateral structure so that some of the trenches are exposed and at least one of the trenches is covered by the mask arrangement along the first lateral direction; subjecting the semiconductor body and the mask arrangement to a dopant material providing step to form a plurality of doping regions of a second conductivity type below bottoms of the exposed trenches; removing the mask arrangement; subjecting the semiconductor body to a temperature annealing step so that the doping regions extend in parallel to the first lateral direction and overlap to form a barrier region of the second conductivity type adjacent to the bottoms of the exposed trenches.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: April 7, 2020
    Assignee: Infineon Technologies AG
    Inventors: Antonio Vellei, Markus Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven, Alexander Philippou, Francisco Javier Santos Rodriguez
  • Patent number: 10608104
    Abstract: A transistor device includes a semiconductor mesa region between first and second trenches in a semiconductor body, a body region of a first conductivity type and a source region of a second conductivity type in the semiconductor mesa region, a drift region of the second conductivity type in the semiconductor body, and a gate electrode adjacent the body region in the first trench, and dielectrically insulated from the body region by a gate dielectric. The body region separates the source region from the drift region and extends to the surface of the semiconductor mesa region adjacent the source region. The body region comprises a surface region which adjoins the surface of the semiconductor mesa region and the first trench. The surface region has a higher doping concentration than a section of the body region that separates the source region from the drift region.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: March 31, 2020
    Assignee: Infineon Technologies AG
    Inventors: Alexander Philippou, Johannes Georg Laven, Christian Jaeger, Frank Wolter, Frank Pfirsch, Antonio Vellei
  • Publication number: 20200006539
    Abstract: An IGBT having a barrier region is presented. A power unit cell of the IGBT has at least two trenches that may both extend into the barrier region. The barrier region may be p-doped and vertically confined, i.e., in and against the extension direction, by means of the drift region. The barrier region can be electrically floating.
    Type: Application
    Filed: September 10, 2019
    Publication date: January 2, 2020
    Inventors: Alexander Philippou, Christian Jaeger, Johannes Georg Laven, Antonio Vellei
  • Publication number: 20190319122
    Abstract: A power semiconductor device is disclosed. In one example, the device comprises a semiconductor body coupled to a first load terminal and a second load terminal and comprising a drift region configured to conduct a load current between said terminals. The drift region comprises dopants of a first conductivity type. A source region is arranged in electrical contact with the first load terminal and comprises dopants of the first conductivity type. A channel region comprises dopants of a second conductivity. At least one power unit cell that includes at least one first type trench. The at least one power unit cell further includes a first mesa zone and a second mesa zone of the semiconductor body.
    Type: Application
    Filed: June 28, 2019
    Publication date: October 17, 2019
    Applicant: Infineon Technologies AG
    Inventors: Alexander Philippou, Christian Jaeger, Johannes Georg Laven, Max Christian Seifert, Antonio Vellei
  • Patent number: 10439055
    Abstract: An IGBT having a barrier region is presented. A power unit cell of the IGBT has at least two trenches that may both extend into the barrier region. The barrier region may be p-doped and vertically confined, i.e., in and against the extension direction, by means of the drift region. The barrier region can be electrically floating.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: October 8, 2019
    Assignee: Infineon Technologies AG
    Inventors: Alexander Philippou, Christian Jaeger, Johannes Georg Laven, Antonio Vellei
  • Publication number: 20190305087
    Abstract: An IGBT having a barrier region is provided. A power unit cell of the IGBT has at least two trenches that may both extend into the barrier region. The at least two trenches may both have a respective trench electrode coupled to a control terminal of the IGBT. For example, the trench electrodes are structured to reduce the total gate charge of the IGBT. The barrier region may be p-doped and vertically confined, i.e., in and against the extension direction, by the drift region. The barrier region can be electrically floating.
    Type: Application
    Filed: March 28, 2019
    Publication date: October 3, 2019
    Inventors: Alexander Philippou, Roman Baburske, Christian Jaeger, Johannes Georg Laven, Helmut Maeckel