Abstract: A method includes receiving frequency domain (FD) symbols associated with data symbols transmitted in a channel on a frame including a plurality of subcarriers and a plurality of time-slots. An equalization process is performed to the received FD symbols to generate FD equalized symbols. The FD equalized symbols is transformed to time domain (TD) symbols. A demodulation process is performed to the TD symbols to provide estimates of the data symbols.

Abstract: A method includes communicating data in a channel. Received symbols for the data correspond to points of a received symbol space respectively. First and second dimensions of the received symbol space correspond to a real part and an imaginary part of the received symbols respectively. A first received symbol for the data is obtained. A first region of the received symbol space for the first received symbol is determined. A first regression model associated with the first region and a first bit of the first received symbol is retrieved from a storage. The first regression model includes a plurality of regressors. A first log-likelihood ratio (LLR) for the first bit of the first received symbol is estimated using the first regression model.

Abstract: A system includes an integrated circuit configured to communicating data in a channel. A channel matrix for the channel including a plurality of columns is received. A preprocessing step is performed, using a preprocessing unit, to compute a plurality of preprocessed column values corresponding to respective columns. An update step is performed, using an update unit, to update an estimation vector using a plurality of outer-loop iterations of an outer loop. Each outer-loop iteration updates the estimation vector using the plurality of preprocessed column values. An access link process is performed using the estimation vector.

Abstract: An apparatus, and related method, relates generally to viable bandwidth filtering. In such an apparatus, an analysis filter bank has path filters associated with different bandwidths and is configured for filtering and transforming an input signal having a first bandwidth into a first interleaved output. A mask is coupled to the analysis filter bank and configured for masking at least one narrowband time signal of the first interleaved output. A synthesis filter bank is coupled to the mask. The synthesis filter bank is configured for transforming and filtering the masked first interleaved output to generate a second interleaved output for constructing an output signal having a second bandwidth. The second bandwidth is different than the first bandwidth for the variable bandwidth filtering.

Abstract: A model identification system includes an analog to digital converter (ADC). The ADC includes a conversion circuit configured to receive a first analog signal and generate a first digital signal including samples having a first rate by sampling the first analog signal at the first rate. The ADC further includes a first digital signal processing (DSP) circuit configured to generate a second digital signal including samples having a second rate less than the first rate based on the second digital signal and a first sampling matrix. The first sampling matrix is a block diagonal matrix including a plurality of diagonal blocks, each diagonal block is a row vector including a plurality of elements.

Abstract: An integrated circuit (IC) includes a downlink unit including an input to receive a first plurality of frequency domain (FD) symbols associated with data symbols for a plurality of users, and an iteration unit to perform a plurality of iterations based on adjustment values. Each iteration includes generating a second plurality of FD symbols by performing a precoding process based on the first plurality of FD symbols, generating a third plurality of time domain (TD) symbols by performing a first modulation process based on the second plurality of FD symbols, generating a fourth plurality of TD symbols by performing a dynamic range reduction process based on absolute values of the third plurality of TD symbols, and updating the adjustment values. The downlink unit further includes a decision unit configured to generate transmit TD symbols for transmission through a channel to the plurality of users.

Abstract: A digital predistortion (DPD) system includes an input configured to receive a DPD input signal. The DPD system includes a first predistortion circuit configured to provide a first signal path coupled to the input to generate a first predistortion signal. The first predistortion circuit includes a first infinite impulse response (IIR) filter. A second predistortion circuit is configured to provide a second signal path coupled to the input in parallel with the first signal path to generate a second predistortion signal. The second predistortion circuit includes a second IIR filter. A combiner circuit is configured to combine the first predistortion signal and the second predistortion signal to generate a DPD output signal.

Abstract: Disclosed is apparatus and method to filter a signal. In such an apparatus, an outer polyphase filter is configured for receiving an input signal and for channelizing the input signal into outer filtered samples. An outer Inverse Fourier Transform block is coupled to the outer polyphase filter and configured for transforming the outer filtered samples into a coarse multi-path output. An inner polyphase filter is coupled to a path of the coarse multi-path output for receiving information therefrom and configured for generating inner filtered samples of the information obtained from the path. The inner filtered samples are for moving an edge of a passband associated with the outer filtered samples toward a center of the passband.

Abstract: An apparatus, as well as a method therefor, relates generally to managing reliability of a solid state storage. In such an apparatus, there is a memory controller for providing a code rate. An encoder is for receiving input data and the code rate for providing encoded data. The solid-state storage is for receiving and storing the encoded data. A decoder is for accessing the encoded data stored in the solid-state storage and for receiving the code rate for providing decoded data of the encoded data accessed. The decoded data is provided as soft decisions representing probabilities of the decoded data. The memory controller is for receiving the decoded data for adjusting the code rate responsive to the probabilities of the decoded data.

Abstract: An apparatus relates generally to preconditioning an input signal. In this apparatus, a first digital predistortion module and a second digital predistortion module are for receiving the input signal for respectively providing a first predistorted signal and a second predistorted signal. A combiner is for combining the first predistorted signal and the second predistorted signal for providing an output signal. The first digital predistortion module includes a moving mean block for receiving the input signal for providing a moving mean signal. The first digital predistortion module further includes a digital predistorter for receiving the input signal and the moving mean signal for providing the first predistorted signal.

Abstract: An apparatus, and related method, relates generally to viable bandwidth filtering. In such an apparatus, an analysis filter bank has path filters associated with different bandwidths and is configured for filtering and transforming an input signal having a first bandwidth into a first interleaved output. A mask is coupled to the analysis filter bank and configured for masking at least one narrowband time signal of the first interleaved output. A synthesis filter bank is coupled to the mask. The synthesis filter bank is configured for transforming and filtering the masked first interleaved output to generate a second interleaved output for constructing an output signal having a second bandwidth. The second bandwidth is different than the first bandwidth for the variable bandwidth filtering.

Abstract: Disclosed is apparatus and method to filter a signal. In such an apparatus, an outer polyphase filter is configured for receiving an input signal and for channelizing the input signal into outer filtered samples. An outer Inverse Fourier Transform block is coupled to the outer polyphase filter and configured for transforming the outer filtered samples into a coarse multi-path output. An inner polyphase filter is coupled to a path of the coarse multi-path output for receiving information therefrom and configured for generating inner filtered samples of the information obtained from the path. The inner filtered samples are for moving an edge of a passband associated with the outer filtered samples toward a center of the passband.

Abstract: An apparatus, as well as a method therefor, relates generally to managing reliability of a solid state storage. In such an apparatus, there is a memory controller for providing a code rate. An encoder is for receiving input data and the code rate for providing encoded data. The solid-state storage is for receiving and storing the encoded data. A decoder is for accessing the encoded data stored in the solid-state storage and for receiving the code rate for providing decoded data of the encoded data accessed. The decoded data is provided as soft decisions representing probabilities of the decoded data. The memory controller is for receiving the decoded data for adjusting the code rate responsive to the probabilities of the decoded data.

Abstract: An apparatus relates generally to preconditioning an input signal. In this apparatus, a first digital predistortion module and a second digital predistortion module are for receiving the input signal for respectively providing a first predistorted signal and a second predistorted signal. A combiner is for combining the first predistorted signal and the second predistorted signal for providing an output signal. The first digital predistortion module includes a moving mean block for receiving the input signal for providing a moving mean signal. The first digital predistortion module further includes a digital predistorter for receiving the input signal and the moving mean signal for providing the first predistorted signal.

Abstract: A system includes a memory and an integrated circuit coupled to the memory. The integrated circuit is configured to communicate data in a channel characterized as a space having at least a frequency dimension. Anchor locations within the space correspond to respective regions of the space. The integrated circuit is further configured to determine a first inverse of a first matrix that corresponds to a first channel matrix for a first anchor location of the anchor locations. The first anchor location corresponds to a first region of the regions. The integrated circuit is further configured to perform an access link process for a second location other than the first anchor location but within the first region, the access link process using the first inverse determined for the first anchor location.

Abstract: Apparatus, system and method relates generally to data communication with noise-shaping crest factor reduction using polyphase transformation. In such a method, a composite signal is received by a delay and a waveform generator. The waveform generator is for noise-shaping crest factor reduction using polyphase transformation. The composite signal is delayed by the delay to provide a delayed composite signal. A waveform is generated by the waveform generator from the composite signal. The waveform is output from the waveform generator having clipping noise with respect to bands of corresponding carriers of the composite signal. The waveform is subtracted from the delayed version of the composite signal for peak-to-amplitude power ratio reduction. A reduced peak version of the delayed version of the composite signal delayed is output from the signal combiner.

Abstract: Apparatus, method therefor, generally related to signal preconditioning. In such an apparatus, a signal classifier block and a delay block are commonly coupled for receiving an input signal. The delay block is for providing a delayed version of the input signal. The signal classifier block is for classifying the input signal and generating a configuration signal having configuration information for digital predistortion (“DPD”) engine parameterization in response to the input signal classification. A DPD engine is for receiving the delayed version of the input signal and the configuration signal and for providing a predistorted output signal.

Abstract: Apparatus, system and method relates generally to data communication with noise-shaping crest factor reduction using polyphase transformation. In such a method, a composite signal is received by a delay and a waveform generator. The waveform generator is for noise-shaping crest factor reduction using polyphase transformation. The composite signal is delayed by the delay to provide a delayed composite signal. A waveform is generated by the waveform generator from the composite signal. The waveform is output from the waveform generator having clipping noise with respect to bands of corresponding carriers of the composite signal. The waveform is subtracted from the delayed version of the composite signal for peak-to-amplitude power ratio reduction. A reduced peak version of the delayed version of the composite signal delayed is output from the signal combiner.

Abstract: A LDPC decoder utilizes a new schedule that breaks a dependency between data of different layers of a parity check matrix, so that the forward scan in the next layer can begin to perform after a predetermined time has elapsed (i.e. a delay) since the backwards scan of the previous layer has begun, and before the backwards scan of the previous layer is completed. Accordingly, the computation at the next layer can begin as soon as possible.

Abstract: A system for digital pre-distortion includes: a transmitter configured to transmit at least one transmission data signal; a receiver configured to receive at least one receive data signal and to receive the at least one transmission data signal; and at least one amplifier, associated with the transmitter, configured to receive at least one pre-distortion control signal sent from the receiver; wherein the at least one pre-distortion control signal is related to the at least one transmission data signal.