Patents by Inventor Christopher H. Dick

Christopher H. Dick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9025691
    Abstract: A method relates generally to channel equalization. In this method, a filter matrix is determined for transmission antennas by a channel equalizer of a first receiver processing chain. A first QR decomposition is performed on a first extended matrix for a first iteration. LLRs are fed from a second receiver processing chain to the first receiver processing chain for a second iteration. Symbol information is obtained from the LLRs. Interference is canceled using the symbol information to provide residual information. The channel equalizer is updated with the symbol information. The residual information is provided to the channel equalizer. User matrices corresponding to the transmission antennas are determined by the channel equalizer. This determination includes performing a second QR decomposition on a second extended matrix to obtain updated values for the user matrices, and performing updates using the symbol information and the updated values to provide the user matrices.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: May 5, 2015
    Assignee: Xilinx, Inc.
    Inventors: Michael Wu, Christopher H. Dick
  • Patent number: 9014241
    Abstract: A method of performing digital pre-distortion in a communication network is described. The method comprises implementing a transceiver in the communication network, the transceiver enabling the transfer of communication signals in the communication network by way of a wireless communication channel; sampling signals, at the transceiver, associated with a transmit signal which are necessary to perform digital pre-distortion; providing the sampled signals to a remote computer; and generating, at the remote computer, parameters to be applied to a digital pre-distortion circuit of the transceiver. A communication network configured to enable digital pre-distortion is also described.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: April 21, 2015
    Assignee: Xilinx, Inc.
    Inventor: Christopher H. Dick
  • Patent number: 9008204
    Abstract: An apparatus relates generally to OFDM. In this apparatus, modulators are coupled to receive data inputs. Each of the modulators includes IDFT blocks coupled to output a first and a second N-point transform, and a 2N-point transform to provide discrete time domain signals for the data inputs. A switch and frequency translation block is coupled to receive the discrete time domain signals. RF ports are coupled to the switch and frequency translation block. The switch and frequency translation block is configured to allocate a combination of outputs from two or more of the IDFT blocks to a same RF port of the RF ports and to translate frequency of at least one of the outputs from the two or more of the IDFT blocks to provide the OFDM of the outputs from the two or more of the IDFT blocks onto the same RF port of the RF ports.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: April 14, 2015
    Assignee: Xilinx, Inc.
    Inventor: Christopher H. Dick
  • Patent number: 9008156
    Abstract: An apparatus relates generally to a repeater. In such an apparatus, the repeater has a signal analysis and classification block. The signal analysis and classification block includes a signal analysis block and a classification block. The signal analysis block is coupled to receive a digital signal which is a digital version of an input signal received by the repeater. The signal analysis block is coupled to provide signal information regarding the digital signal to the classification block. The classification block is configured to provide classification information to classify the digital signal using the signal information provided as being a waveform type of a group of waveform types.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: April 14, 2015
    Assignee: Xilinx, Inc.
    Inventor: Christopher H. Dick
  • Patent number: 9001924
    Abstract: An apparatus relating generally to matrix inversion is disclosed. This apparatus includes a matrix inversion module coupled to receive matrix information and to provide an approximation of an inversion of the matrix information. The matrix inversion module comprises a decomposition block coupled to receive the matrix information and to decompose the matrix information into diagonal matrix information and off diagonal matrix information, and an expansion block. The expansion block is coupled to receive the diagonal matrix information and the off diagonal matrix information, and to invert a matrix sum of the diagonal matrix information and the off diagonal matrix information by generation of a portion of a series expansion.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: April 7, 2015
    Assignee: Xilinx, Inc.
    Inventors: Michael Wu, Bei Yin, Aida Vosoughi, Christopher H. Dick, Christoph E. Studer, Joseph R. Cavallaro
  • Patent number: 8938483
    Abstract: A filter can include a first channel and a second channel. The first channel can be configured to process a first term and a second term of an input vector using a first coefficient and a second coefficient of the filter. The first channel can be configured to generate a first term of an output vector. The second channel can be configured to process the first term and the second term of the input vector using the first coefficient and the second coefficient of the filter. The second channel can be configured to generate a second term of the output vector. The first and second channels can be configured to operate in parallel.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: January 20, 2015
    Assignee: Xilinx, Inc.
    Inventors: Benjamin Egg, Frederic J. Harris, Christopher H. Dick
  • Patent number: 8903027
    Abstract: An embodiment of a method for a multiple-antenna receiver is disclosed. For this embodiment of the method, a detector obtains a channel matrix and a symbol vector. Contents of the channel matrix and the symbol vector are accessed in order and out of order, where the out of order access of the contents of the channel matrix and the symbol vector respectively provide a reordered channel matrix and a reordered symbol vector. The channel matrix is decomposed with the symbol vector to obtain first decomposition inputs. The reordered channel matrix is decomposed with the reordered symbol vector to obtain second decomposition inputs. The first decomposition inputs are sphere detected to provide first candidates. The second decomposition inputs are sphere detected to provide second candidates. Reliability information is generated from the first candidates and the second candidates.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: December 2, 2014
    Assignee: Xilinx, Inc.
    Inventors: Michael Wu, Christopher H. Dick
  • Patent number: 8848842
    Abstract: An embodiment of a decoder is disclosed. For this embodiment of the decoder, a first estimation unit and a second estimation unit are for iterative decoding. A scheduler is to receive a mode select signal to provide either an indication of first scheduling information or second scheduling information to the first estimation unit and the second estimation unit responsive to the mode select signal.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: September 30, 2014
    Assignee: Xilinx, Inc.
    Inventor: Christopher H. Dick
  • Patent number: 8837633
    Abstract: A communication system includes digital signals that carry data and correspond to channels of a composite signal to be transmitted across a communication channel. Active channels are detected and used to configure digital processing. In one embodiment, active channels are detected, where a particular active channel corresponds to the presence of a particular one of the digital signals. Active channel detection may be used to configure pre-distortion of a composite signal to be transmitted to compensate for distortion in a digital-to-analog converter. Likewise, active channel detection may be used to optimize the configuration of an up-converter. In one embodiment, a programmable device is configured based on detected active channels into a plurality of different configurations.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: September 16, 2014
    Assignee: Xilinx, Inc.
    Inventor: Christopher H. Dick
  • Patent number: 8831117
    Abstract: Method and apparatus for signal processing to minimize the peak to average power ratio of an Orthogonal Frequency Division Multiplexing (“OFDM”) or Orthogonal Frequency Division Multiple Access (“OFDMA”) signal with bounded error vector magnitude for an integrated circuit are described. An Active Constellation Extension (“ACE”) iteration, using a constellation points adjustment module, is performed. Symbols outside of a bounded region after the ACE iteration are identified. The bounded region is determined responsive to an error vector magnitude target. The symbols identified are translated to the bounded region.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: September 9, 2014
    Assignee: Xilinx, Inc.
    Inventors: Raghavendar M. Rao, Christopher H. Dick
  • Patent number: 8774324
    Abstract: A communication system includes an iterative multi-stage decoder that may be dynamically configured to achieve a particular bit-error-rate. In one embodiment, a circuit comprises a first decoder block and a second decoder block to decode data received over a communication channel. A control circuit may change a number of iterations performed by the decoder blocks to decode received data based on a specified bit error rate and a detected signal-to-noise ratio of said received data. The number of computational units used in the decoders may be changed dynamically to achieve desired system performance. In one embodiment, resources are allocated based on a system initiating the connection. Programmable circuits are used in some embodiments to reconfigure the multi-stage decoder.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: July 8, 2014
    Assignee: Xilinx, Inc.
    Inventor: Christopher H. Dick
  • Patent number: 8767887
    Abstract: A method of processing a signal within a receiver can include generating, using the receiver, a candidate list including at least one entry for a signal. Each entry can include a candidate symbol vector and an L1-Norm error metric. The method can include, for each entry, generating an L1-Norm transformation from the L1-Norm error metric, wherein the L1-Norm transformation depends upon a function of a number of receiving antennas of the receiver. The signal can be decoded using the candidate list including the L1-Norm transformations.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: July 1, 2014
    Assignee: Xilinx, Inc.
    Inventors: Michael Wu, Christopher H. Dick
  • Patent number: 8675784
    Abstract: A method for detecting communications from multiple transmission antennas includes receiving a signal with at least one receive antenna, wherein the signal comprises data transmitted from at least one of the transmission antennas, calculating an equalized received signal and an equalized channel matrix using the signal and a channel matrix, determining whether a correlation factor threshold value is exceeded, and based on the act of determining, generating a listed based log likelihood ratio (LLR) soft output or a MMSE LLR soft output based on the equalized received signal and the equalized channel matrix.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: March 18, 2014
    Assignee: Xilinx, Inc.
    Inventors: Michael Wu, Christopher H. Dick
  • Patent number: 8666336
    Abstract: An embodiment of an integrated circuit is disclosed. This embodiment includes a processor programmed with a behavior model associated with power amplification. A calibration signal generator is coupled to the processor and configured to generate a digital calibration signal. The processor is coupled to receive a digital feedback signal. The processor is configured to determine at least one parameter associated with the power amplification in response to the digital feedback signal using the behavior model. The at least one parameter is selected from a group consisting of a nonlinearity order and a memory length. A digital predistorter is coupled for parameterization responsive to the at least one parameter.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: March 4, 2014
    Assignee: Xilinx, Inc.
    Inventor: Christopher H. Dick
  • Publication number: 20140050286
    Abstract: An embodiment of a decoder is disclosed. For this embodiment of the decoder, a first estimation unit and a second estimation unit are for iterative decoding. A scheduler is to receive a mode select signal to provide either an indication of first scheduling information or second scheduling information to the first estimation unit and the second estimation unit responsive to the mode select signal.
    Type: Application
    Filed: August 16, 2012
    Publication date: February 20, 2014
    Applicant: XILINX, INC.
    Inventor: Christopher H. Dick
  • Patent number: 8649307
    Abstract: A system for mobile communication includes a mobile communication device that has a first plurality of antennas and a transmitter. The transmitter, in response to a requested bandwidth for a first packet not being greater than a bandwidth of a first transmit mode, is configured to encode and transmit the first packet from the first plurality of antennas. The first packet has a single-carrier frequency-division-multiple-access (SC-FDMA) modulation of the first transmit mode. In response to a requested bandwidth for a second packet being greater than the bandwidth of the first transmit mode, the transmitter is configured to encode and transmit the second packet from the first antennas. The second packet has a multiple-in-multiple-out orthogonal-frequency-division-multiplexing (MIMO-OFDM) modulation of a second transmit mode. A base station includes a second plurality of antennas and is configured to receive and decode the first packet and the second packet.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: February 11, 2014
    Assignee: Xilinx, Inc.
    Inventor: Christopher H. Dick
  • Patent number: 8572150
    Abstract: Parameterization of a CORDIC algorithm for providing a CORDIC engine is described. An aspect of the invention is a method in a digital processing system for generation of the CORDIC engine. Numbers of fractional output bits for a user-defined numerical result format are obtained. The numbers of fractional output bits are for each of a plurality of output variables associated with the CORDIC algorithm. Micro-rotations associated with each of the plurality of output variables are determined responsive to the numbers of fractional output bits. Quantizations associated with each of the plurality of output variables are determined responsive at least in part to the numbers of fractional output bits.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: October 29, 2013
    Assignee: Xilinx, Inc.
    Inventor: Christopher H. Dick
  • Patent number: 8553786
    Abstract: A method is provided for communicating a data value and pilot tone within the same communication sub-carrier of a communication channel. A first reference phase corresponding to a first data value is selected. A pilot tone having the first reference phase is generated. The generated pilot tone is transmitted. The transmitted pilot tone is received. A phase of the received pilot tone is determined. A second data value is determined from the phase of the received pilot tone. The second data value is stored in an electronic storage medium.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: October 8, 2013
    Assignee: Xilinx, Inc.
    Inventor: Christopher H. Dick
  • Patent number: 8522119
    Abstract: An embodiment of a method for decoding is disclosed. For this embodiment of the method, a decoder is limited to a set number of iterations for a decoding sequence. The set number of iterations is selected to be less than an optimal number of iterations for an optimal bit error rate (“BER”) resulting in a BER penalty. Inner loop decoding operations are performed within the decoder for the set number of iterations. Reliability information is output from the decoder to a data slicer. A symbol stream is output from the data slicer responsive to the reliability information.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: August 27, 2013
    Assignee: XILINX, Inc.
    Inventors: Christopher H. Dick, Raghavendar M. Rao
  • Patent number: 8510364
    Abstract: Methods for matrix processing and devices therefor are described. A systolic array in an integrated circuit is coupled to receive a first matrix as input; and is capable of operating in two modes, namely a triangularization mode and a back-substitution mode. The systolic array, when in a triangularization mode, is coupled to triangularize the first matrix to provide a second matrix. When in a back-substitution mode, the systolic array is coupled to invert the second matrix.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: August 13, 2013
    Assignee: Xilinx, Inc.
    Inventors: Raghavendar M. Rao, Christopher H. Dick