Abstract: The invention relates to a hair styling device, and in particular to a hair straightener. The hair styling device (10; 210) has a first arm (12; 212) and a second arm (14; 214), the first and second arms being moveable relative to one another between a closed or operative condition and an open or inoperative condition. The first member (12; 212) has a first heating panel (16; 116; 216) and the second member (14; 214) has a second heating panel (18; 118; 218). The heating panels (16, 18; 116, 118; 216, 218) are corrugated to increase the length of the path the hair must take between the heating panels. The first and second heating panels are spaced apart in the operative condition so as not to press or clamp the hair therebetween.

Abstract: A method of forming a semiconductor device includes forming source/drain contact openings extending through at least one dielectric layer to expose source/drain contact regions of source/drain structures. The method further includes forming conductive plugs in the source/drain contact openings. The method further includes depositing a light blocking layer over the conductive plugs and the at least one dielectric layer. The method further includes etching the light blocking layer to expose the conductive plugs. The method further includes directing a laser irradiation to the conductive plugs and the light blocking layer. The laser irradiation is configured to activate dopants in the source/drain contact regions.

Abstract: In an embodiment, a device includes: a semiconductor substrate having a channel region; a gate stack over the channel region; and an epitaxial source/drain region adjacent the gate stack, the epitaxial source/drain region including: a main portion in the semiconductor substrate, the main portion including a semiconductor material doped with gallium, a first concentration of gallium in the main portion being less than the solid solubility of gallium in the semiconductor material; and a finishing portion over the main portion, the finishing portion doped with gallium, a second concentration of gallium in the finishing portion being greater than the solid solubility of gallium in the semiconductor material.

Abstract: A semiconductor structure includes a substrate, a first epitaxial layer, a second epitaxial layer, and a transistor. The substrate includes a first pyramid protrusion, a second pyramid protrusion, a third pyramid protrusion, and a fourth pyramid protrusion. The first and second pyramid protrusions are arranged along a first direction, the second and fourth pyramid protrusions are arranged along the first direction, and the first and third pyramid protrusions are arranged along a second direction crossing the first direction. The first epitaxial layer is over the substrate and in contact with the first, second, third, and fourth pyramid protrusions. The second epitaxial layer is over the first epitaxial layer. The transistor is over the second epitaxial layer.

Abstract: A semiconductor device is provided. The semiconductor device includes a template layer disposed over a substrate and having a trench therein, a buffer structure disposed over a bottom surface of the trench and comprising a metal oxide, a single crystal semiconductor structure disposed within the trench and over the buffer structure and a gate structure disposed over a channel region of the single crystal semiconductor structure.

Abstract: A method of forming a semiconductor device includes forming source/drain contact openings extending through at least one dielectric layer to expose source/drain contact regions of source/drain structures. The method further includes depositing a light blocking layer along sidewalls and bottom surfaces of the source/drain contact openings and a topmost surface of the at least one dielectric layer. The method further includes performing a laser annealing process to activate dopants in the source/drain contact region. The method further includes forming source/drain contact structures within source/drain contact openings.

Abstract: In a method of manufacturing a semiconductor device, an opening is formed in an interlayer dielectric layer such that a source/drain region is exposed in the opening. A first semiconductor layer is formed to fully cover the exposed source/drain region within the opening. A heating process is performed to make an upper surface of the first semiconductor layer substantially flat. A conductive contact layer is formed over the first semiconductor layer.

Abstract: In a method of manufacturing a semiconductor device, an opening is formed in an interlayer dielectric layer such that a source/drain region is exposed in the opening. A first semiconductor layer is formed to fully cover the exposed source/drain region within the opening. A heating process is performed to make an upper surface of the first semiconductor layer substantially flat. A conductive contact layer is formed over the first semiconductor layer.

Abstract: Metal nitride diffusion barriers may be included between cobalt-based structures and ruthenium-based structures to reduce, minimize, and/or prevent intermixing of cobalt into ruthenium. A metal nitride diffusion barrier layer may include a cobalt nitride (CoNx), a ruthenium nitride (RuNx), or another metal nitride that has a bond dissociation energy greater than the bond dissociation energy of cobalt to cobalt (Co—Co), and may therefore function as a strong barrier to cobalt migration and diffusion into ruthenium. Moreover, cobalt nitride and ruthenium nitride have lower resistivity relative to other materials such as titanium nitride (TiN), tungsten nitride (WN), and tantalum nitride (TaN). In this way, the metal nitride diffusion barriers are capable of minimizing cobalt diffusion and intermixing into ruthenium-based interconnect structures while maintaining a low contact resistance for the interconnect structures.

Abstract: The present disclosure is directed to a slider bar to protect a battery pack of a vehicle. The battery pack is housed on an underbody in between the vehicle's front and rear axles. The battery pack protrudes towards the ground. The battery pack can optionally be covered by a shield that has a slot through which the slider bar extends outwards towards the ground. The slider bar is coupled to the underbody near the battery pack. The slider bar is positioned lower than the battery pack such that in an event of the vehicle bottoming out, the impact will be absorbed by the slider bar instead of the battery pack. Thereby, the slider bar protects the battery pack from scraping/scratching the ground.

Abstract: In a method of manufacturing a semiconductor device, a dummy gate structure is formed over a channel region of a semiconductor layer, a source/drain epitaxial layer is formed on opposing sides of the dummy gate structure, a planarization operation is performed on the source/drain epitaxial layer, the planarized source/drain epitaxial layer is patterned, the dummy gate structure is removed to form a gate space, and a metal gate structure is formed in the gate space.

Abstract: A semiconductor device is provided. The semiconductor device includes a template layer disposed over a substrate and having a trench therein, a buffer structure disposed over a bottom surface of the trench and comprising a metal oxide, a single crystal semiconductor structure disposed within the trench and over the buffer structure and a gate structure disposed over a channel region of the single crystal semiconductor structure.

Abstract: In a method of manufacturing a semiconductor device, a dummy gate structure is formed over a channel region of a semiconductor layer, a source/drain epitaxial layer is formed on opposing sides of the dummy gate structure, a planarization operation is performed on the source/drain epitaxial layer, the planarized source/drain epitaxial layer is patterned, the dummy gate structure is removed to form a gate space, and a metal gate structure is formed in the gate space.

Abstract: Provided herein are semiconductor structures that include germanium and have a germanium nitride layer on the surface, as well as methods of forming the same. The described structures include nanowires and fins. Methods of the disclosure include metal-organic chemical vapor deposition with a germanium precursor. The described methods also include using a N2H4 vapor.

Abstract: A crystalline channel layer of a semiconductor material is formed in a backend process over a crystalline dielectric seed layer. A crystalline magnesium oxide MgO is formed over an amorphous inter-layer dielectric layer. The crystalline MgO provides physical link to the formation of a crystalline semiconductor layer thereover.

Abstract: Provided is a method for securing a digital document. An initial version of the digital document contains a set of data. The method comprises: generating a link value by applying a preset function to a subset of the set of data, allocating the link value to a target data belonging to the set of data and storing an entry comprising the target data in a secure storage unit, the target data being reachable in the secure storage unit through the link value, the secure storage unit being configured to use access rules for authorizing or denying a request initiated by a user and aiming at accessing the target data comprised in said entry, and generating an updated version of the digital document by removing the target data from the initial version of the digital document.

Abstract: In a method of manufacturing a semiconductor device, a gate structure is formed over a fin structure. A source/drain region of the fin structure is recessed. A first semiconductor layer is formed over the recessed source/drain region. A second semiconductor layer is formed over the first semiconductor layer. The fin structure is made of SixGe1-x, where 0?x?0.3, the first semiconductor layer is made of SiyGe1-y, where 0.45?y?1.0, and the second semiconductor layer is made of SizGe1-z, where 0?z?0.3.

Abstract: Provided herein are tapered nanowires that comprise germanium and gallium, as well as methods of forming the same. The described nanowires may also include one or more sections of a second semiconductor material. Methods of the disclosure may include vapor-liquid-solid epitaxy with a gallium catalyst. The described methods may also include depositing a gallium seed on a surface of a substrate by charging an area of the substrate using an electron beam, and directing a gallium ion beam across the surface of the substrate.

Abstract: A crystalline channel layer of a semiconductor material is formed in a backend process over a crystalline dielectric seed layer. A crystalline magnesium oxide MgO is formed over an amorphous inter-layer dielectric layer. The crystalline MgO provides physical link to the formation of a crystalline semiconductor layer thereover.

Abstract: In a method of manufacturing a semiconductor device, a gate structure is formed over a fin structure. A source/drain region of the fin structure is recessed. A first semiconductor layer is formed over the recessed source/drain region. A second semiconductor layer is formed over the first semiconductor layer. The fin structure is made of SixGe1-x, where 0?x?0.3, the first semiconductor layer is made of SiyGe1-y, where 0.45?y?1.0, and the second semiconductor layer is made of SizGe1-z, where 0?z?0.3.