Patents by Inventor Christopher Holland

Christopher Holland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210057547
    Abstract: A semiconductor structure includes a substrate, a first epitaxial layer, a second epitaxial layer, and a transistor. The substrate includes a first pyramid protrusion, a second pyramid protrusion, a third pyramid protrusion, and a fourth pyramid protrusion. The first and second pyramid protrusions are arranged along a first direction, the second and fourth pyramid protrusions are arranged along the first direction, and the first and third pyramid protrusions are arranged along a second direction crossing the first direction. The first epitaxial layer is over the substrate and in contact with the first, second, third, and fourth pyramid protrusions. The second epitaxial layer is over the first epitaxial layer. The transistor is over the second epitaxial layer.
    Type: Application
    Filed: October 26, 2020
    Publication date: February 25, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Carlos H. DIAZ, Mark VAN DAL, Martin Christopher HOLLAND
  • Publication number: 20210050416
    Abstract: Provided herein are tapered nanowires that comprise germanium and gallium, as well as methods of forming the same. The described nanowires may also include one or more sections of a second semiconductor material. Methods of the disclosure may include vapor-liquid-solid epitaxy with a gallium catalyst. The described methods may also include depositing a gallium seed on a surface of a substrate by charging an area of the substrate using an electron beam, and directing a gallium ion beam across the surface of the substrate.
    Type: Application
    Filed: October 26, 2020
    Publication date: February 18, 2021
    Inventors: Martin Christopher HOLLAND, Blandine DURIEZ
  • Patent number: 10872772
    Abstract: A semiconductor arrangement includes a semiconductor layer having a source/drain region and a first epitaxial layer over the semiconductor layer. The semiconductor arrangement includes a second epitaxial layer over the first epitaxial layer, wherein the first epitaxial layer and the second epitaxial layer define a contact structure for the source/drain region.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: December 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Matthias Passlack, Martin Christopher Holland
  • Patent number: 10861933
    Abstract: According to one example, a method includes epitaxially growing first portions of a plurality of elongated semiconductor structures on a semiconductor substrate, the elongated semiconductor structures running perpendicular to the substrate. The method further includes forming a gate layer on the substrate, the gate layer contacting the elongated semiconductor structures. The method further includes performing a planarization process on the gate layer and the elongated semiconductor structures, and epitaxially growing second portions of the plurality of elongated semiconductor structures, the second portions comprising a different material than the first portions.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: December 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY., LTD.
    Inventors: Richard Kenneth Oxland, Blandine Duriez, Mark van Dal, Martin Christopher Holland
  • Patent number: 10854714
    Abstract: Provided herein are tapered nanowires that comprise germanium and gallium, as well as methods of forming the same. The described nanowires may also include one or more sections of a second semiconductor material. Methods of the disclosure may include vapor-liquid-solid epitaxy with a gallium catalyst. The described methods may also include depositing a gallium seed on a surface of a substrate by charging an area of the substrate using an electron beam, and directing a gallium ion beam across the surface of the substrate.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: December 1, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Martin Christopher Holland, Blandine Duriez
  • Patent number: 10847622
    Abstract: A field effect transistor includes a channel made of germanium and a source/drain portion. The source/drain portion includes a germanium layer, an interfacial epitaxial layer over the germanium layer, a semiconductor layer over the interfacial epitaxial layer, and a conducting layer over the semiconductor layer. The interfacial epitaxial layer contains germanium and an element from the semiconductor layer and has a thickness in a range from about 1 nm to about 3 nm.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: November 24, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Martin Christopher Holland, Blandine Duriez
  • Patent number: 10818778
    Abstract: A method of manufacturing a semiconductor structure comprises etching a semiconductor substrate having a top surface extending along a (001) crystal plane, such that a majority of a top surface of the etched semiconductor substrate extends along {111} crystal planes; forming a first epitaxial layer in contact with the top surface of the etched semiconductor substrate; and forming a second epitaxial layer on the first epitaxial layer.
    Type: Grant
    Filed: June 16, 2018
    Date of Patent: October 27, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Carlos H. Diaz, Mark Van Dal, Martin Christopher Holland
  • Publication number: 20200335701
    Abstract: In a method, a charged metal dot is deposited on a first position of a surface of a semiconductor substrate. Then, a charged region is formed on a second position of the surface of the semiconductor substrate, thereby establishing of which an electric field direction from the first position toward the second position. The first position is spaced apart from the second position by a distance. Thereafter, a precursor gas flows along the electric field direction on the semiconductor substrate, thereby forming a carbon nanotube (CNT) on the semiconductor substrate.
    Type: Application
    Filed: April 18, 2019
    Publication date: October 22, 2020
    Inventors: Martin Christopher HOLLAND, Timothy VASEN, Blandine DURIEZ
  • Patent number: 10797148
    Abstract: In a method of forming a Group III-V semiconductor layer on a Si substrate, a first source gas containing a Group V element is supplied to a surface of the Si substrate while heating the substrate at a first temperature, thereby terminating the Si surface with the Group V element. Then, a second source gas containing a Group III element is supplied to the surface while heating the substrate at a second temperature, thereby forming a nucleation layer directly on the surface of the Si substrate. After the nucleation layer is formed, the supply of the second source gas is stopped and the substrate is annealed at a third temperature while the first source gas being supplied, thereby forming a seed layer. After the annealing, the second source gas is supplied while heating the substrate at a fourth temperature, thereby forming a body III-V layer semiconductor on the seed layer.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: October 6, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Mark Van Dal, Matthias Passlack, Martin Christopher Holland
  • Publication number: 20200262919
    Abstract: Methods and compositions for treating diffuse large B cell lymphoma (DLBCL) using a combination of blinatumomab and/or a blinatumomab variant and pembrolizumab, a pembrolizumab variant and/or an antigen-binding fragment thereof, are provided.
    Type: Application
    Filed: October 12, 2018
    Publication date: August 20, 2020
    Inventors: Zachary ZIMMERMAN, Xiaohong Alicia ZHANG, Peter Christopher HOLLAND, Janet FRANKLIN, Gregory FRIBERG
  • Patent number: 10709368
    Abstract: A system includes a mobile computing device, a sleeve, a contact surface, a sensor module, and a telemetry module. The mobile computing device has a first processor within a housing. The sleeve has an internal surface configured to fit the housing. The contact surface is disposed on an external surface of the sleeve. The sensor module is coupled to the contact surface and is configured to generate an electrical signal corresponding to a measured physiological parameter associated with tissue at the contact surface. The telemetry module is coupled to the sensor module and is configured to communicate data corresponding to the electrical signal to the mobile computing device.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: July 14, 2020
    Assignee: Nonin Medical, Inc.
    Inventors: Timothy L. Johnson, Bryant Austin Jones, Christopher Holland
  • Patent number: 10680062
    Abstract: A gate-all-around field effect transistor (GAA FET) includes an InAs nano-wire as a channel layer, a gate dielectric layer wrapping the InAs nano-wire, and a gate electrode metal layer formed on the gate dielectric layer. The InAs nano-wire has first to fourth major surfaces three convex-rounded corner surfaces and one concave-rounded corner surface.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: June 9, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Mark Van Dal, Gerben Doornbos, Matthias Passlack, Martin Christopher Holland
  • Publication number: 20200135478
    Abstract: A semiconductor arrangement includes a semiconductor layer having a source/drain region and a first epitaxial layer over the semiconductor layer. The semiconductor arrangement includes a second epitaxial layer over the first epitaxial layer, wherein the first epitaxial layer and the second epitaxial layer define a contact structure for the source/drain region.
    Type: Application
    Filed: December 3, 2018
    Publication date: April 30, 2020
    Inventors: Matthias Passlack, Martin Christopher Holland
  • Publication number: 20200135930
    Abstract: A crystalline channel layer of a semiconductor material is formed in a backend process over a crystalline dielectric seed layer. A crystalline magnesium oxide MgO is formed over an amorphous inter-layer dielectric layer. The crystalline MgO provides physical link to the formation of a crystalline semiconductor layer thereover.
    Type: Application
    Filed: September 27, 2019
    Publication date: April 30, 2020
    Inventors: Matthias Passlack, Blandine Duriez, Georgios Vellianitis, Gerben Doornbos, Marcus Johannes Henricus Van Dal, Martin Christopher Holland, Mauricio Manfrini
  • Publication number: 20200135897
    Abstract: In a method of manufacturing a semiconductor device, a dummy gate structure is formed over a channel region of a semiconductor layer, a source/drain epitaxial layer is formed on opposing sides of the dummy gate structure, a planarization operation is performed on the source/drain epitaxial layer, the planarized source/drain epitaxial layer is patterned, the dummy gate structure is removed to form a gate space, and a metal gate structure is formed in the gate space.
    Type: Application
    Filed: February 11, 2019
    Publication date: April 30, 2020
    Inventors: Blandine DURIEZ, Georgios VELLIANITIS, Gerben DOORNBOS, Marcus Johannes Henricus VAN DAL, Martin Christopher HOLLAND, Timothy VASEN
  • Publication number: 20200135855
    Abstract: Provided herein are semiconductor structures that include germanium and have a germanium nitride layer on the surface, as well as methods of forming the same. The described structures include nanowires and fins. Methods of the disclosure include metal-organic chemical vapor deposition with a germanium precursor. The described methods also include using a N2H4 vapor.
    Type: Application
    Filed: December 20, 2019
    Publication date: April 30, 2020
    Inventors: Martin Christopher Holland, Georgios Vellianitis
  • Publication number: 20200125749
    Abstract: A method for securely accessing a document containing a set of data comprises (a) detecting the existence of target data belonging to an enhanced version of the document and missing from the current version of the document, (b) generating a link value allocated to the target data by applying a preset function to a subset of said set of data, (c) retrieving metadata from a secure storage unit by using the link value and, using a message based on said metadata, proposing to the user to get the target data, (d) getting both agreement of the user and credentials of the user, (e) generating a request by using the link value and said credentials for retrieving the target data from the secure storage unit, (f) providing the user with the target data only if the secure storage unit successfully checked the compliance of the request with preset access rules.
    Type: Application
    Filed: October 22, 2018
    Publication date: April 23, 2020
    Applicant: SAFENET INC.
    Inventors: Christopher HOLLAND, Russell EGAN
  • Publication number: 20200117816
    Abstract: The invention is a method for securing a digital document. An initial version of the digital document contains a set of data. The method comprises: generating a link value by applying a preset function to a subset of the set of data, allocating the link value to a target data belonging to the set of data and storing an entry comprising the target data in a secure storage unit, the target data being reachable in the secure storage unit through the link value, the secure storage unit being configured to use access rules for authorizing or denying a request initiated by a user and aiming at accessing the target data comprised in said entry, generating an updated version of the digital document by removing the target data from the initial version of the digital document.
    Type: Application
    Filed: October 10, 2018
    Publication date: April 16, 2020
    Applicant: SafeNet Inc.
    Inventors: Christopher Holland, Russel Egan
  • Publication number: 20200117813
    Abstract: A method for securing a digital document comprising first and second types of data, where a set of data of the second type is previously identified in an initial version of the document. For each data of the second type, an identifier is allocated to the data and an entry comprising the data is stored in a secure storage unit. The identifier comprises a display value and a link value. The data is reachable in the secure storage unit through the link value. The secure storage unit is configured to use access rules for authorizing or denying a request initiated by a user for accessing data of the second type contained in an entry of the secure storage unit. An updated version of the digital document is generated by replacing each data of the second type by its allocated identifier in the initial version of the digital document.
    Type: Application
    Filed: October 10, 2018
    Publication date: April 16, 2020
    Applicant: SAFENET INC.
    Inventors: Christopher HOLLAND, Russel EGAN
  • Publication number: 20200098894
    Abstract: In a method of manufacturing a semiconductor device, a gate structure is formed over a fin structure. A source/drain region of the fin structure is recessed. A first semiconductor layer is formed over the recessed source/drain region. A second semiconductor layer is formed over the first semiconductor layer. The fin structure is made of SixGe1-x, where 0?x?0.3, the first semiconductor layer is made of SiyGe1-y, where 0.45?y?1.0, and the second semiconductor layer is made of SizGe1-z, where 0?z?0.3.
    Type: Application
    Filed: March 29, 2019
    Publication date: March 26, 2020
    Inventors: Martin Christopher HOLLAND, Marcus Johannes Henricus VAN DAL