Patents by Inventor Chuan Chuang

Chuan Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190382810
    Abstract: A method for producing lactic acid from a biomass-based material includes: cultivating a strain of Bacillus spp. or recombinant Candida spp. capable of yielding lactic acid by consumption of hexose and pentose in a seed medium containing molasses and corn steep liquor, so as to obtain a seed culture of the strain in the seed medium; and fermenting the biomass-based material with the seed culture of the strain. The biomass contains a fermentable sugar. Genomic DNA of the recombinant Candida spp. includes a gene encoding lactate dehydrogenase, and pdc gene in the genomic DNA of the recombinant Candida spp. is deleted, disrupted or disabled.
    Type: Application
    Filed: December 7, 2018
    Publication date: December 19, 2019
    Inventors: Chu-Chin Wang, Yu-Chuan Chuang, Shu-Yin Shih, Yi-Cyun Jhang
  • Patent number: 10504789
    Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: December 10, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Yen Tsai, Chung-Chiang Wu, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee, Ching-Hwanq Su, Yin-Chuan Chuang, Kuan-Ting Liu
  • Publication number: 20190371675
    Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.
    Type: Application
    Filed: May 30, 2018
    Publication date: December 5, 2019
    Inventors: Cheng-Yen Tsai, Chung-Chiang Wu, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee, Ching-Hwanq Su, Yin-Chuan Chuang, Kuan-Ting Liu
  • Patent number: 10496773
    Abstract: A system comprises at least one processor configured to perform technology mapping to map logic elements in a logic netlist to corresponding dual-rail modules in a library. The technology mapping results in a network of interconnected nodes and the mapped dual-rail modules are arranged at corresponding nodes of the network. The processor is configured to optimize the network and perform the technology mapping based on at least one satisfiability-don't-care condition. Performance analysis may be performed by calculating a cycle time of a pipeline node in the network based on a calculated pre-charging finish time and an evaluation finish time of a fanin node of the pipeline node.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: December 3, 2019
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chi-Chuan Chuang, Yi-Hsiang Lai, Jie-Hong Chiang
  • Publication number: 20190341765
    Abstract: A protection circuit for an electronic device including a first power output interface and a second power output interface is disclosed. The protection circuit includes a first switch element and a detection circuit. The first switch element is coupled between a first voltage source and the first power output interface. In an operation of the protection circuit, the detection circuit detects an output voltage value of the second power output interface to generate a detection result, and the first switch element, according to the detection result, connects the first voltage source to the first power output interface to allow the first power output interface to output power to an external terminal, or disconnects the first voltage source from the first power output interface.
    Type: Application
    Filed: May 2, 2019
    Publication date: November 7, 2019
    Inventors: Tsui-Chuan CHUANG, Ming-Ruei LIU, Dien-Shen CHIANG, Chien-Tai KAO
  • Publication number: 20190276798
    Abstract: The present invention disclosed a method for preparing of collagen having regeneration and repair effects from Wharton's Jelly mesenchymal stein cells, comprising steps of culturing the Wharton's Jelly mesenchymal stein cells in a first medium for 16 to 24 hours; replacing the first medium with a second medium for culturing the Wharton's Jelly mesenchymal stein cells for 36 to 48 hours; collecting the Wharton's Jelly mesenchymal stein cells and adding a cell lysis solution to lyse the Wharton's Jelly mesenchymal stein cells for 0.5 to 2 hours, adding an inorganic salt solution to the cell lysis solution to obtain a mixing solution for further incubation at 4° C. for 24 to 48 hours; centrifuging the mixing solution and collecting a sediment, dissolving the sediment by a preservation solution to obtain a collage.
    Type: Application
    Filed: March 12, 2018
    Publication date: September 12, 2019
    Inventors: PEI-CHUAN CHUANG, I-FU CHEN
  • Publication number: 20190134865
    Abstract: An encapsulation method of electronic components comprises steps as follows: preparing electronic components with cylindrical bodies wherein a cylindrical body has front and rear ends made of metals and a middle end made of ceramics and the front end or the rear end features an outer diameter greater than the middle end of the cylindrical body; preparing a mould consisting of upper and lower moulds; encasing the cylindrical bodies inside the upper and lower moulds, injecting heated and softened protective materials into the mould in which protective materials as protective layers are coated on the cylindrical bodies; injecting the cylindrical bodies removed from the upper and lower moulds into a roller in which excessive protective layers on the front and rear ends of the cylindrical bodies are de-coated.
    Type: Application
    Filed: March 8, 2018
    Publication date: May 9, 2019
    Inventors: Kao-Yuan WANG, Nai-Chuan CHUANG, Shih-Long WEI
  • Patent number: 10163733
    Abstract: A method provides a design layout having a pattern of features. The design layout is transferred onto a substrate on a semiconductor substrate using a mask. A scanning parameter is determined based on the design layout. An image of the substrate is generated using the determined scanning parameter. A substrate defect is identified by comparing a first number of closed curves in a region of the image and a second number of polygons in a corresponding region of the design layout.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jia-Rui Hu, Shu-Chuan Chuang, Che-Yuan Sun, Chih-Ming Ke
  • Publication number: 20170345725
    Abstract: A method provides a design layout having a pattern of features. The design layout is transferred onto a substrate on a semiconductor substrate using a mask. A scanning parameter is determined based on the design layout. An image of the substrate is generated using the determined scanning parameter. A substrate defect is identified by comparing a first number of closed curves in a region of the image and a second number of polygons in a corresponding region of the design layout.
    Type: Application
    Filed: May 31, 2016
    Publication date: November 30, 2017
    Inventors: Jia-Rui HU, Shu-Chuan CHUANG, Che-Yuan SUN, Chih-Ming KE
  • Publication number: 20170162378
    Abstract: A method of manufacturing a substrate for epitaxy is disclosed, including the following steps. Dispose a buffer layer on a base, wherein the buffer layer is constituted by stacked nitride layers formed by the process of atomic layer deposition. The buffer layer could alternatively be constituted by stacked at least one first buffer sub-layer and at least one second buffer sub-layer, wherein the first and second buffer sub-layers are respectively constituted by layered first nitride layers and layered second nitride layers, which are both formed by the process of atomic layer deposition. While forming the buffer layer, perform ion bombardment each time a single layer of the nitride layer, the first nitride layer, or the second nitride layer is formed. Whereby, the base and the buffer layer constitute the substrate for epitaxy, which effectively enhances the crystallinity of the buffer layer.
    Type: Application
    Filed: November 30, 2016
    Publication date: June 8, 2017
    Inventors: Miin-Jang CHEN, Yuan-Chuan CHUANG, Huan-Yu SHIH, Ying-Ru SHIH, Wen-Ching HSU
  • Publication number: 20170116354
    Abstract: A system comprises at least one processor configured to perform technology mapping to map logic elements in a logic netlist to corresponding dual-rail modules in a library. The technology mapping results in a network of interconnected nodes and the mapped dual-rail modules are arranged at corresponding nodes of the network. The processor is configured to optimize the network and perform the technology mapping based on at least one satisfiability-don't-care condition. Performance analysis may be performed by calculating a cycle time of a pipeline node in the network based on a calculated pre-charging finish time and an evaluation finish time of a fanin node of the pipeline node.
    Type: Application
    Filed: January 6, 2017
    Publication date: April 27, 2017
    Inventors: Chi-Chuan CHUANG, Yi-Hsiang LAI, Jie-Hong CHIANG
  • Patent number: 9576094
    Abstract: A logic circuit includes first and second input, an output, an input acknowledgement node, an output acknowledgement node, a logic evaluation block, a pre-charging circuit, and a completion detection circuit. The logic evaluation block performs a logic evaluation of first and second input signals at the first and second inputs, and to output an output signal corresponding to the logic evaluation. The pre-charging circuit pre-charges the logic evaluation block in response to the first input signal and an acknowledgement signal at the input acknowledgement node. The completion detection circuit generates an acknowledgement signal at the output acknowledgement node in response to the second input signal and the output signal.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: February 21, 2017
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chi-Chuan Chuang, Yi-Hsiang Lai, Jie-Hong Chiang
  • Publication number: 20160354328
    Abstract: Provided is a method for preparation of a sustained released pharmaceutical composition, wherein an active ingredient and a cellulose derivative dissolved in a lower alkyl alcohol solvent are processed with granulation such that the PEO does not need to be processed with granulation or sizing to achieve uniform drug distribution. Besides, the specific range of the viscosity of the cellulose derivate provides better uniformity to the sustained release pharmaceutical composition derived from the above preparation method.
    Type: Application
    Filed: June 2, 2016
    Publication date: December 8, 2016
    Applicant: ANXO PHARMACEUTICAL CO., LTD.
    Inventors: Chen-Ming HUANG, Li-Chuan CHUANG, Chih-Hung LI
  • Patent number: 9423534
    Abstract: An optical module is disclosed. The optical module includes: a package substrate; an optical device disposed on the package substrate; a clear mold disposed on the package substrate and the optical device; an light blocking mold disposed on the package substrate, surrounding an optical device on the package substrate, and having an opening above the optical device; and a flexible buffer layer disposed on the light blocking mold. The light blocking mold and the flexible buffer layer are integrally formed of light blocking materials different from each other. An optical module including a plurality of optical devices is also disclosed.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: August 23, 2016
    Assignee: VISHAY CAPELLA MICROSYSTEMS (TAIWAN) LIMITED
    Inventors: Cheng-Chung Shih, Yung-Chuan Chuang, Feng-Gang Shiue
  • Patent number: 9305243
    Abstract: An adaptable classification method is provided. The method performs the classification by using a classification standard having a plurality of categories. The classification standard is classified into different categories based on probability ranges. The adaptable classification method includes training a classifying device with a plurality of samples and using the trained classifying device to determine the categories of the samples to obtain classification model scores of the samples, transferring, by using logistic-like functions, the classification model scores into probability values; and adjusting parameters of logistic-like functions to iterate the training of the classifying device such that the probability values conform to value ranges corresponding to categories of the classification standard.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: April 5, 2016
    Assignee: National Taiwan University
    Inventors: Argon Cheng-Kang Chen, Chiung-Nien Chen, Wen-Hung Kuo, Shu-Chuan Chuang
  • Patent number: 9283172
    Abstract: A use of a stem cell conditioned medium to induce ZO-1 proteins expression for skin regeneration, repair and finning is revealed herein. First, mesenchymal stem cells are cultured in a cell culture dish containing complete growth media, wherein the complete growth media include ?-MEM, fetal bovine serum, and human-basic fibroblast growth factors. After mesenchymal stem cells are sub-cultured in the complete growth media for three times, a conditioned medium which can effectively increase the activation of tight junction protein Zonula occludens-1 (ZO-1) can be acquired from the basal medium.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: March 15, 2016
    Assignee: Growgene Biotech Inc.
    Inventors: Pei-Chuan Chuang, Huei-Chun Liu
  • Patent number: 9284527
    Abstract: A use of a stem cell conditioned medium to inhibit melanin formation for skin whitening is revealed. First, mesenchymal stem cells are cultured in a cell culture dish containing complete growth media. After mesenchymal stem cells are sub-cultured in a complete growth media for three times, a conditioned medium can be acquired from the basal media.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: March 15, 2016
    Assignee: Growgene Biotech Inc.
    Inventors: Pei-Chuan Chuang, Huei-Chun Liu
  • Patent number: 9284528
    Abstract: A use of a stem cell conditioned medium to inhibit oxidation for anti-aging skin. First, mesenchymal stem cells are cultured in a cell culture dish containing a complete growth medium. After mesenchymal stem cells are sub-cultured in the complete growth media for three times and transferred to a basal medium, a conditioned medium can be acquired from the basal medium.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: March 15, 2016
    Assignee: Growgene Biotech Inc.
    Inventors: Pei-Chuan Chuang, Huei-Chun Liu
  • Publication number: 20160055270
    Abstract: A logic circuit includes first and second input, an output, an input acknowledgement node, an output acknowledgement node, a logic evaluation block, a pre-charging circuit, and a completion detection circuit. The logic evaluation block performs a logic evaluation of first and second input signals at the first and second inputs, and to output an output signal corresponding to the logic evaluation. The pre-charging circuit pre-charges the logic evaluation block in response to the first input signal and an acknowledgement signal at the input acknowledgement node. The completion detection circuit generates an acknowledgement signal at the output acknowledgement node in response to the second input signal and the output signal.
    Type: Application
    Filed: August 20, 2014
    Publication date: February 25, 2016
    Inventors: Chi-Chuan CHUANG, Yi-Hsiang LAI, Jie-Hong CHIANG
  • Publication number: 20150369734
    Abstract: An optical module is disclosed. The optical module includes: a package substrate; an optical device disposed on the package substrate; a clear mold disposed on the package substrate and the optical device; an light blocking mold disposed on the package substrate, surrounding an optical device on the package substrate, and having an opening above the optical device; and a flexible buffer layer disposed on the light blocking mold. The light blocking mold and the flexible buffer layer are integrally formed of light blocking materials different from each other. An optical module including a plurality of optical devices is also disclosed.
    Type: Application
    Filed: September 12, 2014
    Publication date: December 24, 2015
    Inventors: Cheng-Chung SHIH, Yung-Chuan CHUANG, Feng-Gang SHIUE