Patents by Inventor Chuan Wang

Chuan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9240406
    Abstract: A capacitor structure can include a parallel connection of a plurality of trench capacitors. First nodes of the plurality of trench capacitors are electrically tied to provide a first node of the capacitor structure. Second nodes of the plurality of trench capacitors are electrically tied together through at least one programmable electrical connection at a second node of the capacitor structure. Each programmable electrical connection can include at least one of a programmable electrical fuse and a field effect transistor, and can disconnect a corresponding trench capacitor temporarily or permanently. The total capacitance of the capacitor structure can be tuned by programming, temporarily or permanently, the at least one programmable electrical connection.
    Type: Grant
    Filed: April 21, 2014
    Date of Patent: January 19, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Kai D. Feng, Dan Moy, Chengwen Pei, Robert R. Robison, Pinping Sun, Richard A. Wachnik, Ping-Chuan Wang
  • Patent number: 9237293
    Abstract: A remote control system, including: a remote controller including one or more direction keys respectively corresponding to different directions and a confirm key; and a display device controlled by the remote controller; wherein: the remote controller is configured to transmit a direction control signal of a corresponding direction to the display device when one of the direction keys is pressed; and the display device is configured to, when the direction control signal is received by the display device in a first state of displaying sub-level content without displaying a card directory and corresponds to a predetermined direction, switch to a second state of displaying a card directory, the card directory including one selected card and at least one candidate card arranged in order, and at least one switch direction.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: January 12, 2016
    Assignee: Xiaomi Inc.
    Inventors: Chuan Wang, Xijie Shen, Zhaopeng Cheng, Yongjian Sun, Chuangqi Li, Jun Wan, Yi Ru, Feng Li, Xing Yan, Qingsong Dai
  • Publication number: 20160000597
    Abstract: An adjustable cervical collar is in the form of a u-shaped base with a front joined to a pair of rearwardly extending wings. Left and right chin supports are pivotally connected at their distal ends to the distal ends to of respective wings with a chin piece connected between the upper proximal ends of the chin supports. An adjustable latch is individually coupled between each wing and the lower proximal end of the associated chin supports. Preferably the latch is in the form of 1) an arcuate slot in each wing arranged around the respective pivot axis with a track formed on opposite sides of the slot and 2) a retractable locking pin carried by each chin support and movable within the respective slot, the locking pins adapted to engage the ribs in the respective track to releasably lock the chin support to the respective wing.
    Type: Application
    Filed: September 17, 2015
    Publication date: January 7, 2016
    Inventors: Thomas T. HAIDER, Chih-Chuan WANG
  • Patent number: 9229332
    Abstract: The present disclosure provides a lithography system comprising a radiation source and an exposure tool including a plurality of exposure columns densely packed in a first direction. Each exposure column includes an exposure area configured to pass the radiation source. The system also includes a wafer carrier configured to secure and move one or more wafers along a second direction that is perpendicular to the first direction, so that the one or more wafers are exposed by the exposure tool to form patterns along the second direction. The one or more wafers are covered with resist layer and aligned in the second direction on the wafer carrier.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: January 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Burn Jeng Lin, Shy-Jay Lin, Jaw-Jung Shin, Wen-Chuan Wang
  • Publication number: 20150381112
    Abstract: An apparatus includes an auxiliary mixing path configured to receive a differential signal. The apparatus also includes a filter having an input coupled to the auxiliary mixing path.
    Type: Application
    Filed: June 27, 2014
    Publication date: December 31, 2015
    Inventors: Chuan Wang, Wu-Hsin Chen, Aleksandar Miodrag Tasic, Jusung Kim
  • Publication number: 20150380326
    Abstract: A structure, such as a wafer, chip, IC, design structure, etc., includes a through silicon via (TSV) and an electromigration (EM) monitor. The TSV extends completely through a semiconductor chip and the EM monitor includes a plurality of EM wires proximately arranged about the TSV perimeter. An EM testing method includes forcing electrical current through EM monitor wiring arranged in close proximity to the perimeter of the TSV, measuring an electrical resistance drop across the EM monitor wiring, determining if an electrical short exists between the EM monitor wiring and the TSV from the measured electrical resistance, and/or determining if an early electrical open or resistance increase exists within the EM monitoring wiring due to TSV induced proximity effect.
    Type: Application
    Filed: June 30, 2014
    Publication date: December 31, 2015
    Inventors: Fen Chen, Mukta G. Farooq, John A. Griesemer, Chandrasekaran Kothandaraman, John M. Safran, Timothy D. Sullivan, Ping-Chuan Wang, Lijuan Zhang
  • Publication number: 20150370942
    Abstract: The present disclosure provides one embodiment of an IC method that includes receiving an IC design layout, which has a plurality of main features and a plurality of space blocks. The IC method also includes calculating an optimized block dummy density ratio r0 to optimize an uniformity of pattern density (UPD), determining a target block dummy density ratio R, determining size, pitch and type of a non-printable dummy feature, generating a pattern for non-printable dummy features and adding the non-printable dummy features in the IC design layout.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 24, 2015
    Inventors: Jyuh-Fuh Lin, Cheng-Hung Chen, Pei-Yi Liu, Wen-Chuan Wang, Shy-Jay Lin, Burn Jeng Lin
  • Publication number: 20150371821
    Abstract: The present disclosure provides one embodiment of an IC method. First pattern densities (PDs) of a plurality of templates of an IC design layout are received. Then a high PD outlier template and a low PD outlier template from the plurality of templates are identified. The high PD outlier template is split into multiple subsets of template and each subset of template carries a portion of PD of the high PD outlier template. A PD uniformity (PDU) optimization is performed to the low PD outlier template and multiple individual exposure processes are applied by using respective subset of templates.
    Type: Application
    Filed: September 11, 2014
    Publication date: December 24, 2015
    Inventors: Jyuh-Fuh Lin, CHENG-HUNG CHEN, PEI-YI LlU, WEN-CHUAN WANG, SHY-JAY LIN, BURN JENG LIN
  • Publication number: 20150364150
    Abstract: A hard disk duplication device capable of expanding duplication capacity by chain connection, including one or more duplicators, the duplicator including: an expansion input connection port; an expansion output connection port; an information display screen; multiple buttons including a start button and multiple selection buttons; and at least one hard disk connection port; wherein, the chain connection is achieved by connecting the expansion output connection port of one of a plurality of the duplicators with the expansion input connection port of another of the plurality of the duplicators.
    Type: Application
    Filed: April 20, 2015
    Publication date: December 17, 2015
    Inventor: Hong-Chuan WANG
  • Publication number: 20150362187
    Abstract: A plant (1) and a gas processing unit (GPU) (17) of the plant can be configured to operate in accordance with a method that is configured to permit the GPU (17) to operate such that the optimum operating point for the GPU (17) at steady state to produce liquid carbon dioxide product from a separation unit (117) of the GPU (17) for sending to a storage device (19) is achieved with a desired purity level while simultaneously maintaining a required minimum carbon capture rate with the minimum consumption of power and/or minimum economic cost associated with operations of the GPU (17). A controller (23) can be configured to communicate with elements of the GPU (17) to receive parameter values to calculate manipulated variables configured to bias set points for parameters used to control operations of different elements of the GPU (17).
    Type: Application
    Filed: June 16, 2014
    Publication date: December 17, 2015
    Inventors: Chuan WANG, Xinsheng LOU, Olaf STALLMANN, Christian BRITZ, Carl H. NEUSCHAEFER
  • Patent number: 9214170
    Abstract: A high performance TMR sensor is fabricated by employing a free layer comprised of CoNiFeB or CoNiFeBM where M is V, Ti, Zr, Nb, Hf, Ta, or Mo and the M content in the alloy is <10 atomic %. The free layer may have a FeCo/FeB/CoNiFeB, FeCo/CoFe/CoNiFeB, FeCo/CoFeB/CoNiFeB, or FeCo/CoNiFeB/CoFeB configuration. A CoNiFeBM layer may be formed by co-sputtering CoB with CoNiFeM. A 15 to 30% in improvement in TMR ratio over a conventional CoFe/NiFe free layer is achieved while maintaining low Hc and RA<3 ohm-um2. The CoNiFeB or CoNiFeBM layer has a magnetostriction (?) value between ?5×10?6 and 5×10?6.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: December 15, 2015
    Assignee: Headway Technologies, Inc.
    Inventors: Hui-Chuan Wang, Tong Zhao, Min Li, Kunliang Zhang
  • Publication number: 20150349724
    Abstract: A device includes a main two-stage low noise amplifier (LNA) configured to amplify a carrier aggregation (CA) communication signal, the main two-stage LNA comprising a first LNA stage and a second LNA stage, an output of the first LNA stage having a first stage second order intermodulation product, the second LNA stage comprising a phase-inverter configured to phase-invert the output of the first LNA stage to generate a second stage phase-inverted output, and an auxiliary LNA stage coupled to the main two-stage LNA, the auxiliary LNA stage configured to cancel the first stage second order intermodulation product.
    Type: Application
    Filed: May 30, 2014
    Publication date: December 3, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Chuan Wang, Dongling Pan, Yiwu Tang, Klaas van Zalinge, Muhammad Hassan
  • Publication number: 20150349722
    Abstract: A device includes a load circuit configured to receive an amplified communication signal, the load circuit having a center tapped inductor structure configured to divide the amplified communication signal into a first portion and a second portion, the load circuit configured to resonate at a harmonic of the amplified communication signal.
    Type: Application
    Filed: May 30, 2014
    Publication date: December 3, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Chuan Wang, Dongling Pan, Yiwu Tang, Klaas van Zalinge, Muhammad Hassan
  • Publication number: 20150348899
    Abstract: A method for fabricating an interconnect function array includes forming a first plurality of conductive lines on a substrate, forming an insulator layer over the first plurality of conductive lines and the substrate, removing portions of the insulator layer to define cavities in the insulator layer that expose portions of the substrate and the first plurality of conductive lines, wherein the removal of the portions of the insulator layer results in a substantially random arrangement of cavities exposing portions of the substrate and the first plurality of conductive lines, depositing a conductive material in the cavities, and forming a second plurality of conductive lines on portions of the conductive material in the cavities and the insulator layer.
    Type: Application
    Filed: August 13, 2015
    Publication date: December 3, 2015
    Inventors: Kai D. Feng, Wai-Kin Li, Ping-Chuan Wang, Zhijian Yang
  • Patent number: 9200930
    Abstract: A dual colored pointer arm for an instrument gauge constructed of a clear material and having a coated bi-color top surface.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: December 1, 2015
    Assignee: Continental Automotive Systems, Inc.
    Inventors: Vyacheslav Borisovich Birman, Tao-Chuan Wang, Curt Ollila
  • Publication number: 20150340861
    Abstract: A power supply device capable of determining an operating voltage of an electronic device is disclosed. The disclosed power supply device may include a connecting unit used by the electronic device to electrically couple to the power supply device, a voltage converting unit for receiving a first voltage and converting the first voltage to a second voltage and a third voltage, a control unit connected to the connecting unit for detecting the operating voltage of the electronic device by the connecting unit and outputting a control signal based on the detected operating voltage, and a selecting unit connected to the voltage converting unit, the connecting unit, and the control unit, for receiving the control signal, the second voltage, and the third voltage before selectively outputting either the second voltage or the third voltage depending on the control signal to the electronic device.
    Type: Application
    Filed: May 22, 2015
    Publication date: November 26, 2015
    Inventor: Chien-Chuan Wang
  • Publication number: 20150331889
    Abstract: A method of image tagging for identifying regions and behavior relationship between different objects, the method comprising: providing a photo database downloaded a photo to a graphical user interface of an electronic device; providing a graphic module which comprises a graphic interface that overlapped on said photo, said graphic module further comprises one or more tagging tools to generate one or more Icons on said graphic interface; said tagging tools comprise at least a selecting tool to allow a user select a first object and a second object of said photo, and a linking tool to allow said user combine said first object with said second object; wherein, appearing a text input to input a message related to said first object and said second object when using said tagging tool; and appearing a validation window on said graphic user interface to verify said label of said photo tagged by said user after tagging completely.
    Type: Application
    Filed: November 27, 2014
    Publication date: November 19, 2015
    Inventors: Hao-Chuan WANG, Hsing-Lin TSAI
  • Publication number: 20150331510
    Abstract: The disclosure provides a touch control assembly, a method for controlling a device, a controller and an electronic device. The touch control assembly comprises: a touch pad and a controller. The touch pad is configured to detect a touch control operation on the touch pad, and send a touch control signal corresponding to the touch control operation to the controller. The controller is configured to analyze and determine the touch control operation according to the touch control signal, and control the electronic device according to the touch control operation and the operation state of the electronic device.
    Type: Application
    Filed: February 13, 2015
    Publication date: November 19, 2015
    Applicant: XIAOMI INC.
    Inventors: Chuan WANG, Chuangqi LI, I, Fa WANG, Hui WANG
  • Patent number: 9190360
    Abstract: An organic material layer is lithographically patterned to include a linear array portion of lines and spaces. In one embodiment, the organic material layer can be an organic planarization layer that is patterned employing a photoresist layer, which is consumed during patterning of the organic planarization layer. Volume expansion of the organic planarization layer upon exposure to a halogen-including gas causes portions of the linear array to collapse at random locations. In another embodiment, the height of the photoresist layer is selected such that the linear array portion of the photoresist layer is mechanically unstable and produces random photoresist collapses. The pattern including random modifications due to the collapse of the organic material layer is transferred into an underlying layer to generate an array of conductive material lines with random electrical disruption of shorts or opens. The structure with random shorts can be employed as a physical unclonable function.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: November 17, 2015
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Kai D. Feng, Wai-Kin Li, Ping-Chuan Wang, Zhijian Yang
  • Patent number: 9189654
    Abstract: A set of physical unclonable function (PUF) cells is configured with a set of capacitive devices in an integrated circuit (IC). A subset of PUF cells includes a corresponding subset of capacitive devices that have failed during fabrication. A charging current sufficient to charge an operational capacitive device in a PUF cell is sent to the set of PUF cells. A determination is made whether an output voltage of a PUF cell exceeds a threshold. When the output voltage exceeding the threshold, a logic value of 1 is produced at a position in a bit-string. The determination and the producing is repeated for each PUF cell in the set to output a bit-string, which includes 1s and 0s in random positions. The bit-string is used in a security application as a random stable value owing to a random pattern of 1s and 0s present in the bit-string.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: November 17, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kai Di Feng, Wai-Kin Li, Chengwen Pei, Ping-Chuan Wang