Abstract: An apparatus including: a plurality of amplifiers having a plurality of output ports, respectively, the plurality of amplifiers configured to amplify radio frequency (RF) signals received from at least one antenna; a plurality of demodulators configured to receive the amplified RF signals at a plurality of input ports, respectively, the plurality of demodulators configured to downconvert the received RF signals; and a plurality of switches configured to couple selected output ports of the plurality of amplifiers to selected input ports of the plurality of demodulators, wherein each switch of the plurality of switches is configured such that at least one of the plurality of output ports of the plurality of amplifiers is selectively coupled to any of multiple input ports of the plurality of input ports of the plurality of demodulators.

Abstract: A structure for TDDB measurement, a method determining TDDB at reduced spacings. The structure includes an upper dielectric layer on a top surface of a lower dielectric layer, a bottom surface of the upper dielectric layer and the top surface of the lower dielectric layer defining an interface; a first wire formed in the lower dielectric layer; a second wire formed in the upper dielectric layer; and wherein a distance between the first wire and the second wire measured in a direction parallel to the interface is below the lithographic resolution limit of the fabrication technology.

Abstract: A modularized interposer includes a plurality of interposer units that are assembled to provide a complete set of electrical connections between two semiconductor chips. At least some of the plurality of interposer units can be replaced with other interposer units having an alternate configuration to enable selection of different functional parts of semiconductor chips to be connected through the modularized interposer. Bonding structures, connected to conductive metal pads located at peripheries of neighboring interposer units and an overlying or underlying portion of a semiconductor chip, can provide electrical connections between the neighboring interposer units. The interposer units can be provided by forming through-substrate vias (TSV's) in a substrate, forming patterned conductive structures on the substrate, and cutting the substrate into interposers.

Abstract: The present disclosure provides a lithography system comprising a radiation source and an exposure tool including a plurality of exposure columns densely packed in a first direction. Each exposure column includes an exposure area configured to pass the radiation source. The system also includes a wafer carrier configured to secure and move one or more wafers along a second direction that is perpendicular to the first direction, so that the one or more wafers are exposed by the exposure tool to form patterns along the second direction. The one or more wafers are covered with resist layer and aligned in the second direction on the wafer carrier.

Abstract: A positioning system comprises a sweeper and a positioning device arranged on a ceiling. The sweeper has a lighting component for emitting light. The positioning device at least has a height measuring unit and a plurality of light-sensitive units. The positioning device measures a vertical distance between the positioning device and a floor through the height measuring unit. The positioning device receives the light emitted from the emitting light of the sweeper through the light-sensitive units, and calculates an oblique distance between the positioning device and the sweeper based on different strengths of the light respectively received from each of the plurality of light-sensitive units. Therefore, the positioning device can calculates a parallel distance between the positioning device and the sweeper based on the vertical distance and the oblique distance, and further determines a related position of the sweeper opposite to the positioning device.

Abstract: A TMR stack or a GMR stack, ultimately formed into a sensor or MRAM element, include insertion layers of Fe or iron rich layers of FeX in its ferromagnetic free layer and/or the AP1 layer of its SyAP pinned layer. X is a non-magnetic, metallic element (or elements) chosen from Ta, Hf, V, Co, Mo, Zr, Nb or Ti whose total atom percent is less than 50%. The insertion layers are between 1 and 10 angstroms in thickness, with between 2 and 5 angstroms being preferred and, in the TMR stack, they are inserted adjacent to the interfaces between a tunneling barrier layer and the ferromagnetic free layer or the tunneling barrier layer and the AP1 layer of the SyAP pinned layer in the TMR stack. The insertion layers constrain interdiffusion of B and Ni from CoFeB and NiFe layers and block NiFe crystalline growth.

Abstract: The present invention provides compositions and methods for treating cancer in a human. The invention relates to targeting the stromal cell population in a tumor microenvironment. For example, in one embodiment, the invention provides a composition that is targeted to fibroblast activation protein (FAP). The invention includes a chimeric antigen receptor (CAR) which comprises an anti-FAP domain, a transmembrane domain, and a CD3zeta signaling domain.

Abstract: A Physical Unclonable Function (PUF) semiconductor device includes a semiconductor substrate, and regions, with implant regions and covered regions, in the semiconductor substrate. A hardmask covers a first covered region and a second covered. The first implant region having a first concentration of ions, and at least one second implant region having a second concentration that is less than the first concentration. First and second FETs are formed on the regions. The first and second FETs have a voltage threshold mismatch with respect to one another based on the first region and the at least one second region.

Abstract: A TMR sensor with a free layer having a FL1/FL2/FL3 configuration is disclosed in which FL1 is FeCo or a FeCo alloy with a thickness between 2 and 15 Angstroms. The FL2 layer is made of CoFeB or a CoFeB alloy having a thickness from 2 to 10 Angstroms. The FL3 layer is from 10 to 100 Angstroms thick and has a negative ? to offset the positive ? from FL1 and FL2 layers and is comprised of CoB or a CoBQ alloy where Q is one of Ni, Mn, Tb, W, Hf, Zr, Nb, and Si. Alternatively, the FL3 layer may be a composite such as CoB/CoFe, (CoB/CoFe)n where n is ?2 or (CoB/CoFe)m/CoB where m is ?1. The free layer described herein affords a high TMR ratio above 60% while achieving low values for ? (<5×10?6), RA (1.5 ohm/?m2), and Hc (<6 Oe).

Abstract: High density capacitor structures based on an array of semiconductor nanorods are provided. The high density capacitor structure can be a plurality of capacitors in which each of the semiconductor nanorods serves as a bottom electrode for one of the plurality of capacitors, or a large-area metal-insulator-metal (MIM) capacitor in which the semiconductor nanorods serve as a support structure for a bottom electrode of the MIM capacitor subsequently formed.

Abstract: Processing infrastructure metadata information about a virtual resource of a virtual cloud is disclosed. Infrastructure metadata information is collected. The collected metadata information is about a virtual resource of a virtual cloud. A storage of infrastructure metadata information is updated. The updating of the storage of infrastructure metadata information is performed using the collected information.

Abstract: The present invention relates generally to flip chip technology and more particularly, to a method and structure for fabricating a mechanically anchored controlled collapse chip connection (C4) pad on a semiconductor structure. In an embodiment, a method is disclosed that may include forming a bonding pad having one or more anchor regions that extend into a semiconductor structure and may inhibit the bonding pad from physically separating from the TSV during temperature fluctuations.

Abstract: A storage system and a method for realizing a storage system is disclosed, the storage system comprising: a disk array comprising at least one solid state disk and at least one non-solid state disk; and a storage control means configured to: in response to entering a scrubbing mode, scan and move data blocks in the at least one non-solid state disk in the disk array to form more continuous free blocks. The storage system of the present invention has good read and write performances, higher data reliability and availability, and lower cost.

Abstract: A fluid supply device includes a base member including an end plate and a rod perpendicularly extending from a first end of the end plate and defining a first channel axially and a through slot radially, a container attached to a second end of the end plate opposite to the first end and defining a second channel to contain fluid, a pushing member slidably received in the first channel and the second channel, an actuating sleeve threadedly engaging with the rod, and a fixing member attached to the actuating sleeve and extending through the through slot and the pushing member. The actuating sleeve is rotated to drive the pushing member to slide in the first channel and the second channel to push the fluid.

Abstract: The present disclosure provides an optical sensing apparatus for measuring a change in a first property. The optical sensing apparatus comprises first and second optical fibre portions and a sensing region for exposing both the first and second optical fibre portions to a change in an applied force. The force is, or is related to, the first property and has a component that is transversal to the optical fibre portions. The apparatus further comprises a holder for holding the first and second optical fibre portions in the sensing region. The first and second optical fibre portions are arranged relative to each other such that the change in the force results in a first change of an optical property of the first optical fibre portion and in a second change of the optical property of the second optical fibre portion and wherein the first change differs from the second change.

Abstract: A server rack includes a frame, servers and slide rail structures. The frame has a bottom end and a top end opposite to each other. The servers are stacked between the bottom end and the top end. Each of the servers has an operation end and a heat-dissipation end opposite to each other. The slide rail structures connect the servers to the frame for allowing each of the servers to at least partially slide out of the frame towards the corresponding operation end. A distance by which each of the servers slides out of the frame is greater than or equal to a distance by which the adjacent server located closer to the bottom end slides out of the frame.

Abstract: The present disclosure provides methods of electron-beam (e-beam) lithography process. The method includes loading a substrate to an electron-beam (e-beam) system such that a first subset of fields defined on the substrate is arrayed on the substrate along a first direction. The method also includes positioning a plurality of e-beam columns having a first subset of e-beam columns arrayed along the first direction. The e-beam columns of the first subset of e-beam columns are directed to different ones of the first subset of fields. The method also includes performing a first exposing process in a scan mode such that the plurality of e-beam columns scans the substrate along the first direction.

Abstract: A test structure used to determine reliability performance includes a patterned metallization structure having multiple interfaces, which provide stress risers. A dielectric material surrounds the metallization structure, where a mismatch in coefficients of thermal expansion (CTE) between the metallization structure and the surrounding dielectric material exist such that a thermal strain value is provided to cause failures under given stress conditions as a result of CTE mismatch to provide a yield indicative of reliability for a manufacturing design.

Abstract: Aspects of the present disclosure provide an integrated circuit (IC) test structure. An IC structure according to the present disclosure can include: a monitor chain having a first end electrically connected to a second end through a plurality of metal wires each positioned within one of a first metal level and a second metal level, wherein the first metal level is vertically separated from the second metal level; a first test wire positioned within the first metal level and extending in a first direction, wherein the first test wire is electrically insulated from the monitor chain; and a second test wire positioned within the second metal level and extending in a second direction, wherein the second test wire is electrically insulated from the monitor chain and the first test wire, and wherein the first direction is different from the second direction.