Patents by Inventor Chuan Yang

Chuan Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory device and hybrid spacer thereof
    Patent number: 11469240
    Abstract: A semiconductor device includes a metal layer and a spacer arranged adjacent to the metal layer. The spacer includes a composite-dielectric layer including a composite-dielectric material. A composition of the composite-dielectric material is a mixture of a composition of a first dielectric material and a composition of a second dielectric material different from the first dielectric material.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: October 11, 2022
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Liheng Liu, Chuan Yang, Shuangshuang Peng
  • SRAM STRUCTURE AND METHOD
    Publication number: 20220319583
    Abstract: Semiconductor devices and methods are provided. A semiconductor device of the present disclosure includes a bias source, a memory cell array including a first region adjacent to the bias source and a second region away from the bias source, and a conductive line electrically coupled to the bias source, a first memory cell in the first region and a second memory cell in the second region. The first memory cell is characterized by a first alpha ratio and the second memory cell is characterized by a second alpha ratio smaller than the first alpha ratio.
    Type: Application
    Filed: June 17, 2022
    Publication date: October 6, 2022
    Inventors: Chih-Chuan Yang, Shih-Hao Lin
  • METHOD FOR PREPARING GRAPHENE MATERIAL FROM INDUSTRIAL HEMP BY LASER INDUCTION
    Publication number: 20220306474
    Abstract: Provided is a method for preparing a graphene material from an industrial hemp material by laser induction, which uses a skin, a stem and/or a root of industrial hemp as a carbon precursor-containing material and reduce the carbon precursor-containing material into graphene by laser induction, so as to prepare graphene, graphene quantum dots, a graphene mesoporous material and a graphene composite material.
    Type: Application
    Filed: March 23, 2022
    Publication date: September 29, 2022
    Inventors: Heping ZENG, Chuan Yang, Mengyun Hu
  • Angle Adjustment Structure for Pressing Hand Tool
    Publication number: 20220305628
    Abstract: An angle adjustment structure for pressing a hand tool comprising: a first handle, a second handle, a first spring washer, a second spring washer, a return spring, a first presser, a second presser, a first fastener and a second fastener. The first handle includes a contact sheet having a first thickness, a first toothed orifice. The second handle includes a groove having a second thickness, a second toothed orifice, a first fixing plate and a second fixing plate. A profile of the second toothed orifice is identical to a profile of the first toothed orifice. The return spring is defined on the first presser and the second presser. The first handle and the second handle adjust the angle when the first presser and second presser are pressed simultaneously, and being fixed by the first fastener and second fastener to avoid a removal.
    Type: Application
    Filed: June 16, 2022
    Publication date: September 29, 2022
    Inventor: Te-Chuan Yang
  • OPTIMIZED STATIC RANDOM ACCESS MEMORY
    Publication number: 20220310630
    Abstract: A memory device includes a memory array having a plurality of memory cells. Each memory cell of the plurality of memory cells is connected to a word line to apply a first signal to select the memory cell to read data from or write the data to the memory cell and a bit line to read the data from the memory cell or provide the data to write to the memory cell upon selecting the memory cell by the word line. A first bit line portion of the bit line connected to a first memory cell of the plurality of memory cells abuts a second bit line portion of the bit line connected to a second memory cell of the plurality of memory cells. The first memory cell is adjacent to the second memory cell.
    Type: Application
    Filed: June 16, 2022
    Publication date: September 29, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Wei Wang, Lien Jung Hung, Kuo-Hsiu Hsu, Kian-Long Lim, Yu-Kuan Lin, Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Choh Fei Yeap
  • INTEGRATED CIRCUIT WITH LATCH-UP IMMUNITY
    Publication number: 20220310599
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming an epitaxial structure having a first doping type over a first portion of a semiconductor substrate. A second portion of the semiconductor substrate is formed over the epitaxial structure and the first portion of the semiconductor substrate. A first doped region having the first doping type is formed in the second portion of the semiconductor substrate and directly over the epitaxial structure. A second doped region having a second doping type opposite the first doping type is formed in the second portion of the semiconductor substrate, where the second doped region is formed on a side of the epitaxial structure. A plurality of fins of the semiconductor substrate are formed by selectively removing portions of the second portion of the semiconductor substrate.
    Type: Application
    Filed: June 15, 2022
    Publication date: September 29, 2022
    Inventors: Jing-Yi Lin, Chih-Chuan Yang, Shih-Hao Lin
  • Connection between source/drain and gate
    Patent number: 11450673
    Abstract: A semiconductor device according to the present disclosure includes a gate extension structure, a first source/drain feature and a second source/drain feature, a vertical stack of channel members extending between the first source/drain feature and the second source/drain feature along a direction, and a gate structure wrapping around each of the vertical stack of channel members. The gate extension structure is in direct contact with the first source/drain feature.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: September 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Chuan Yang, Chia-Hao Pao, Yu-Kuan Lin, Lien Jung Hung, Ping-Wei Wang, Shih-Hao Lin
  • Semiconductor device and method
    Patent number: 11444197
    Abstract: A semiconductor device including nanosheet field-effect transistors (NSFETs) in a first region and fin field-effect transistors (FinFETs) in a second region and methods of forming the same are disclosed. In an embodiment, a device includes a first memory cell, the first memory cell including a first transistor including a first channel region, the first channel region including a first plurality of semiconductor nanostructures; and a second transistor including a second channel region, the second channel region including a semiconductor fin.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Chuan Yang, Kuo-Hsiu Hsu, Feng-Ming Chang, Kian-Long Lim, Lien Jung Hung
  • Memory Device with Improved Margin and Performance and Methods of Formation Thereof
    Publication number: 20220285369
    Abstract: A substrate includes a first doped region having a first type dopant, and a second doped region having a second type dopant and adjacent to the first doped region. A stack is formed that includes first layers and second layers alternating with each other. The first and second layers each have a first and second semiconductor material, respectively. The second semiconductor material is different than the first semiconductor material. A mask element is formed that has an opening in a channel region over the second doped region. A top portion of the stack not covered by the mask element is recessed. The stack is then processed to form a first and a second transistors. The first transistor has a first number of first layers. The second transistor has a second number of first layers. The first number is greater than the second number.
    Type: Application
    Filed: May 23, 2022
    Publication date: September 8, 2022
    Inventors: Shih-Hao Lin, Kian-Long Lim, Chih-Chuan Yang, Chia-Hao Pao, Jing-Yi Lin
  • Integrated circuit with latch-up immunity
    Patent number: 11430788
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming an epitaxial structure having a first doping type over a first portion of a semiconductor substrate. A second portion of the semiconductor substrate is formed over the epitaxial structure and the first portion of the semiconductor substrate. A first doped region having the first doping type is formed in the second portion of the semiconductor substrate and directly over the epitaxial structure. A second doped region having a second doping type opposite the first doping type is formed in the second portion of the semiconductor substrate, where the second doped region is formed on a side of the epitaxial structure. A plurality of fins of the semiconductor substrate are formed by selectively removing portions of the second portion of the semiconductor substrate.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: August 30, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jing-Yi Lin, Chih-Chuan Yang, Shih-Hao Lin
  • COMBINATION THERAPIES THAT ENHANCE ANTIMICROBIAL/ANTICANCER ACTIVITIES
    Publication number: 20220265702
    Abstract: Techniques regarding a chemical composition that can be utilized within one or more combination therapies to treat a microbial infection are provided. For example, one or more embodiments described herein can comprise a chemical composition that includes a first triblock polymer comprising a quaternary ammonium functionalized polycarbonate block and exhibiting anticancer activity via a lytic mechanism. The chemical composition can also include a second triblock polymer comprising a guanidinium functionalized polycarbonate block and exhibiting anticancer activity via a translocation mechanism.
    Type: Application
    Filed: April 14, 2022
    Publication date: August 25, 2022
    Inventors: James L. Hedrick, Yi Yan Yang, Nathaniel H. Park, Jiayu Leong, Chuan Yang, Xin Ding, Yiran Zhen, Cherylette Anne Alexander, Jye Yng Teo
  • SEMICONDUCTOR DEVICE WITH FISH BONE STRUCTURE AND METHODS OF FORMING THE SAME
    Publication number: 20220262958
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a first semiconductor stack and a second semiconductor stack over a substrate, wherein each of the first and second semiconductor stacks includes semiconductor layers stacked up and separated from each other; a dummy spacer between the first and second semiconductor stacks, wherein the dummy spacer contacts a first sidewall of each semiconductor layer of the first and second semiconductor stacks; and a gate structure wrapping a second sidewall, a top surface, and a bottom surface of each semiconductor layer of the first and second semiconductor stacks.
    Type: Application
    Filed: May 9, 2022
    Publication date: August 18, 2022
    Inventors: Chih-Chuan Yang, Kuo-Hsiu Hsu
  • Method of forming backside power rails
    Patent number: 11411100
    Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, a semiconductor structure includes a source feature and a drain feature, a channel structure disposed between the source feature and the drain feature, a semiconductor layer disposed over the channel structure and the drain feature, a dielectric layer disposed over the semiconductor layer, a backside source contact over the source feature and extending through the semiconductor layer and the dielectric layer, and a backside power rail disposed over the dielectric layer and in contact with the backside source contact.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: August 9, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-Wei Wang, Chih-Chuan Yang, Yu-Kuan Lin, Choh Fei Yeap
  • FINFET CIRCUIT DEVICES WITH WELL ISOLATION
    Publication number: 20220246465
    Abstract: A method includes receiving a structure that includes a substrate including a first well region having a first dopant type and a second well region having a second dopant type that is opposite to the first dopant type; and fins extending above the substrate. The method further includes forming a patterned etch mask on the structure, wherein the patterned etch mask provides an opening that is directly above a first fin of the fins, wherein the first fin is directly above the first well region. The method further includes etching the structure through the patterned etch mask, wherein the etching removes the first fin and forms a recess in the substrate that spans from the first well region into the second well region; and forming a dielectric material between remaining portions of the fins and within the recess.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 4, 2022
    Inventors: Chih-Chuan Yang, Chang-Ta Yang
  • Optimized static random access memory
    Patent number: 11393831
    Abstract: A memory device includes a memory array having a plurality of memory cells. Each memory cell of the plurality of memory cells is connected to a word line to apply a first signal to select the memory cell to read data from or write the data to the memory cell and a bit line to read the data from the memory cell or provide the data to write to the memory cell upon selecting the memory cell by the word line. A first bit line portion of the bit line connected to a first memory cell of the plurality of memory cells abuts a second bit line portion of the bit line connected to a second memory cell of the plurality of memory cells. The first memory cell is adjacent to the second memory cell.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: July 19, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Ping-Wei Wang, Lien Jung Hung, Kuo-Hsiu Hsu, Kian-Long Lim, Yu-Kuan Lin, Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Choh Fei Yeap
  • Health Care Device
    Publication number: 20220218517
    Abstract: A health care device includes a soft water bag, a control unit disposed on a side of the soft water bag, a temperature control element electrically connected to the control unit and disposed inside the soft water bag. When the control unit controls the temperature control element, the temperature control element disposed inside the soft water bag is energized to heat and control a temperature of liquid in the soft water bag, so as to provide better portability than the conventional products.
    Type: Application
    Filed: January 11, 2021
    Publication date: July 14, 2022
    Inventor: Cheng-Chuan Yang
  • Device and method for detecting purpose of article
    Patent number: 11386305
    Abstract: A device and a method for detecting a purpose of an article are provided. The device is configured to divide the article into a plurality of sentences and input the sentences to a feature identification model to generate a contextualized word vector corresponding to each of the sentences. The device further inputs the representation to a specific purpose detecting model to generate a distributed representation similarity of the article. When the distributed representation similarity of the article is greater than a threshold, the device determines that the article conforms to a specific purpose.
    Type: Grant
    Filed: November 29, 2020
    Date of Patent: July 12, 2022
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Chu-Chun Huang, Yu-Chuan Yang, Yen-Heng Tsao, Tzu-Ying Chen, Po-Hsien Chiang, Fu-Jheng Jheng
  • Lens control method and apparatus and terminal
    Patent number: 11375097
    Abstract: A lens control method is applied to a camera module with an OIS motor. The module includes a lens, an OIS motor, an OIS motor driver module, and an imaging sensor. The method includes: obtaining a first speed and a first direction of a to-be-photographed object in a moving process, an object distance between the to-be-photographed object and the lens, and an image distance between the lens and the imaging sensor; calculating a second speed and a second direction based on the first speed, the first direction, the object distance, and the image distance; and sending a control signal to the OIS motor driver module, so that the OIS motor driver module drives the OIS motor to control the lens to move at the second speed and in the second direction.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: June 28, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chuan Yang, Yunju Liu, Li-Te Kuo
  • Control Method For Shape Memory Alloy Motor In Photographing Apparatus And Photographing Apparatus
    Publication number: 20220196967
    Abstract: A photographing apparatus includes a shape memory alloy (SMA) motor, an image sensor, a lens, and a controller. The SMA motor includes an SMA wire. The SMA wire is configured to deform to drive the lens to move. The controller is configured to output a pulse signal. The pulse signal includes a drive signal and a detection signal. The drive signal is used to cause the SMA wire to deform. The detection signal is used to detect deformation of the SMA wire. N times a pulse signal cycle is equal to a time difference between the first time of sampling and the second time of sampling in correlated double sampling of the image sensor.
    Type: Application
    Filed: February 26, 2020
    Publication date: June 23, 2022
    Inventors: Jiazhi Dai, Chuan Yang, Feng Gao, Huogen Kuang, Takao Ishii
  • SRAM structure and method
    Patent number: 11367479
    Abstract: Semiconductor devices and methods are provided. A semiconductor device of the present disclosure includes a bias source, a memory cell array including a first region adjacent to the bias source and a second region away from the bias source, and a conductive line electrically coupled to the bias source, a first memory cell in the first region and a second memory cell in the second region. The first memory cell is characterized by a first alpha ratio and the second memory cell is characterized by a second alpha ratio smaller than the first alpha ratio.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: June 21, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Chuan Yang, Shih-Hao Lin