Patents by Inventor Chuan Yang

Chuan Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220187615
    Abstract: A voice coil motor for driving a liquid lens and a lens assembly having a voice coil motor, where the voice coil motor includes a plurality of sub motor parts. The sub motor parts can be independently controlled. The sub motor part includes an unmovable part, a movable part, which can move along an optical axis direction relative to the unmovable part, a connection elastic piece, coupled to the liquid lens and the movable part, where when a force is applied to the movable part in the optical axis direction, the movable part drives the connection elastic piece to squeeze the liquid lens.
    Type: Application
    Filed: February 21, 2020
    Publication date: June 16, 2022
    Inventors: Taihong Xia, Chuan Yang, Jianwen Wang, Haixia Jiang, Lei Jiang, Dengfeng Li, Yuandao Ju
  • Publication number: 20220168847
    Abstract: Numerous embodiments are disclosed. Many of which relate to methods of forming vias in workpieces such as printed circuit boards. Some embodiments relates techniques for indirectly ablating a region of an electrical conductor structure of, for example, a printed circuit board by spatially distributing laser energy throughout the region before the electrical conductor is indirectly ablated. Other embodiments relate to techniques for temporally-dividing laser pulses, modulating the optical power within laser pulses, and the like.
    Type: Application
    Filed: May 29, 2020
    Publication date: June 2, 2022
    Inventors: Jan KLEINERT, Zhibin LIN, Joel SCHRAUBEN, Mark UNRATH, Honghua HU, Ruolin CHEN, Chuan YANG, Geoffrey LOTT, Daragh FINN
  • Publication number: 20220173113
    Abstract: A semiconductor device includes a first memory cell and a dummy region adjacent to the first memory cell. The first memory cell includes a first transistor. The dummy region includes a cut-off transistor. The cut-off transistor has a first terminal electrically coupled to a second terminal of the first transistor. The cut-off transistor has a third terminal electrically coupled to ground.
    Type: Application
    Filed: February 21, 2022
    Publication date: June 2, 2022
    Inventor: Chih-Chuan Yang
  • Publication number: 20220173098
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC) having a device section and a pick-up section. The IC includes a semiconductor substrate. A first fin of the semiconductor substrate is disposed in the device section. A second fin of the semiconductor substrate is disposed in the pick-up section and laterally spaced from the first fin in a first direction. A gate structure is disposed in the device section and laterally spaced from the second fin in the first direction. The gate structure extends laterally over the semiconductor substrate and the first fin in a second direction perpendicular to the first direction. A pick-up region is disposed on the second fin. The pick-up region continuously extends from a first sidewall of the second fin to a second sidewall of the second fin. The first sidewall is laterally spaced from the second sidewall in the first direction.
    Type: Application
    Filed: February 16, 2022
    Publication date: June 2, 2022
    Inventors: Hsin-Wen Su, Lien Jung Hung, Ping-Wei Wang, Wen-Chun Keng, Chih-Chuan Yang, Shih-Hao Lin
  • Patent number: 11342338
    Abstract: A substrate includes a first doped region having a first type dopant, and a second doped region having a second type dopant and adjacent to the first doped region. A stack is formed that includes first layers and second layers alternating with each other. The first and second layers each have a first and second semiconductor material, respectively. The second semiconductor material is different than the first semiconductor material. A mask element is formed that has an opening in a channel region over the second doped region. A top portion of the stack not covered by the mask element is recessed. The stack is then processed to form a first and a second transistors. The first transistor has a first number of first layers. The second transistor has a second number of first layers. The first number is greater than the second number.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: May 24, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Hao Lin, Kian-Long Lim, Chih-Chuan Yang, Chia-Hao Pao, Jing-Yi Lin
  • Publication number: 20220152742
    Abstract: A method for processing a chip based on deep learning and an apparatus for processing a chip based on deep learning are provided.
    Type: Application
    Filed: November 17, 2021
    Publication date: May 19, 2022
    Inventors: Heping ZENG, Mengyun HU, Chuan YANG, Shuai YUAN
  • Publication number: 20220153639
    Abstract: A method for producing a conductive glass fiber mesh with laser induced coating graphene comprises: (I) preparing a glass fiber paper coated with a carbon-containing precursor material; (II) subjecting the glass fiber paper coated with the carbon-containing precursor material to laser irradiation to reduce the carbon-containing precursor material into the laser induced coating graphene, obtaining a glass fiber paper coated with the laser induced coating graphene; and (III) folding the glass fiber paper coated with the laser induced coating graphene to obtain the conductive glass fiber mesh with laser induced coating graphene.
    Type: Application
    Filed: November 17, 2021
    Publication date: May 19, 2022
    Inventors: Heping ZENG, Chuan YANG, Mengyun HU
  • Patent number: 11331341
    Abstract: Techniques regarding a chemical composition that can be utilized within one or more combination therapies to treat a microbial infection are provided. For example, one or more embodiments described herein can comprise a chemical composition that includes a first triblock polymer comprising a quaternary ammonium functionalized polycarbonate block and exhibiting anticancer activity via a lytic mechanism. The chemical composition can also include a second triblock polymer comprising a guanidinium functionalized polycarbonate block and exhibiting anticancer activity via a translocation mechanism.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: May 17, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James L. Hedrick, Yi Yan Yang, Nathaniel H. Park, Jiayu Leong, Chuan Yang, Xin Ding, Yiran Zhen, Cherylette Anne Alexander, Jye Yng Teo
  • Publication number: 20220147835
    Abstract: A knowledge graph construction system and method are disclosed. The system generates a recommended subject entity, at least one recommended object entity, and at least one recommended relation for a piece of text data according to the text data and a plurality of triples. The system displays the recommended object entity and the recommended relation at a current paragraph of the text data according to the recommended subject entity for user to select. The system receives a confirmed message related to the recommended subject entity, a recommended object entity selected by user from the at least one recommended object entity, and a recommended relation selected by user from the at least one recommended relation. The system adds the recommended subject entity and the selected recommended object entity and recommended relation to the triples, and constructs a current knowledge graph by using the triples according to the confirmed message.
    Type: Application
    Filed: December 3, 2020
    Publication date: May 12, 2022
    Inventors: Hsin-Yi KUO, Wen-Nan WANG, Jia-Wei KAO, Wen-Fa HUANG, Po-Hsien CHIANG, Fu-Jheng JHENG, Yi-Hsiu LEE, Yu-Chuan YANG
  • Patent number: 11329168
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a first semiconductor stack and a second semiconductor stack over a substrate, wherein each of the first and second semiconductor stacks includes semiconductor layers stacked up and separated from each other; a dummy spacer between the first and second semiconductor stacks, wherein the dummy spacer contacts a first sidewall of each semiconductor layer of the first and second semiconductor stacks; and a gate structure wrapping a second sidewall, a top surface, and a bottom surface of each semiconductor layer of the first and second semiconductor stacks.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: May 10, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Chuan Yang, Kuo-Hsiu Hsu
  • Publication number: 20220138508
    Abstract: A device and a method for detecting a purpose of an article are provided. The device is configured to divide the article into a plurality of sentences and input the sentences to a feature identification model to generate a contextualized word vector corresponding to each of the sentences. The device further inputs the representation to a specific purpose detecting model to generate a distributed representation similarity of the article. When the distributed representation similarity of the article is greater than a threshold, the device determines that the article conforms to a specific purpose.
    Type: Application
    Filed: November 29, 2020
    Publication date: May 5, 2022
    Inventors: Chu-Chun HUANG, Yu-Chuan YANG, Yen-Heng TSAO, Tzu-Ying CHEN, Po-Hsien CHIANG, Fu-Jheng JHENG
  • Publication number: 20220130971
    Abstract: Methods and devices that provide a first fin structure, a second fin structure, and a third fin structure disposed over a substrate. A dielectric fin is formed between the first fin structure and the second fin structure, and a conductive line is formed between the second fin structure and the third fin structure.
    Type: Application
    Filed: October 27, 2020
    Publication date: April 28, 2022
    Inventors: Chih-Chuan Yang, Jing-Yi Lin, Hsin-Wen Su, Shih-Hao Lin
  • Publication number: 20220111115
    Abstract: There is provided a bone cement composition comprising: a powder component comprising at least one acrylic polymer a liquid component comprising a monomer; an antibiotic; and an acid-functionalised polymer, wherein reaction of the powder component and the liquid component results in formation of a bone cement. In a preferred embodiment, the acid-functionalised polymer is selected from polyethylene glycol-polycarbonate (PEG-PAC), polycarbonate-poly(L-lactide) (PAC-PLLA), polycarbonate-poly(D-lactide) (PAC-PDLA), PAC-PLLA/PDLA, copolymers thereof or a combination thereof. There is also provided a bone cement formed from the bone cement composition.
    Type: Application
    Filed: July 30, 2019
    Publication date: April 14, 2022
    Applicants: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH, NATIONAL UNIVERSITY OF SINGAPORE
    Inventors: Yi Yan YANG, Zhen Chang LIANG, Chuan YANG, Ee Jen Wilson WANG
  • Publication number: 20220115387
    Abstract: A semiconductor device and method of fabricating thereof where the device includes a fin structure between a first isolation region and a second isolation region. A first source/drain feature is formed over a recessed portion of the first fin structure. The first source/drain feature interfaces a top surface of the first isolation region for a first distance and interfaces the top surface of the second isolation region for a second distance. The first distance is different than the second distance. The source/drain feature is offset in a direction.
    Type: Application
    Filed: October 14, 2020
    Publication date: April 14, 2022
    Inventors: Chih-Chuan Yang, Chia-Hao PAO, Wen-Chun Keng, Lien Jung Hung, Ping-Wei Wang
  • Publication number: 20220102535
    Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, a semiconductor structure includes a source feature and a drain feature, a channel structure disposed between the source feature and the drain feature, a semiconductor layer disposed over the channel structure and the drain feature, a dielectric layer disposed over the semiconductor layer, a backside source contact over the source feature and extending through the semiconductor layer and the dielectric layer, and a backside power rail disposed over the dielectric layer and in contact with the backside source contact.
    Type: Application
    Filed: September 29, 2020
    Publication date: March 31, 2022
    Inventors: Pei-Wei Wang, Chih-Chuan Yang, Yu-Kuan Lin, Choh Fei Yeap
  • Publication number: 20220102359
    Abstract: A memory device includes a substrate, first semiconductor fin, second semiconductor fin, first gate structure, second gate structure, first gate spacer, and a second gate spacer. The first gate structure crosses the first semiconductor fin. The second gate structure crosses the second semiconductor fin, the first gate structure extending continuously from the second gate structure, in which in a top view of the memory device, a width of the first gate structure is greater than a width of the second gate structure. The first gate spacer is on a sidewall of the first gate structure. The second gate spacer extends continuously from the first gate spacer and on a sidewall of the second gate structure, in which in the top view of the memory device, a width of the first gate spacer is less than a width of the second gate spacer.
    Type: Application
    Filed: September 28, 2020
    Publication date: March 31, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Wen SU, Chih-Chuan YANG, Shih-Hao LIN, Yu-Kuan LIN, Lien-Jung HUNG, Ping-Wei WANG
  • Publication number: 20220091361
    Abstract: A camera system includes a camera lens assembly, a motor circuit board, and an image sensor, where the motor circuit board and the camera lens assembly each have a light passing hole, the camera lens assembly is located between the image sensor and the motor circuit board, a light-sensitive surface of the image sensor is located on an image side of the camera lens assembly, and the motor circuit board is located on an object side of the camera lens assembly.
    Type: Application
    Filed: December 6, 2021
    Publication date: March 24, 2022
    Inventors: Feng Zhen, Li-Te Kuo, Chuan Yang, Ruiming Ding, Jun Xie
  • Publication number: 20220093622
    Abstract: A method for forming a semiconductor device includes forming a metal layer and a spacer adjacent to the metal layer. The spacer includes a composite-dielectric layer including a composite-dielectric material. A composition of the composite-dielectric material is a mixture of a composition of a first dielectric material and a composition of a second dielectric material different from the first dielectric material.
    Type: Application
    Filed: December 3, 2021
    Publication date: March 24, 2022
    Inventors: Liheng LIU, Chuan YANG, Shuangshuang PENG
  • Publication number: 20220076740
    Abstract: One aspect of this description relates to a memory cell. In some embodiments, the memory cell includes a first gate structure, a second gate structure, a third gate structure, a fourth gate structure, and a fifth gate structure that each extend along a first lateral direction, a first active structure extending along a second lateral direction and overlaid by respective first portions of the first to fourth gate structures, a second active structure extending along the second lateral direction and overlaid by respective second portions of the first to fourth gate structures, and a third active structure extending along the second lateral direction and overlaid by respective third portions of the third and fifth gate structures. In some embodiments, the first and second gate structures are aligned with each other, with the fourth and fifth gate structures aligned with a first segment and a second segment of the third gate structure, respectively.
    Type: Application
    Filed: November 17, 2021
    Publication date: March 10, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chih-Chuan Yang, Feng-Ming Chang, Kuo-Hsiu Hsu, Ping-Wei Wang
  • Patent number: 11264268
    Abstract: A method includes receiving a structure that includes a substrate including a first well region having a first dopant type and a second well region having a second dopant type that is opposite to the first dopant type; and fins extending above the substrate. The method further includes forming a patterned etch mask on the structure, wherein the patterned etch mask provides an opening that is directly above a first fin of the fins, wherein the first fin is directly above the first well region. The method further includes etching the structure through the patterned etch mask, wherein the etching removes the first fin and forms a recess in the substrate that spans from the first well region into the second well region; and forming a dielectric material between remaining portions of the fins and within the recess.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: March 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MTAIWANANUFACTURING CO., LTD.
    Inventors: Chih-Chuan Yang, Chang-Ta Yang