Abstract: A method for formation of a vaccine comprising combining a cationic polymer adjuvant with an antigen to form first immunoparticles through charge interactions and producing a treatment formulation for the vaccine comprising the first immunoparticles.

Abstract: A static random-access memory (SRAM) semiconductor device including a memory unit is provided. The memory unit includes a bit array arranged in rows and columns. The columns are defined by a plurality of bit line pairs connecting to a plurality of memory cells in the column. The memory unit also includes an edge area adjacent an edge row of the bit array, wherein the edge row includes a plurality of dummy memory cells. The memory unit further includes a plurality of bit line drivers adjacent the bit array and opposite the edge area. The bit line drivers are for driving the bit lines with data to the memory cells during a write operation. The dummy memory cells include a write assist circuit for each bit line pair. The write assist circuit is used for facilitating the writing of the data on the bit line pairs to the memory cells.

Abstract: One aspect of this description relates to a memory cell including a first layer including a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure. The memory cell includes a second layer including a first active structure and a second active structure. The first gate structure overlaps the first active structure to form a first access transistor, the second gate structure overlaps the first active structure to form a first pull-down transistor, the third gate structure overlaps the first active structure to form a second pull-down transistor, and the fourth gate structure overlaps the first active structure to form a second access transistor. The second gate structure overlapping the second active structure to form a first pull-up transistor, the third gate structure overlapping the second active structure to form a second pull-up transistor.

Abstract: Embodiments of a three-dimensional (3D) memory device with a corrosion-resistant composite spacer and method for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack disposed on the substrate and including a plurality of conductor/dielectric layer pairs, a plurality of memory strings each extending vertically through the memory stack, a slit contact disposed laterally between the plurality of memory strings, and a composite spacer disposed laterally between the slit contact and at least one of the memory strings. The composite spacer includes a first silicon oxide film, a second silicon oxide film, and a dielectric film disposed laterally between the first silicon oxide film and the second silicon oxide film.

Abstract: In some examples, an infrared emitter is provided with a heating layer sandwiched by top and bottom optical layers that allow only narrow-band infrared light to pass through. A reflective layer may be further provided below the bottom optical layers. This configuration greatly reduces the energy loss and can be manufactured with simple method and low cost.

Abstract: A plurality of holes are formed extending vertically in a first dielectric deck that includes interleaved a plurality of first sacrificial layers and a plurality of first dielectric layers over a substrate. A plurality of sacrificial structures are formed in the holes. A second dielectric deck is formed having interleaved a plurality of second sacrificial layers and a plurality of second dielectric layers over the first dielectric deck. A slit opening is formed extending in the second dielectric deck, the slit opening aligned with and over the sacrificial source contact structures. The sacrificial structures are removed through the slit openings such that the slit opening is in contact with the holes to form a slit structure. A plurality of conductor layers are formed in the first and second dielectric decks through the slit structure, forming a memory stack. A source contact structure is formed in the slit structure.

Abstract: A camera assembly and a mobile terminal comprise an optical image stabilization motor with relatively large electromagnetic radiation, for example, a SMA motor. The SMA motor could be disposed on a lighting side of the lens assembly. Because an image sensor is located on an imaging side of the lens assembly, this can achieve a relatively long physical distance between the SMA motor and the image sensor, thereby reducing electromagnetic interference caused by the SMA motor to the image sensor.

Abstract: A semiconductor device comprises a memory macro including a well pick-up (WPU) area oriented lengthwise along a first direction, and memory bit areas adjacent to the WPU area. In the WPU area, the memory macro includes n-type and p-type wells arranged alternately along the first direction with well boundaries between adjacent wells; gate structures over the wells and oriented lengthwise along the first direction; a first dielectric layer disposed at each of the well boundaries; first contact features disposed over one of the p-type wells; and second contact features disposed over one of the n-type wells. From a top view, the first dielectric layer extends along a second direction perpendicular to the first direction and separates all the gate structures in the first WPU area, the first contact features are disposed between the gate structures, and the second contact features are disposed between the gate structures.

Abstract: A device and a method for direct printing of a microfluidic chip based on a large-format array femtosecond laser. The large-format array femtosecond laser with multi-parameter adjustable laser beam state is used to achieve large-format laser interference. The interference state, interference combination and exposure mode of the large-format array femtosecond laser are regulated, and multiple exposures are superimposed to output the desired pattern for the microfluidic chip, enabling the direct printing processing of the microfluidic chip.

Abstract: Techniques regarding a chemical composition that can be utilized within one or more combination therapies to treat a microbial infection are provided. For example, one or more embodiments described herein can comprise a chemical composition that includes a first triblock polymer comprising a quaternary ammonium functionalized polycarbonate block and exhibiting anticancer activity via a lytic mechanism. The chemical composition can also include a second triblock polymer comprising a guanidinium functionalized polycarbonate block and exhibiting anticancer activity via a translocation mechanism.

Abstract: Methods and devices including a plurality of memory cells and a first bit line connected to a first column of memory cells of the plurality of memory cells, and a second bit line connected to the first column of cells. The first bit line is shared with a second column of memory cells adjacent to the first column of memory cells. The second bit line is shared with a third column of cells adjacent to the first column of cells opposite the second column of cells.

Abstract: Techniques regarding polymers with antimicrobial functionality are provided. For example, one or more embodiments described herein can regard a polymer, which can comprise a repeating ionene unit. The repeating ionene unit can comprise a cation distributed along a degradable backbone. The degradable backbone can comprise a terephthalamide structure. Further, the repeating ionene unit can have antimicrobial functionality.

Abstract: A method for processing a micro-channel of a micro-fluidic chip using multi-focus ultrafast laser, in which an array-type multi-focus femtosecond laser is used to perform fractional ablation on the micro-fluidic chip, and then pulse laser is used to perform secondary ablation on the micro-fluidic chip. Ultrasonic-assisted hydrofluoric acid etching is performed on the micro-fluidic chip after ablation to obtain a true three-dimensional micro-channel on the micro-fluidic chip. A device for processing a micro-channel of a micro-fluidic chip using multi-focus ultrafast laser is also provided.

Abstract: Embodiments of the invention are directed to a macromolecular chemotherapeutic. A non-limiting example of the macromolecular chemotherapeutic includes a block copolymer. The block copolymer can include a water-soluble block, a cationic block, and a linker, wherein the linker is connected to the water-soluble bock and the charged block.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC) having a device section and a pick-up section. The IC includes a semiconductor substrate. A first fin of the semiconductor substrate is disposed in the device section. A second fin of the semiconductor substrate is disposed in the pick-up section and laterally spaced from the first fin in a first direction. A gate structure is disposed in the device section and laterally spaced from the second fin in the first direction. The gate structure extends laterally over the semiconductor substrate and the first fin in a second direction perpendicular to the first direction. A pick-up region is disposed on the second fin. The pick-up region continuously extends from a first sidewall of the second fin to a second sidewall of the second fin. The first sidewall is laterally spaced from the second sidewall in the first direction.

Abstract: An N-type metal oxide semiconductor (NMOS) transistor includes a first gate and a first spacer structure disposed on a first sidewall of the first gate in a first direction. The first spacer structure has a first thickness in the first direction and measured from an outermost point of an outer surface of the first spacer structure to the first sidewall. A P-type metal oxide semiconductor (PMOS) transistor includes a second gate and a second spacer structure disposed on a second sidewall of the second gate in the first direction and measured from an outermost point of an outer surface of the second spacer structure to the second sidewall. The second spacer structure has a second thickness that is greater than the first thickness. The NMOS transistor is a pass-gate of a static random access memory (SRAM) cell, and the PMOS transistor is a pull-up of the SRAM cell.

Abstract: Nanostructure field-effect transistors (NSFETs) including isolation layers formed between epitaxial source/drain regions and semiconductor substrates and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a semiconductor substrate; a gate stack over the semiconductor substrate, the gate stack including a gate electrode and a gate dielectric layer; a first epitaxial source/drain region adjacent the gate stack; and a high-k dielectric layer extending between the semiconductor substrate and the first epitaxial source/drain region, the high-k dielectric layer contacting the first epitaxial source/drain region, the gate dielectric layer and the high-k dielectric layer including the same material.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming an epitaxial structure having a first doping type over a first portion of a semiconductor substrate. A second portion of the semiconductor substrate is formed over the epitaxial structure and the first portion of the semiconductor substrate. A first doped region having the first doping type is formed in the second portion of the semiconductor substrate and directly over the epitaxial structure. A second doped region having a second doping type opposite the first doping type is formed in the second portion of the semiconductor substrate, where the second doped region is formed on a side of the epitaxial structure. A plurality of fins of the semiconductor substrate are formed by selectively removing portions of the second portion of the semiconductor substrate.

Abstract: A three-dimensional (3D) NAND memory device is provided. The device comprises an alternating stack including a plurality of dielectric/conductive layer pairs each comprising a dielectric layer and a conductive layer. The device further comprises a conductive wall vertically penetrating through the alternating stack and extending in a horizontal direction, and a spacer layer on sidewalls of the conductive wall configured to insulate the conductive wall from the conductive layers of the alternating stack. The spacer layer comprises a first spacer sublayer having a first dielectric material, a second spacer sublayer having a second dielectric material, and a third spacer sublayer having a third dielectric material. The second spacer is sandwiched between the first spacer sublayer and the third spacer sublayer. A second k-value of the second dielectric material is higher than a first k-value of the first dielectric material and higher than a third k-value of the third dielectric material.

Abstract: Techniques regarding guanidinium functionalized polylysine polymers that can have antimicrobial and/or anticancer activity are provided. For example, one or more embodiments described herein can comprise a chemical composition, which can comprise a polymer comprising a molecular backbone covalently bonded to a pendent guanidinium functional group, wherein the molecular backbone can comprise a polylysine structure.