Abstract: Techniques regarding guanidinium functionalized polylysine polymers that can have antimicrobial and/or anticancer activity are provided. For example, one or more embodiments described herein can comprise a chemical composition, which can comprise a polymer comprising a molecular backbone covalently bonded to a pendent guanidinium functional group, wherein the molecular backbone can comprise a polylysine structure.

Abstract: Techniques regarding polymers with antimicrobial functionality are provided. For example, one or more embodiments described herein can regard a polymer, which can comprise a repeating ionene unit. The repeating ionene unit can comprise a cation distributed along a degradable backbone. The degradable backbone can comprise a terephthalamide structure. Further, the repeating ionene unit can have antimicrobial functionality.

Abstract: Test structures on a wafer are provided. A plurality of cells are arranged in rows and columns of a test array. First and second output pads are formed on opposite sides of the test array. A first output pad is coupled to the cells in one half of the rows of the test array. A second output pad is coupled to the cells in the other half of the rows of the test array. Each first input pad is coupled to the cells in respective column of the test array. Each second input pad is coupled to the cells in respective row of the test array. When a first voltage is applied to one of the first input pads and a second voltage is applied to one of the second input pads, current flowing through the turned-on cell is measured through the first or second output pad.

Abstract: A portable eating utensil includes first and second shells, which is docked to accommodate an eating utensil. The first shell includes a first slot and a first protrusion on a side facing the second shell. The second shell includes a movable buckle. The buckle includes a second slot and a second protrusion on a side facing the first shell. When the first and second shells are docked, the buckle is moved to an unlocked position, such that the first protrusion leaves the second slot, the second protrusion leaves the first slot, and the first protrusion leaves the second protrusion to unlock the first and second shells. The buckle is moved to a locked position, such that the first protrusion is embedded into the second slot, the second protrusion is embedded into the first slot, and the first and second protrusions prop against to fix the first and second shells.

Abstract: A semiconductor device comprises a memory macro including a well pick-up (WPU) area oriented lengthwise along a first direction, and memory bit areas adjacent to the WPU area. In the WPU area, the memory macro includes n-type and p-type wells arranged alternately along the first direction with well boundaries between adjacent wells; gate structures over the wells and oriented lengthwise along the first direction; a first dielectric layer disposed at each of the well boundaries; first contact features disposed over one of the p-type wells; and second contact features disposed over one of the n-type wells. From a top view, the first dielectric layer extends along a second direction perpendicular to the first direction and separates all the gate structures in the first WPU area, the first contact features are disposed between the gate structures, and the second contact features are disposed between the gate structures.

Abstract: A method includes forming a first fin protruding from a substrate in a first region of the substrate and a second fin protruding from the substrate in a second region of the substrate, recessing a portion of the first fin, thereby forming a first recess, recessing a portion of the second fin, thereby forming a second recess, depositing a blocking layer in the second recess, growing a base epitaxial layer in the first recess, removing the blocking layer from the second recess, and growing a doped epitaxial layer in the first recess and the second recess. The base epitaxial layer is dopant free. The doped epitaxial layer abuts the first fin in the first region and the second fin in the second region.

Abstract: Semiconductor structures and methods are provided. A method according to the present disclosure includes forming a first channel member, a second channel member directly over the first channel member, and a third channel member directly over the second channel member, depositing a first metal layer around each of the first channel member, the second channel member, and the third channel member, removing the first metal layer from around the second channel member and the third channel member while the first channel member remains wrapped around by the first metal layer, after the removing of the first metal layer, depositing a second metal layer around the second channel member and the third channel member, removing the second metal layer from around the third channel member, and after the removing of the second metal layer, depositing a third metal layer around the third channel member.

Abstract: An integrated circuit device includes a FinFET disposed over a doped region of a first type dopant, wherein the FinFET includes a first fin structure and first source/drain (S/D) features, the first fin structure having a first width; and a fin-based well strap disposed over the doped region of the first type dopant, wherein the fin-based well strap includes a second fin structure and second S/D features, the second fin structure having a second width that is larger than the first width, wherein the fin-based well strap connects the doped region to a voltage.

Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin over a substrate; forming a first gate structure over the substrate and crossing the first semiconductor fin; forming a second gate structure over the substrate and crossing the second semiconductor fin; forming a first gate spacer on a sidewall of the first gate structure; and forming a second gate spacer on a sidewall of the second gate structure, wherein in a top view, an outer sidewall of the first gate spacer farthest from the first gate structure is coterminous with an outer sidewall of the second gate spacer farthest from the second gate structure, and an inner sidewall of the first gate spacer in contact with the first gate structure is misaligned with an inner sidewall of the second gate spacer in contact with the second gate structure.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first set of nanostructures stacked over a substrate and spaced apart from one another, a second set of nanostructures stacked over the substrate and spaced apart from one another, a first source/drain feature adjoining the first set of nanostructures, a second source/drain feature adjoining the second set of nanostructures, a first contact plug landing on and partially embedded in the first source/drain feature, and a second contact plug landing on and partially embedded in the second source/drain feature. A bottom of the first contact plug is lower than a bottom of the second contact plug.

Abstract: Embodiments of structure and methods for forming a memory device are provided. In an example, a memory device includes a substrate, a stack above the substrate, a channel structure, and a source contact structure each extending vertically through the memory stack. The source contact structure includes (i) a plurality of first source contact portions each extending vertically and laterally separated from one another and (ii) a second source contact portion extending vertically over and in contact with the plurality of first source contact portions, the second source contact portion being laterally continuous.

Abstract: One aspect of this description relates to a memory cell. In some embodiments, the memory cell includes a first gate structure, a second gate structure, a third gate structure, a fourth gate structure, and a fifth gate structure that each extend along a first lateral direction, a first active structure extending along a second lateral direction and overlaid by respective first portions of the first to fourth gate structures, a second active structure extending along the second lateral direction and overlaid by respective second portions of the first to fourth gate structures, and a third active structure extending along the second lateral direction and overlaid by respective third portions of the third and fifth gate structures. In some embodiments, the first and second gate structures are aligned with each other, with the fourth and fifth gate structures aligned with a first segment and a second segment of the third gate structure, respectively.

Abstract: A disability level automatic judgment device is disclosed. The disability level automatic judgment device includes a processor and a memory. The processor is configured to create a diagnosis information graph according to a diagnosis content, to compare the diagnosis information graph and a standard disability graph, so as to determine a first disability level, and to generate a judgment result according to the first disability level. The memory is coupled to the processor, and the memory is configured to store the standard disability graph.

Abstract: A portable eating utensil includes first and second shells, which is docked to accommodate an eating utensil. The first shell includes a first slot and a first protrusion on a side facing the second shell. The second shell includes a movable buckle. The buckle includes a second slot and a second protrusion on a side facing the first shell. When the first and second shells are docked, the buckle is moved to an unlocked position, such that the first protrusion leaves the second slot, the second protrusion leaves the first slot, and the first protrusion leaves the second protrusion to unlock the first and second shells. The buckle is moved to a locked position, such that the first protrusion is embedded into the second slot, the second protrusion is embedded into the first slot, and the first and second protrusions prop against to fix the first and second shells.

Abstract: A semiconductor device according to the present disclosure includes a first source/drain feature, a second source/drain feature, a third source/drain feature, a first dummy fin disposed between the first source/drain feature and the second source/drain feature along a direction to isolate the first source/drain feature from the second source/drain feature, and a second dummy fin disposed between the second source/drain feature and the third source/drain feature along the direction to isolate the second source/drain feature from the third source/drain feature. The first dummy fin includes an outer dielectric layer, an inner dielectric layer over the outer dielectric layer, and a first capping layer disposed over the outer dielectric layer and the inner dielectric layer. The second dummy fin includes a base portion and a second capping layer disposed over the base portion.

Abstract: A semiconductor device structure includes nanostructures disposed over a substrate. The structure also includes a gate structure surrounding the nanostructures. The structure also includes inner spacers disposed over opposite sides of the gate structure. The structure also includes source/drain epitaxial structure disposed over opposite sides of the nanostructures. An air gap is disposed between the inner spacers and the source/drain epitaxial structure.

Abstract: A method for forming a semiconductor device includes forming a metal layer and a spacer adjacent to the metal layer. The spacer includes a composite-dielectric layer including a composite-dielectric material. A composition of the composite-dielectric material is a mixture of a composition of a first dielectric material and a composition of a second dielectric material different from the first dielectric material.

Abstract: A process for preparing a graphene quantum material includes: providing a carbon-containing precursor; decomposing the carbon-containing precursor with ultra-fast laser to obtain the graphene quantum material; optionally reducing graphene oxide into graphene with laser; and optionally subjecting the graphene quantum material to microwave heating.

Abstract: A car safety device for pets includes a fixing frame mounted in a seat cushion and a seat cushion cover. The seat cushion with the fixing frame is placed into the seat cushion cover and one end of a support rod of the fixing frame is protruding from the seat cushion cover. While in use, the device is placed on a car seat and an anchor member on the support rod of the fixing frame is connected to a support bar of the car seat. Then a pet carrier bag is disposed on the seat cushion cover and a second connecting member of the pet carrier bag is connected with a first connecting member on the seat cushion cover to fix the pet carrier bag on the present device. Thereby the pet carrier bag is firmly mounted on the car seat and pet safety is improved.

Abstract: Semiconductor structures and methods are provided. A method according to the present disclosure includes forming a first channel member, a second channel member directly over the first channel member, and a third channel member directly over the second channel member, depositing a first metal layer around each of the first channel member, the second channel member, and the third channel member, removing the first metal layer from around the second channel member and the third channel member while the first channel member remains wrapped around by the first metal layer, after the removing of the first metal layer, depositing a second metal layer around the second channel member and the third channel member, removing the second metal layer from around the third channel member, and after the removing of the second metal layer, depositing a third metal layer around the third channel member.