Abstract: Disclosed is a port for a vertical wall, a multi-filter used therein, and a port support frame. In the port a cover is installed in a port body having an interior space. A plurality of body filter holes penetrate the port body. Soil in which plants are set is filled in the interior space. A plurality of vegetation holes through which the plants set in the soil are formed in the cover, and cover filter holes are formed between the vegetation holes at locations corresponding to the body filter holes. Multi-filters penetrate the body filter holes, the cover filter holes, and the soil. A support tubular body forms an outer appearance of the multi-filter, and a filtering case is installed in the support tubular body.

Abstract: Method for detecting hotspots in a circuit layout includes constructing a layout graph having nodes, corner edges and proximity edges from the circuit layout, converting the layout graph to a corresponding dual graph, and iteratively selecting edges and nodes having weights greater than a predetermined threshold value at each iteration as hotspots.

Abstract: Method and apparatus for designing an integrated circuit. A new layout is generated for at least one standard cell that incorporates an auxiliary pattern on a gate layer to facilitate cell-based optical proximity correction. An original placement solution is modified for a plurality of standard cells to permit incorporation of cells containing auxiliary patterns while improving an objective function of a resulting placement solution for the plurality of standard cells.

Abstract: A system and method for searching for musical pieces utilizes a hardware-based music search engine that includes a systolic array of comparison circuits to correlate musical query data for a desired musical piece with at least some of musical information data from a music database to determine potential musical pieces that are candidates for the desired musical piece.

Abstract: A method and system for detailed placement of layout objects in a standard-cell layout design are disclosed. Layout objects comprise cells and etch dummies. The method includes a programming based technique to calculate layout object perturbation distances for the layout objects. The method includes adjusting the layout objects with their corresponding layout object perturbation distances. This leads to improved photolithographic characteristics such as reduced Critical Dimension (CD) errors and forbidden pitches in the standard-cell layout.

Abstract: Method for detecting hotspots in a circuit layout includes constructing a layout graph having nodes, corner edges and proximity edges from the circuit layout, converting the layout graph to a corresponding dual graph, and iteratively selecting edges and nodes having weights greater than a predetermined threshold value at each iteration as hotspots.

Abstract: A method of creating a layout of a set of masks including an alternating phase shifting mask (APSM) and a halftone phase shifting trim mask (HPSTM) is provided. The APSM includes first and second phase shifting areas and a first opaque pattern. The first and second phase shifting areas are disposed adjacent to each other and have different phases for generating destructive interference. Further, the first and second phase shifting areas define an access interconnection line. The first opaque pattern is formed on a transparent substrate to define the first and second phase shifting areas. The HPSTM includes a second opaque pattern on the transparent substrate and a halftone pattern. The second opaque pattern prevents an access interconnection line from being erased. The halftone pattern defines a pass interconnection line connected to the access interconnection line.

Abstract: Method and apparatus for designing an integrated circuit. A new layout is generated for at least one standard cell that incorporates an auxiliary pattern on a gate layer to facilitate cell-based optical proximity correction. An original placement solution is modified for a plurality of standard cells to permit incorporation of cells containing auxiliary patterns while improving an objective function of a resulting placement solution for the plurality of standard cells.

Abstract: An amplifier system is provided for amplifying an input signal to provide an amplified output signal, amplifying an amplified input signal to provide a further amplified output signal, and phase delay compensating variations of the amplifications of the amplified output signal and the further amplified output signal for providing the further amplified output signal with substantially linear amplification under a variable load.

Abstract: A method for forming a temperature-compensated resistor on a semiconductor substrate is provided. A resistor element is formed on the semiconductor substrate. Terminal contacts are formed on the ends of the resistor element. A temperature-compensating configuration is formed, and is selected from an enlarged transverse portion in the resistor element intermediate and spaced from the terminal contacts, and at least one contact pattern along and in contact with the resistor element intermediate and spaced from the terminal contacts.

Abstract: A method and system for detailed placement of layout objects in a standard-cell layout design are disclosed. Layout objects comprise cells and etch dummies. The method includes a programming based technique to calculate layout object perturbation distances for the layout objects. The method includes adjusting the layout objects with their corresponding layout object perturbation distances. This leads to improved photolithographic characteristics such as reduced Critical Dimension (CD) errors and forbidden pitches in the standard-cell layout.

Abstract: A circuit and method for transmitting an output signal utilizes an inductive device connected in series with a microelectromechanical systems (MEMS) varactor to increase the potential difference across the MEMS varactor due to the output signal by introducing inductance-capacitance resonant behavior. The MEMS varactor is configured to be actuated exclusively by the output signal to effectuate a change in capacitance of the MEMS varactor. The MEMS varactor is used to provide a variable impedance transformation.

Abstract: A phase edge phase shift mask and a fabrication method thereof for enforcing a width of a field gate image located on a field region, which is weakened by a two exposure process, by using a phase shift mask and a trim mask on a semiconductor substrate, and enforcing a width of the field gate image to maximize a current driving capability of the semiconductor device.

Abstract: An impedance transformation network, power amplifier and method for efficiently transmitting an output signal utilizes a series varactor device to provide a variable impedance transformation. The series varactor device may include a number of stacked ferroelectric varactors that function as a variable capacitor to provide the variable impedance transformation in response to the power level of the output signal.

Abstract: A set of masks including an alternating phase shifting mask (APSM) and a halftone phase shifting trim mask (HPSTM) is provided. The APSM includes first and second phase shifting areas and a first opaque pattern. The first and second phase shifting areas are disposed adjacent to each other and have different phases for generating destructive interference. Further, the first and second phase shifting areas define an access interconnection line. The first opaque pattern is formed on a transparent substrate to define the first and second phase shifting areas. The HPSTM includes a second opaque pattern on the transparent substrate and a halftone pattern. The second opaque pattern prevents an access interconnection line from being erased. The halftone pattern defines a pass interconnection line connected to the access interconnection line.

Abstract: A set of masks including an alternating phase shifting mask (APSM) and a halftone phase shifting trim mask (HPSTM) is provided. The APSM includes first and second phase shifting areas and a first opaque pattern. The first and second phase shifting areas are disposed adjacent to each other and have different phases for generating destructive interference. Further, the first and second phase shifting areas define an access interconnection line. The first opaque pattern is formed on a transparent substrate to define the first and second phase shifting areas. The HPSTM includes a second opaque pattern on the transparent substrate and a halftone pattern. The second opaque pattern prevents an access interconnection line from being erased. The halftone pattern defines a pass interconnection line connected to the access interconnection line.

Abstract: An integrated circuit (IC) with high electron mobility transistors, such as enhancement mode pseudomorphic high electron mobility transistors (E-pHEMTs) and method for fabricating the IC utilizes an increased gate-to-drain etch recess spacing in some of the high electron mobility transistors to provide on-chip electrostatic discharge protection. The use of the increased gate-to-drain etch recess spacing allows smaller high electron mobility transistors to be used for ancillary low speed applications on the IC, which reduces the chip area occupied by these ancillary transistors.

Abstract: A passive interface circuit for coupling an output signal from a power amplifier to a load is disclosed. The interface presents an impedance to the power amplifier that increases as the power level in the output signal decreases. In one embodiment, the interface circuit includes a fixed network and a capacitor having a capacitance that varies with the potential across the capacitor. The fixed network couples the output signal to the load. The capacitor is connected in parallel with the load and has a capacitance that increases in response to an increase in potential across the capacitor. The capacitor is preferably a MEM capacitor having plates that move with respect to one another in response to changes in the average potential difference between the plates.

Abstract: Disclosed is an anti-fatigue and nutritious tonic agent containing powder of wild ginseng, optionally in admixture with a herb medicine, or water extract of the powder, which has remarkably enhanced anti-fatigue, and nutrition and tonic effects as compared with agents containing cultivated ginseng.

Abstract: A meter for measuring the root-mean-squared potential of an AC signal characterized by a frequency f is disclosed. The meter includes first and second capacitors. The AC signal is applied to the first capacitor, which includes first and second plates separated by a distance that depends on the root-mean-squared potential of the AC signal, but not on changes in the AC signal that occur over a time of 1/f. The second capacitor has first and second plates separated by a distance that depends on the separation of the first and second plates in the first capacitor. A detection circuit measures the capacitance of the second capacitor. The first plate of the first capacitor is preferably connected to the first plate of the second capacitor by a non-conducting mechanical link.