Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.

Abstract: A semiconductor device includes a processor configured to perform a rendering operation of an image frame to acquire rendering data, and write the acquired rendering data on a memory device, and a display controller configured to perform a read operation of the memory device on which the rendering data is written, to acquire image data. The semiconductor device further includes a micro-sequencing circuit configured to transmit a start signal to the display controller, based on a degree of execution of the rendering operation. The display controller is further configured to, based on the transmitted start signal, start the read operation.

Abstract: Disclosed are semiconductor devices and their fabrication methods. The method includes forming an etching target on a substrate including cell and key regions, forming lower and upper mask layers on the etching target, performing photolithography to form an upper mask pattern including a hole on the cell region, a preliminary key pattern on the key region, a bar pattern on the key region, and a trench between the preliminary key pattern and the bar pattern, forming pillar and dam patterns filling the hole and the trench, performing photolithography to remove the upper mask pattern except for the bar pattern, using the pillar pattern, the dam pattern, and the bar pattern as an etching mask to form a lower mask pattern, and using the lower mask pattern as an etching mask to form an etching target pattern on the cell region and a key pattern on the key region.

Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.

Abstract: The cable support module according to an illustrative embodiment of the present invention comprises: a metal plate which is flexible and the bending position varies along the length direction; fixing blocks which are fastened to the metal plate and wrapped around the top surface and bottom surface of the metal plate, and a plurality of fixing blocks are arranged at fixed intervals along the length direction of the metal plate; and connection blocks which have openings on one side surface that expose the accommodation groove therein so as to be fit-coupled to each fixing block together with the metal plate, and a plurality of the connection blocks are arranged in series next to each other so as to be continuously connected such that mutual rotation is possible, wherein the connection blocks can be coupled to each fixing block in a zig-zag from left to right on both sides along the length direction of the metal plate, and can be alternately connected together in a zig-zag along the length direction of the metal

Abstract: A biometric authentication smart card may include a biometric authentication sensor configured to sense at least two types of biometric information of a user and to generate raw images therefrom; and processing circuitry configured to, generate a matching template including biometric features based on the raw images, select a user index from among a plurality of user indices based on the matching template, and output, to a payment terminal, payment class information and payment means information set adaptively for the user index.

Abstract: Provided is a composition for forming a hard coating layer, which includes an epoxy siloxane resin, a crosslinking agent including a compound having an alicyclic epoxy group, a thermal initiator including a compound represented by Chemical Formula 2, and a photoinitiator to decrease curls and increase hardness of the hard coating film.

Abstract: Provided is a hard coating film including a polyamideimide substrate layer and a hard coating layer, each of which has a predetermined refractive index, with a difference in the refractive index between those layers being 0.05. The substrate layer has a tensile modulus of 3 to 7 GPa, at a thickness of 80 ?m, as measured according to ASTM D111. The present invention relates to a hard coating film having improved mechanical and optical properties.

Abstract: An optical gene biosensor is disclosed. The optical gene biosensor includes a substrate; a molecular beacon anchored to the substrate, wherein the molecular beacon includes an oligonucleotide specifically binding to a target nucleic acid molecule and a first compound bound to a first terminal of the oligonucleotide; an optical marker specifically binding to the first compound, wherein the optical marker is configured to retro-reflect irradiated light; a light source for irradiating the optical marker with light; and a light-receiver for receiving light retro-reflected from the optical marker. The optical gene biosensor may perform accurate quantitative analysis of a target nucleic acid molecule using both non-spectral and spectral light sources.

Abstract: A random number generator generates a random number by using at least two algorithms. A security device includes the random number generator. The random number generator includes a random seed generator and a post processor. The random seed generator is configured to receive an entropy signal and to generate a random seed of a digital region generated by using the entropy signal. The post processor is configured to generate a random number from the random seed by using a first algorithm and a second algorithm. A bias property represents unbiasedness of a result value, and a bias property of the first algorithm is different from a bias property of the second algorithm.

Abstract: A method of operating a payment device for selectively enabling a payment function according to the validity of a host is provided. The method relates to a method of operating the payment device which includes a near field communication controller (NFCC) and a host communicating with the NFCC. The method selectively enables the payment function according to the validity of the host, thereby preventing illegal or unwanted payment.

Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.

Abstract: A semiconductor device includes a processor configured to perform a rendering operation of an image frame to acquire rendering data, and write the acquired rendering data on a memory device, and a display controller configured to perform a read operation of the memory device on which the rendering data is written, to acquire image data. The semiconductor device further includes a micro-sequencing circuit configured to transmit a start signal to the display controller, based on a degree of execution of the rendering operation. The display controller is further configured to, based on the transmitted start signal, start the read operation.

Abstract: A method of operating a payment device for selectively enabling a payment function according to the validity of a host is provided. The method relates to a method of operating the payment device which includes a near field communication controller (NFCC) and a host communicating with the NFCC. The method selectively enables the payment function according to the validity of the host, thereby preventing illegal or unwanted payment.

Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.

Abstract: A memory device includes an address generator which generates a first physical address and a second physical address different from the first physical address. A first nonvolatile memory includes the first physical address, and a second nonvolatile memory includes the second physical address. An attack detecting circuit detects whether the first and second nonvolatile memories are attacked. The attack detecting circuit receives first data from the first nonvolatile memory and receives second data from the second nonvolatile memory, compares the first data and the second data with each other, and determines whether the first and second nonvolatile memories are attacked on the basis of a comparison result of the first data and the second data.

Abstract: Provided is a hard coating film. The hard coating film includes a base layer and a hard coating layer disposed on the base layer and having a pencil hardness of 4H or higher. A surface elongation at break of the hard coating film falls within a predetermined range, as measured by a certain method. The hard coating film shows excellent durability under high-temperature/high-humidity conditions, has no microcracks formed after repeated folding, and shows excellent pencil hardness.

Abstract: Methods and systems of detection of wafer de-chucking in a semiconductor processing chamber are disclosed. Methods and systems of interdiction are also disclosed to prevent hardware and wafer damage during semiconductor fabrication if and when de-chucking is detected. In one embodiment, a de-chucking detection method is based on measuring change in imaginary impedance of a plasma circuit, along with measuring one or both of reflected RF power and arc count. In another embodiment, a possibility of imminent de-chucking is detected even before complete de-chucking occurs by analyzing the signature change in imaginary impedance.

Abstract: Provided is a hard coating film including a polyamideimide substrate layer and a hard coating layer, each of which has a predetermined refractive index, with a difference in the refractive index between those layers being 0.05. The substrate layer has a tensile modulus of 3 to 7 GPa, at a thickness of 80 ?m, as measured according to ASTM D111. The present invention relates to a hard coating film having improved mechanical and optical properties.

Abstract: Disclosed herein is a battery module including a battery cell stack configured to have a structure in which a plurality of battery cells is arranged such that the battery cells are adjacent to each other laterally, a pair of cell frames mounted to opposite ends of the battery cell stack, terminal plates for electrically connecting electrode terminals of the battery cells to each other, and a battery management system (BMS) mounted to one side surface of the battery cell stack in the state in which the BMS is directly connected to the terminal plates.