Patents by Inventor Chul Yoon

Chul Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10600145
    Abstract: An image processor comprises first scaling logic that receives image data comprising a first number of lines and generates first scaled image data by scaling down the image data in a first direction, a rotation buffer that has storage capacity for storing a second number of lines less than the first number of lines and stores the first scaled image data in a rotated state, and second scaling logic that generates second scaled image data by scaling down the first scaled image data in a second direction different from the first direction.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: March 24, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Chul Yoon, Min-Soo Kim, Jae-Sop Kong
  • Patent number: 10580688
    Abstract: Disclosed is a method of fabricating a semiconductor device. The method comprises stacking an etching target layer, a first mask layer, an under layer, and a photoresist layer on a substrate, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, and performing a nitrogen plasma treatment on the photoresist pattern while using the first mask layer as an etching stop layer, the performing continuing until a top surface of the first mask layer is exposed. During the performing, the under layer is etched to form an under pattern below the photoresist pattern.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: March 3, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Chul Yoon, Yeong-Shin Park, Joonghee Kim, Jihee Kim, Dongjun Shin, Kukhan Yoon, Taeseop Choi, Jungheun Hwang
  • Publication number: 20200064518
    Abstract: Provided is a hard coating film in which a hard coating layer having a water contact angle of 90° or less, a high refractive index layer, and a low refractive index layer are laminated on a substrate, the film having suppressed curling, and excellent hardness and antireflection performance.
    Type: Application
    Filed: August 22, 2019
    Publication date: February 27, 2020
    Inventors: Jong Nam Ahn, Tae Sug Jang, Byoung Sun Ko, Jin Su Park, Ho Chul Yoon
  • Publication number: 20200064519
    Abstract: Provided is a hard coating film in which a hard coating layer having a water contact angle of 90° or less, a conductive layer, and a low refractive index layer are laminated on a substrate, the film having excellent hardness, anti-curling property, antireflection performance, antifouling performance, and antistatic performance.
    Type: Application
    Filed: August 22, 2019
    Publication date: February 27, 2020
    Inventors: Jong Nam Ahn, Tae Sug Jang, Byoung Sun Ko, Jin Su Park, Ho Chul Yoon
  • Publication number: 20200062991
    Abstract: Provided is a composition for forming a hard coating layer, which includes an epoxy siloxane resin, a crosslinking agent including a compound having an alicyclic epoxy group, a thermal initiator including a compound represented by a specific chemical formula, a photoinitiator, a fluorine-substituted (meth)acrylate compound, and silica nanoparticles surface-modified with a fluorine compound, and forms a hard coating layer having excellent hardness and antifouling property and suppressing curling.
    Type: Application
    Filed: August 12, 2019
    Publication date: February 27, 2020
    Inventors: Jong Nam Ahn, Byoung Sun Ko, Jin Su Park, Tae Sug Jang, Ho Chul Yoon
  • Publication number: 20200056056
    Abstract: Provided is an antifouling hard coating film including a cured layer of a composition for forming a hard coating layer including an epoxy siloxane resin, disposed on a substrate, and an antifouling layer including a fluorine-substituted silsesquioxane resin, disposed on the cured layer, the antifouling hard coating film having excellent interlayer bonding force, hardness, and antifouling property, and suppressed curling.
    Type: Application
    Filed: August 13, 2019
    Publication date: February 20, 2020
    Inventors: Jong Nam Ahn, Byoung Sun Ko, Jin Su Park, Tae Sug Jang, Ho Chul Yoon
  • Publication number: 20200048462
    Abstract: Provided is a composition for forming a hard coating layer, which includes an epoxy siloxane resin, a crosslinking agent including a compound having an alicyclic epoxy group, a thermal initiator including a compound represented by Chemical Formula 2, and a photoinitiator to decrease curls and increase hardness of the hard coating film.
    Type: Application
    Filed: August 5, 2019
    Publication date: February 13, 2020
    Inventors: Jong Nam Ahn, Byoung Sun Ko, Tae Sug Jang, Jin Su Park, Ho Chul Yoon
  • Patent number: 10510429
    Abstract: A memory device including a memory cell array connected to a first bit line, first word lines, and second word lines, the memory cell array including a first memory cell and a second memory cell, the first memory cell being connected between the first word lines and the first bit line, and the second memory cell being connected between the second word line and the first bit line; a first word line driver configured to drive the first word lines; a second word line driver configured to drive the second word lines; and a test manager configured to drive second word lines to change a capacitance of the first bit line, and after the capacitance of the first bit line is changed, drive first word lines to test the first word lines.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: December 17, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-yong Choi, Kyung-ryun Kim, Woong-dai Kang, Hyun-chul Yoon
  • Patent number: 10497460
    Abstract: A semiconductor memory device may include a memory cell array and an access control circuit. The memory cell array may include a first cell region and a second cell region. The access control circuit may access the first cell region and the second cell region differently in response to a command, an access address and fuse information to identify the first cell region and the second cell region. The command and the address may be provided from an external device.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 3, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyung-Ryun Kim, Hyun-Chul Yoon
  • Patent number: 10490868
    Abstract: A battery pack including: a battery cell assembly in which a plurality of chargeable and dischargeable battery cells are stacked; and a pair of cooling members configured to eliminate heat generated during charging and discharging of the battery cells, wherein the cooling members may include first and second cooling members positioned on first and second surfaces of the battery cell assembly perpendicular to a direction in which the battery cells are stacked, and an inner surface of each of the first cooling member and the second cooling member may be formed with a thermal contact portion with a shape of being in close contact with an outer surface of each of the first and second surfaces of the battery cell assembly for thermal conduction, is provided.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: November 26, 2019
    Assignee: LG CHEM, LTD.
    Inventors: Ho Chol Nam, Hyoung Chul Yoon, Dong Hyun Kim, Seog Jin Yoon
  • Patent number: 10374195
    Abstract: An adhesive film and an organic electronic device including the same are provided. The adhesive film includes: a first bonding layer including a first bonding component layer, a moisture absorbent, and first core shell particles; and a second bonding layer disposed below the first bonding layer and including second core shell particles, which are formed of a different material from the first core shell particles, wherein each of the first core shell particles includes a first shell and a first core surrounded by the first shell and each of the second core shell particles includes a second shell and a second core surrounded by the second shell.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: August 6, 2019
    Assignee: SHINWHA INTERTEK CORP
    Inventors: Sung Chul Yoon, Cheol Heung Ahn, Hwi Yong Lee, Ji Woong Park, Dong Hyun Kim, Geoung Min Shin
  • Patent number: 10373796
    Abstract: A method of inspecting a wafer may include: loading of a wafer onto a stage, the wafer having a plurality of dies thereon; positioning of the wafer such that a plurality of electron beam columns on the wafer respectively face a partial region of each of the plurality of dies on the wafer; scanning the respective partial regions of each of the plurality of dies by using the electron beam columns; and combining a plurality of partial images that are obtained by scanning the partial regions to provide a die image.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: August 6, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Souk Kim, Chung-sam Jun, Woo-seok Ko, Sang-kil Lee, Kwang-il Shin, Yu-sin Yang, Min-chul Yoon
  • Publication number: 20190236754
    Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.
    Type: Application
    Filed: April 9, 2019
    Publication date: August 1, 2019
    Inventors: Sung Chul YOON, Ha Na YANG
  • Patent number: 10357228
    Abstract: An image processing method and an image processing apparatus are provided. The image processing method measures a myocardial performance index (MPI), the image processing method including: obtaining a region of interest (ROI) for measuring the MPI, based on signal levels of an input signal and an output signal of a heart spectrum image; obtaining a plurality of marker areas, within the obtained ROI, wherein at least one marker for measuring the MPI is located in each of the plurality of marker areas, based on at least one from among a feature value of the input signal and a feature value of the output signal; and obtaining the at least one marker for each of the plurality of marker areas.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: July 23, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hee-chul Yoon, Hyun-taek Lee, Hae-kyung Jung
  • Publication number: 20190214295
    Abstract: Disclosed is a method of fabricating a semiconductor device. The method comprises stacking an etching target layer, a first mask layer, an under layer, and a photoresist layer on a substrate, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, and performing a nitrogen plasma treatment on the photoresist pattern while using the first mask layer as an etching stop layer, the performing continuing until a top surface of the first mask layer is exposed. During the performing, the under layer is etched to form an under pattern below the photoresist pattern.
    Type: Application
    Filed: July 17, 2018
    Publication date: July 11, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Chul YOON, Yeong-Shin Park, Joonghee Kim, Jihee Kim, Dongjun Shin, Kukhan Yoon, Taeseop Choi, Jungheun Hwang
  • Patent number: 10311545
    Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: June 4, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Chul Yoon, Ha Na Yang
  • Publication number: 20190138275
    Abstract: A random number generator generates a random number by using at least two algorithms. A security device includes the random number generator. The random number generator includes a random seed generator and a post processor. The random seed generator is configured to receive an entropy signal and to generate a random seed of a digital region generated by using the entropy signal. The post processor is configured to generate a random number from the random seed by using a first algorithm and a second algorithm.
    Type: Application
    Filed: November 7, 2018
    Publication date: May 9, 2019
    Inventors: SUNG-KYOUNG KIM, JOONG-CHUL YOON, SEUNG-WON LEE
  • Publication number: 20190130987
    Abstract: A memory device including a memory cell array connected to a first bit line, first word lines, and second word lines, the memory cell array including a first memory cell and a second memory cell, the first memory cell being connected between the first word lines and the first bit line, and the second memory cell being connected between the second word line and the first bit line; a first word line driver configured to drive the first word lines; a second word line driver configured to drive the second word lines; and a test manager configured to drive second word lines to change a capacitance of the first bit line, and after the capacitance of the first bit line is changed, drive first word lines to test the first word lines.
    Type: Application
    Filed: June 13, 2018
    Publication date: May 2, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-yong CHOI, Kyung-ryun KIM, Woong-dai KANG, Hyun-chul YOON
  • Patent number: 10266777
    Abstract: Disclosed is a method of removing organic acids from crude oil using a gas hydrate inhibitor and a catalyst in crude oil production facilities or oil-refining facilities, in which organic acids can be removed from crude oil by reacting the crude oil with mono-ethylene glycol (MEG), di-ethylene glycol (DEG), tri-ethylene glycol (TEG), methanol or derivatives thereof, as a gas hydrate inhibitor in the presence of a tungstophosphoric acid (TPA) catalyst, whereby the acidity of the crude oil can be lowered by 93% or more, and no catalyst deactivation occurs because magnesium (Mg)-based catalysts are not used. Furthermore, a continuous process is achieved in such a manner that the gas hydrate inhibitor and the catalyst are not discarded but are collected from the crude oil from which organic acids have been removed, and are thus recycled, thereby realizing environmentally friendly, economical and efficient removal of organic acids from crude oil.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: April 23, 2019
    Assignee: Korea Institute of Energy Research
    Inventors: Dong Woo Cho, Jong Nam Kim, Bharat Singh Rana, Hee Tae Beum, Hyung Chul Yoon, Tae Sung Jung, Sang Sup Han
  • Patent number: D879033
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: March 24, 2020
    Assignee: LG Chem, Ltd.
    Inventors: Hyoung Chul Yoon, Kun Joo Yang