Abstract: A semiconductor structure, including a substrate and multiple chips, is provided. The chips are stacked on the substrate. Each of the chips has a first side and a second side opposite to each other. Each of the chips includes a transistor adjacent to the first side and a storage node adjacent to the second side. Two adjacent chips are bonded to each other. The transistor of one of the two adjacent chips is electrically connected to the storage node of the other one of the two adjacent chips to form a memory cell.

Abstract: An integrated circuit designing system includes a non-transitory storage medium, the non-transitory storage medium being encoded with a layout of a standard cell corresponding to a predetermined manufacturing process, the predetermined manufacturing process having a nominal minimum pitch of metal lines along a predetermined direction, the layout of the standard cell having a cell height along the predetermined direction, and the cell height is a non-integral multiple of the nominal minimum pitch. The integrated circuit designing system further includes a hardware processor communicatively coupled with the non-transitory storage medium and configured to execute a set of instructions for generating an integrated circuit layout based on the layout of the standard cell and the nominal minimum pitch.

Abstract: A semiconductor device according to the present disclosure includes a first interconnect structure, a first transistor over the first interconnect structure, a second transistor over the first transistor, and a second interconnect structure over the second transistor. The first transistor includes first nanostructures and a first source region adjoining the first nanostructures. The second transistor includes second nanostructures and a second source region adjoining the second nanostructures. The first source region is coupled to a first power rail in the first interconnect structure, and the second source region is coupled to a second power rail in the second interconnect structure.

Abstract: A display device electrically connectable to an external operation device and a host is provided. The display device includes an imaging unit, a display controller, an image receiving port, a command output port and at least one computing device. The image receiving port obtains image data from the host and transmit to the display controller. The display controller controls the imaging unit to display the image data. The at least one computing device has a host operation mode and a display operation mode. The computing device receives a control command from the external operation device, sends the control command to the host through the command output port in the host operation mode, and sends the control command to the display controller to adjust the display setting in the display operation mode.

Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.

Abstract: An electric connector includes an insulative body, multiple conductive terminals, a shielding sheet, and a shielding shell. The insulative body includes a base and a tongue. The conductive terminals include an upper row of terminals and a lower row of terminals, which are disposed on an upper side and a lower side of the tongue, respectively. The shielding sheet is embedded in the insulative body and located between the upper row of terminals and the lower row of terminals. Two sides of the shielding sheet are extended with an extending section respectively. A distal end of each extending section is folded back to form an engaging portion. The shielding shell is adapted to sheathes the insulative body. Two sides of the shielding shell are respectively provided with an engaging trough engaged with one of the engaging portions to make the shielding shell contact with the shielding sheet.

Abstract: An integrated circuit layout includes a first standard cell and a second standard cell. The first standard cell includes first gate lines arranged along a first direction and extending along a second direction. The second standard cell abuts to one side of the first standard cell along the second direction and includes second gate lines arranged along the first direction and extending along the second direction. A first gate line width of the first gate lines and a second gate line width of the second gate lines are different. A first cell width of the first standard cell and a second cell width of the second standard cell are integral multiples of a default gate line pitch of the first gate lines and the second gate lines. At least some of the second gate lines and at least some of the first gate lines are aligned along the second direction.

Abstract: A projection device, including an illumination system, a control element, a driving element, a light valve, and a projection lens, is provided. The illumination system includes multiple light sources for providing multiple light beams to be combined into an illumination light beam. The driving element respectively drives the light sources in a first mode or a second mode, so that the light beams have respective luminous brightness, and the driving element is switched from the first mode to the second mode according to a first signal. The control element provides the first signal to the driving element according to an optical state or a time state of the projection device. The light valve is adapted to convert the illumination light beam into an image light beam. The projection lens is adapted to project the image light beam out of the projection device.

Abstract: Disclosed is an electronic device, including a first housing, a second housing, and a snap release module. The first housing is provided with a fastening slot. The second housing is provided with an accommodation slot. The snap release module is accommodated in the accommodation slot, and includes a slide member, an elastic component, a hook, and a stop member. The slide member reciprocates in a first axial direction. When the first housing is assembled to the second housing in the second axial direction, the slide member is located at the snap position for the hook to be buckled in the fastening slot, and the first housing presses the stop member so that the stop member abuts against the slide member. When the slide member slides from the snap position to the release position, the stop member stops the slide member and the hook is detached from the fastening slot.

Abstract: A package structure includes a first substrate, a second substrate, a plurality of dies, a plurality of first conductive elements, and a plurality of second conductive elements. The first substrate has a recessed region. The second substrate is disposed in the recessed region and protrudes from the first substrate. The dies are disposed on the first substrate and the second substrate, such that the second substrate is disposed between the first substrate and the dies. The first conductive elements are disposed between the dies and the first substrate. The dies are electrically connected with the first substrate through the first conductive elements. The second conductive elements are disposed between the dies and the second substrate. The dies are electrically connected with the second substrate through the second conductive elements.

Abstract: A semiconductor device includes an oxide semiconductor layer, disposed over a substrate. A source electrode of a metal nitride is disposed on the oxide semiconductor layer. A drain electrode of the metal nitride is disposed on the oxide semiconductor layer. A metal-nitride oxidation layer is formed on a surface of the source electrode and the drain electrode. A ratio of a thickness of the metal-nitride oxidation layer to a thickness of the drain electrode or the source electrode is equal to or less than 0.2.

Abstract: An illumination system provides an illumination beam and includes a red light source, a green light source, a blue light source, a first supplementary light source, a first X-shaped light-splitting assembly, a first light-splitting element, and a light-uniforming element. The red light source provides a red beam. The green light source provides a green beam. The blue light source provides a blue beam. The first supplementary light source provides a first supplementary beam. The first X-shaped light-splitting assembly guides the first supplementary beam and the blue beam to the first light-splitting element. The first light-splitting element guides the red beam, the green beam, the blue beam, and the first supplementary beam to the light-uniforming element. The first supplementary beam is a red supplementary beam or a blue supplementary beam, and the illumination system includes at least five light-emitting elements. A projection apparatus including the above illumination system is also provided.

Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device. The MEMS device includes a first dielectric structure disposed over a first semiconductor substrate, where the first dielectric structure at least partially defines a cavity. A second semiconductor substrate is disposed over the first dielectric structure and includes a movable mass, where opposite sidewalls of the movable mass are disposed between opposite sidewall of the cavity.

Abstract: A method includes: providing a substrate defining a scribe line region and a device region adjacent to the scribe line region; depositing a first mask layer over the device region and the scribe line region; patterning the first mask layer to define a plurality of first areas in the device region and a plurality of second areas in the scribe line region, wherein the first areas and the second areas are parallel and extending in a first direction from a top-view perspective; performing a first ion implantation to form first well regions in the first areas and second well regions in the second areas; coupling conductive pads to the second well regions; and performing a test on the second well regions through the conductive pads.

Abstract: An optoelectronic device comprises an epitaxial stack, comprising a first semiconductor layer, an active layer, and a second semiconductor layer; a trench exposing a portion of the first semiconductor layer; a first insulating layer formed on a side wall of the trench to electrically insulate from the active layer and the second semiconductor layer; a first electrode formed on the trench; a second electrode formed on the second semiconductor layer; a supporting device covering the epitaxial stack; an optical layer covering the first electrode and the second electrode, comprising a plurality of openings corresponding to positions of the first electrodes and the second electrodes; a fifth electrode electrically connected with the first electrode; and a sixth electrode electrically connected with the second electrode, wherein the fifth electrode and the sixth electrode each comprises a side comprising a length longer that of an edge of the epitaxial stack.

Abstract: An illumination system for providing an illumination beam includes red, blue, and green light source modules, a first light combining element, and a light uniforming element. The red light source module includes a first red light emitting element emitting first red light and a second red light emitting element emitting second red light. A peak wavelength of the second red light is greater than a peak wavelength of the first red light. The blue light source module includes a first blue light emitting element emitting first blue light and a second blue light emitting element emitting second blue light. A peak wavelength of the second blue light is less than a peak wavelength of the first blue light. The green light source module generates green light. The first light combining element guides these lights into the light uniforming element, so that the illumination system outputs the illumination beam.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a first vertical structure and a second vertical structure formed over the substrate, and a conductive rail structure between the first and second vertical structures. A top surface of the conductive rail structure can be substantially coplanar with top surfaces of the first and the second vertical structures.

Abstract: A PFM control circuit includes a switching circuit, a slope-decision circuit, a flip-flop, a first and a second comparison circuits. The first comparison circuit outputs a first signal according to an output voltage of a power conversion circuit. The switching circuit outputs a switching signal according to an output current of the power conversion circuit. The slope-decision circuit outputs a slope modulation voltage, and determines a slope modulation voltage with a first or a second slope according to the switching signal. The second comparison circuit outputs the second signal according to the slope modulation voltage. The flip-flop outputs a control signal to the power conversion circuit according to the first and the second signals. When the slope modulation voltage has the first or the second slope, the control signal has a first or a second frequency accordingly. The first frequency is higher than the second frequency.

Abstract: A capacitor structure comprises a substrate having a first side and a second side opposite to the first side; a plurality of first trenches formed on the first side of the substrate; a plurality of second trenches formed on the second side of the substrate; a first capacitor extending along the first side and into the first trenches; and a second capacitor extending along the second side and into the second trenches.

Abstract: A novel distributed graph database is provided that is designed for efficient graph data storage and processing on modern computing architectures. In particular a single node graph database and a runtime & communication layer allows for composing a distributed graph database from multiple single node instances.