Patents by Inventor Chun-Hao Lin

Chun-Hao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190067118
    Abstract: A semiconductor device includes: a substrate having a first region and a second region; a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; a shallow trench isolation (STI) around the first fin-shaped structure and the second fin-shaped structure; a first oxide layer on the first fin-shaped structure; a second oxide layer on and directly contacting the first oxide layer and the STI; and a third oxide layer on the second fin-shaped structure, wherein a thickness of the third oxide layer is less than a thickness of the first oxide layer.
    Type: Application
    Filed: October 30, 2018
    Publication date: February 28, 2019
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Chun-Tsen Lu, Shou-Wei Hsieh
  • Publication number: 20190043964
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a first gate structure and a second gate structure on the fin-shaped structure; forming an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; removing the second gate structure and part of the fin-shaped structure to forma first trench; forming a dielectric layer into the first trench; and planarizing part of the dielectric layer to form a single diffusion break (SDB) structure. Preferably, the top surfaces of the SDB structure and the first gate structure are coplanar.
    Type: Application
    Filed: August 29, 2017
    Publication date: February 7, 2019
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Publication number: 20190043858
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.
    Type: Application
    Filed: August 30, 2017
    Publication date: February 7, 2019
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Publication number: 20190030427
    Abstract: A control circuit of a client-side game console includes: a processor and a storage circuit for storing a computer program product. The processor is arranged to operably execute the computer program product to perform following operations: establishing networking connection between the client-side game console and a master-side game console; receiving client-side input values generated by a user control device of the client-side game console; transmitting the client-side input values to the master-side game console; receiving a target instruction and a pseudo clock indicator value transmitted from the mater-side game console; executing the target instruction in a client-side emulating environment based on the pseudo clock indicator value; and rendering an updated client-side game screen according to execution results of the target instruction and displaying the updated client-side game screen on a display device.
    Type: Application
    Filed: December 7, 2017
    Publication date: January 31, 2019
    Applicant: Realtek Semiconductor Corp.
    Inventors: Chun-Hao LIN, E-Cheng CHENG, Sheng-Kai HUNG, Chien-Kuo CHENG
  • Publication number: 20190030426
    Abstract: A control circuit of a master-side game console includes: a processor and a storage circuit for storing a computer program product.
    Type: Application
    Filed: December 7, 2017
    Publication date: January 31, 2019
    Applicant: Realtek Semiconductor Corp.
    Inventors: Chun-Hao LIN, E-Cheng CHENG, Sheng-Kai HUNG, Chien-Kuo CHENG
  • Publication number: 20180358266
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region; forming a shallow trench isolation (STI) around the first fin-shaped structure; forming a first oxide layer on the first fin-shaped structure; and then forming a second oxide layer on the first oxide layer and the STI.
    Type: Application
    Filed: June 9, 2017
    Publication date: December 13, 2018
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Chun-Tsen Lu, Shou-Wei Hsieh
  • Patent number: 10153210
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region; forming a shallow trench isolation (STI) around the first fin-shaped structure; forming a first oxide layer on the first fin-shaped structure; and then forming a second oxide layer on the first oxide layer and the STI.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: December 11, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Chun-Tsen Lu, Shou-Wei Hsieh
  • Patent number: 10141228
    Abstract: A semiconductor device includes: a fin-shaped structure on a substrate; a single diffusion break (SDB) structure in the fin-shaped structure to divide the fin-shaped structure into a first portion and a second portion; a gate structure on the first portion; and a contact etch stop layer (CESL) adjacent to the gate structure and extending to cover the SDB structure.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: November 27, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Patent number: 10122691
    Abstract: The present disclosure provides a receiving apparatus for preprocessing at least one segment data packet to a data packet. The receiving apparatus includes a packet parser, a data memory, a decrypt engine, a transmission engine, a header processing unit and a controller. The packet parser fetches segment-packet-header information from a segment packet header of each segment data packet. The decrypt engine decrypts an encrypted data of each segment data packet to obtain a segment payload and a QUIC private header including sequence information. The transmission engine transmits the segment payload to a specific location of a system memory. The header processing unit calculates packet information and updates the segment packet header stored in the data memory to generate a packet header. The controller controls the transmission engine based on the sequence information to output the packet header to the system memory for generating the data packet.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: November 6, 2018
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chia-Hung Lin, Chang-Shiuan Yang, Yi-Huei Lei, Chun-Hao Lin
  • Publication number: 20180233504
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A barrier layer is formed in a first region and a second region of a semiconductor substrate. The barrier layer formed in the first region is thinned before a step of forming a first work function layer on the barrier layer. The first work function layer formed on the first region is then removed. The process of thinning the barrier layer in the first region and the process of removing the first work function layer in the first region are performed separately for ensuring the coverage of the first work function layer in the second region. The electrical performance of the semiconductor device and the uniformity of the electrical performance of the semiconductor device may be improved accordingly.
    Type: Application
    Filed: April 8, 2018
    Publication date: August 16, 2018
    Inventors: Chun-Hao Lin, Shou-Wei Hsieh, Hsin-Yu Chen
  • Publication number: 20180138178
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A barrier layer is formed in a first region and a second region of a semiconductor substrate. The barrier layer formed in the first region is thinned before a step of forming a first work function layer on the barrier layer. The first work function layer formed on the first region is then removed. The process of thinning the barrier layer in the first region and the process of removing the first work function layer in the first region are performed separately for ensuring the coverage of the first work function layer in the second region. The electrical performance of the semiconductor device and the uniformity of the electrical performance of the semiconductor device may be improved accordingly.
    Type: Application
    Filed: December 12, 2016
    Publication date: May 17, 2018
    Inventors: Chun-Hao Lin, Shou-Wei Hsieh, Hsin-Yu Chen
  • Patent number: 9972623
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A barrier layer is formed in a first region and a second region of a semiconductor substrate. The barrier layer formed in the first region is thinned before a step of forming a first work function layer on the barrier layer. The first work function layer formed on the first region is then removed. The process of thinning the barrier layer in the first region and the process of removing the first work function layer in the first region are performed separately for ensuring the coverage of the first work function layer in the second region. The electrical performance of the semiconductor device and the uniformity of the electrical performance of the semiconductor device may be improved accordingly.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: May 15, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Shou-Wei Hsieh, Hsin-Yu Chen
  • Patent number: 9953880
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a shallow trench isolation (STI) around the fin-shaped structure; forming a gate layer on the fin-shaped structure and the STI; removing part of the gate layer, part of the fin-shaped structure, and part of the STI to form a trench; and forming a dielectric layer into the trench to form a single diffusion break (SDB) structure.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: April 24, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-yu Chen, Shou-Wei Hsieh
  • Patent number: 9954982
    Abstract: A transmission apparatus for preprocessing a data packet stored in a system memory to generate at least one segment data packet is provided. The transmission apparatus includes a transmission engine and a data memory. The transmission engine includes a header buffer, a segment controller and an encrypt engine. The header buffer stores an IP header, a UDP header, a QUIC public header and a QUIC private header of the data packet. The segment controller divides a payload of the data packet into at least one segment payload. The encrypt engine encrypts the QUIC private header and the at least one segment payload into at least one encrypted data. The data memory receives the IP header, UDP header, QUIC public header and at least one encrypted data. The IP header, UDP header, QUIC public header and at least one encrypted data are combined into at least one segment data packet.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: April 24, 2018
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chia-Hung Lin, Chang-Shiuan Yang, Yi-Huei Lei, Chun-Hao Lin
  • Patent number: 9907024
    Abstract: A wireless communication device includes a transceiver and processing circuitry. The transceiver is configured to establish a telecommunication connection to a network server. The processing circuitry is coupled to the transceiver. The processing circuitry is configured to monitor application programs executed by the processing circuitry. One of the application programs is executed as a foreground application. The processing circuitry is further configured to compare connection parameters of the telecommunication connection established by the transceiver with a connection standard. In response to the foreground application currently communicating with the network server through the telecommunication connection and the connection parameters being lower than the connection standard, the processing circuitry is further configured to limit performance of the processing circuitry, or change a mobile network protocol utilized the transceiver to establish the telecommunication connection.
    Type: Grant
    Filed: July 4, 2016
    Date of Patent: February 27, 2018
    Assignee: HTC Corporation
    Inventors: Chih-Chuan Yu, Chun-Hao Lin
  • Publication number: 20170272378
    Abstract: A network communication apparatus includes a transmission interface and a network interface controller. The transmission interface is coupled to an electronic apparatus, in which the electronic apparatus includes a non-volatile memory for storing a unique medium access control (MAC) address that is authorized by a network. The network interface controller is coupled to the transmission interface and includes a storage device. If the electronic apparatus is coupled to the transmission interface, the electronic apparatus transmits the unique MAC address to the storage device, such that the network interface controller utilizes the unique MAC address to connect to the network, and the electronic apparatus is capable of accessing the network.
    Type: Application
    Filed: July 7, 2016
    Publication date: September 21, 2017
    Inventors: Zhen-Ting Huang, Chun-Hao Lin, Chung-Keng Hung, Chia-Ying Chiu
  • Publication number: 20170222026
    Abstract: The present invention provides a method of fabricating a fin field effect transistor (finFET), comprising: firstly, an interfacial layer is formed on a fin structure, next, a high-k dielectric layer is formed on the interfacial layer; afterwards, a stress film is formed on the high-k dielectric layer, an annealing process is then performed to the stress film, and an etching process is performed to remove the stress film.
    Type: Application
    Filed: February 3, 2016
    Publication date: August 3, 2017
    Inventors: Yi-Ren Chen, Shou-Wei Hsieh, Hsin-Yu Chen, Chun-Hao Lin, Yuan-Ting Chuang, Che-Hung Liu
  • Publication number: 20170178972
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a fin-shaped structure thereon and a shallow trench isolation (STI) around the fin-shaped structure, in which the fin-shaped structure has a top portion and a bottom portion; forming a first doped layer on the STI and the top portion; and performing a first anneal process.
    Type: Application
    Filed: March 2, 2017
    Publication date: June 22, 2017
    Inventors: Ching-Yu Chang, Li-Wei Feng, Shih-Hung Tsai, Ssu-I Fu, Jyh-Shyang Jenq, Chien-Ting Lin, Yi-Ren Chen, Shou-Wei Hsieh, Hsin-Yu Chen, Chun-Hao Lin
  • Publication number: 20170180329
    Abstract: The present disclosure provides a receiving apparatus for preprocessing at least one segment data packet to a data packet. The receiving apparatus includes a packet parser, a data memory, a decrypt engine, a transmission engine, a header processing unit and a controller. The packet parser fetches segment-packet-header information from a segment packet header of each segment data packet. The decrypt engine decrypts an encrypted data of each segment data packet to obtain a segment payload and a QUIC private header including sequence information. The transmission engine transmits the segment payload to a specific location of a system memory. The header processing unit calculates packet information and updates the segment packet header stored in the data memory to generate a packet header. The controller controls the transmission engine based on the sequence information to output the packet header to the system memory for generating the data packet.
    Type: Application
    Filed: July 6, 2016
    Publication date: June 22, 2017
    Inventors: CHIA-HUNG LIN, CHANG-SHIUAN YANG, YI-HUEI LEI, CHUN-HAO LIN
  • Publication number: 20170118314
    Abstract: A transmission apparatus for preprocessing a data packet stored in a system memory to generate at least one segment data packet is provided. The transmission apparatus includes a transmission engine and a data memory. The transmission engine includes a header buffer, a segment controller and an encrypt engine. The header buffer stores an IP header, a UDP header, a QUIC public header and a QUIC private header of the data packet. The segment controller divides a payload of the data packet into at least one segment payload. The encrypt engine encrypts the QUIC private header and the at least one segment payload into at least one encrypted data. The data memory receives the IP header, UDP header, QUIC public header and at least one encrypted data. The IP header, UDP header, QUIC public header and at least one encrypted data are combined into at least one segment data packet.
    Type: Application
    Filed: May 13, 2016
    Publication date: April 27, 2017
    Inventors: CHIA-HUNG LIN, CHANG-SHIUAN YANG, YI-HUEI LEI, CHUN-HAO LIN